JPS63108276U - - Google Patents
Info
- Publication number
- JPS63108276U JPS63108276U JP19937286U JP19937286U JPS63108276U JP S63108276 U JPS63108276 U JP S63108276U JP 19937286 U JP19937286 U JP 19937286U JP 19937286 U JP19937286 U JP 19937286U JP S63108276 U JPS63108276 U JP S63108276U
- Authority
- JP
- Japan
- Prior art keywords
- video signal
- digital
- value
- minimum value
- detecting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Television Signal Processing For Recording (AREA)
Description
第１図は本考案の一実施例に係わるビデオ・プ
リンタ用自動最適レンジ化回路の構成を示すブロ
ツク図、第２図は第１図の動作を説明するための
概念図、第３図は第１図の最小値検出回路４の構
成の一例を示すブロツク図である。
１……入力端子、２……Ａ／Ｄ変換器、３……
フレームメモリ、４……最小値検出回路、５……
最大値検出回路、６……シフト量検出回路、７，
８……減算器、９……倍率検出回路、１０……乗
算器、１１……Ｄ／Ａ変換器、１２……タイミン
グ信号作成回路、１３……出力端子。
FIG. 1 is a block diagram showing the configuration of an automatic optimum range adjustment circuit for a video printer according to an embodiment of the present invention, FIG. 2 is a conceptual diagram for explaining the operation of FIG. 1, and FIG. 2 is a block diagram showing an example of the configuration of the minimum value detection circuit 4 shown in FIG. 1. FIG. 1...Input terminal, 2...A/D converter, 3...
Frame memory, 4... Minimum value detection circuit, 5...
Maximum value detection circuit, 6...Shift amount detection circuit, 7,
8... Subtractor, 9... Magnification detection circuit, 10... Multiplier, 11... D/A converter, 12... Timing signal generation circuit, 13... Output terminal.
Claims (1)
号を１画面分のデイジタル・ビデオ信号に変換す
るアナログ／デイジタル変換器と、 この１画面分のデイジタル・ビデオ信号を緩衝
する画面メモリと、 この１画面分のデイジタル・ビデオ信号の最大
値及び最小値を検出する手段と、 この検出された最小値とビデオ・プリンタに印
刷可能な最小値との差分を検出し、この差分だけ
前記フレームメモリから続出されるデイジタル・
ビデオ信号の値をシフトさせる手段と、 前記検出されたデイジタル・ビデオ信号の最大
値と最小値の差分を検出し、この値でビデオ・プ
リンタに印刷可能な最大値と最小値の差分を除し
て倍率を検出し、この値を前記フレームメモリか
ら読出されて値がシフトされたデイジタル・ビデ
オ信号に乗算する手段と、 この乗算済みデイジタル・ビデオ信号をアナロ
グ・ビデオ信号に変換してビデオ・プリンタに供
給するデイジタル／アナログ変換器とを備えたこ
とを特徴とするビデオ・プリンタの自動最適レン
ジ化回路。[Claims for Utility Model Registration] An analog/digital converter that converts one screen worth of analog video signal to be printed into one screen worth of digital video signal, and buffers this one screen worth of digital video signal. a screen memory; a means for detecting the maximum value and minimum value of the digital video signal for one screen; a means for detecting the difference between the detected minimum value and the minimum value that can be printed on the video printer; The digital data that is continuously output from the frame memory is
means for shifting the value of the video signal; detecting the difference between the maximum value and the minimum value of the detected digital video signal; and dividing by this value the difference between the maximum value and the minimum value that can be printed on the video printer; means for detecting a magnification by the digital video signal read out from the frame memory and shifted in value; An automatic optimum ranging circuit for a video printer, comprising: a digital/analog converter that supplies a digital/analog converter;
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19937286U JPS63108276U (en) | 1986-12-29 | 1986-12-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19937286U JPS63108276U (en) | 1986-12-29 | 1986-12-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63108276U true JPS63108276U (en) | 1988-07-12 |
Family
ID=31160932
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19937286U Pending JPS63108276U (en) | 1986-12-29 | 1986-12-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63108276U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02309784A (en) * | 1989-05-24 | 1990-12-25 | Shinko Electric Co Ltd | Video signal processing circuit |
-
1986
- 1986-12-29 JP JP19937286U patent/JPS63108276U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02309784A (en) * | 1989-05-24 | 1990-12-25 | Shinko Electric Co Ltd | Video signal processing circuit |
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