JPS6292545A - data transmission equipment - Google Patents

Abstract

PURPOSE:To quicken the response speed of a system by detecting a transmission stop signal surely during the transmission of a packet so as to interrupt an emergent packet even when the packet of a long text is sent. CONSTITUTION:A common bus line 1 is connected to transceiver circuits 30a-30c of plural data transmission devices 4A-4c via an information receptacle 3, a terminal equipment 2 connected to a public line 5 is connected to the bus line 1 to connect terminal equipments 6-8 to the transmission devices 4a-4c. When the transmitters 4a-4c receive a transmission command of an emergent packet from the terminal equipment 2, transmission control circuits 31a-31c use transmission stop signal transmission circuits 34a-34c to detect a start signal in the packet during transmission and a data '0' is outputted after a prescribed bit number. In sending a packet from the transmission devices 4a-4c, the circuits 31a-31c use stop bit check circuits 35a-35c to check the signal on the bus line 1 together with the transmission of the stop bit of each packet and the transmission is intermitted with the data '0' to interrupt the emergent packet.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to digital signal communication, and particularly to a data transmission device suitable for a network communication system that performs contention control.

[Background of the invention]

Home bus systems that interconnect electrical devices in the home and manage their operation have been proposed from various fields. This home bus system is a system in which electrical devices and the like are connected to a common transmission path (bus), and the devices are controlled and data is exchanged via the bus. Figure 2 shows a conceptual diagram of the home bus system. In FIG. 2, 1 is a home bus, 2 is a home bus controller that interfaces with an external public line network, 3 is an information outlet, and 4a to 4
C is a data transmission device for sending and receiving data, 5 is a public line, and 6, 7.8 are terminals in the home.

When each terminal transmits a signal on the bus, it transmits in units called packets consisting of a plurality of bits, and performs communication control in units of packets. Regarding communication control methods, see Proceedings of the National Conference of Telecommunications Society of Japan in 1988, paper number 816-4r Study of transmission codes and transmitting/receiving circuits for home information communication network control] and Showa (30
This is stated in the 1. Interim Report on the Development and Research of Home Bus Systems published by the Home Bus System Development and Research Committee in March 2017.

FIG. 3 shows a typical packet format used in home bus systems. In Figure 3, 10
is the priority bit, 11 is the self address, and 12 is the other party's address? 13 is the control code, ]-4 is the message length, 15 is the data, 1.6 is the frame check code, 17 is the response from the receiving terminal, 1.8 is the next packet, and T1 is the bucket 1-length.

゛[7 is a dummy bit for checking reception errors.

'f'3 is a pause time for internal processing.

In the home bus system, the synchronization method is the start-stop synchronization method,
The contention control method is basically C8MA/CD (Carr
ier 5ense Multiple Acc
Ess with C:ollisjon De
tect, 1on) is used. In other words, when transmitting bucket 1-, each terminal first monitors the signal on bus 2 (C
arricrSense) + - After confirming that there is no signal for a certain period of time or more, transmission begins.

Therefore, as shown in FIG. 4, for example, even if a certain terminal attempts to transmit an emergency packet 22 while packet 20 is being transmitted on the bus (time TA), the transmission sequence of packet 20 ends at time Tn. Bucket 1
-22 cannot be sent.

Therefore, when performing security-related emergency communications or telephone-related communications that require fast response signal speeds, it is necessary to forcibly interrupt the currently transmitted packet and interrupt the packet signal. .

To forcibly interrupt the transmission of this packet I,
to the terminal currently transmitting the packet.

The transmission stop order must be reliably notified.

Regarding this method, NRZ (Non Ret,
The case of the urn to zero) signal will be explained.

Now, suppose that while a certain terminal A is transmitting data shown in FIG. 5(a) on the bus, terminal B needs to transmit an emergency packet.

At this time, terminal B first sends continuous II OH data (FIG. 5C) of N bits or more (for example, 11 pins) as a transmission stop signal onto the bus.

The bus is wired O with an open collector type driver.
Since the R configuration is adopted, the signals on the bus (Figure 5 (b)
), the data "□ j+ has priority over the data "B', and from time TO there will always be 11 consecutive pis I "O"'. Terminal A constantly checks the signal on bus J- at the same time as sending, and when it detects 11 consecutive bits of "0" (time TL
, l) to interrupt the transmission. Afterwards, terminal B sends an emergency packet onto bus '2.

In this way, in the case of the N RZ signal, (by No. W,
Since the signal on the bus can always be forced to IIO+1, the transmitting terminal can easily detect the transmission stop signal - and interrupt transmission.

However, when superimposing a DC power supply on the bus in a home bus system, AMI (Al
t, ernate Mark Inversion
) sign is used in negative logic.

AM! An example of data transmitted by terminal A when using codes is shown in FIG. 6(a).

At this time, in the same way, terminal B receives 11 bits consecutively II
Suppose that the transmission stop signal of O11 (Fig. 6 (C)) is transmitted, and at this time, the signal on the bus (Fig. 6 (B)) is II
When Q II and II i 11 collided.

110 When the + side comrades of TJ collide, it becomes '0'', but as shown in Fig. 5 (b) 25 and 26, 1
If the signals on the + side and the one side of 1071 collide, 111
．． It could be 11.

In other words, 11. Even if a break signal with consecutive bits “0” is transmitted, the signal on the bus is not necessarily 1.1 bits consecutively 11
0 II.

Therefore, even if the transmitting terminal always checks the signals on the bus, it cannot reliably detect the transmission stop signal and cannot interrupt the transmission.

[Purpose of the invention]

An object of the present invention is to provide a data transmission device that can reliably detect a transmission stop signal in a network system using AMI codes, thereby interrupting packet transmission and making it possible to interrupt emergency packets. It's about doing.

[Summary of the invention]

In data communication using negative logic and AMI codes.

On the bus, data "0" has priority over data "1". Therefore, in order to notify a terminal transmitting a packet of a transmission stop signal, the only way to notify a terminal transmitting a packet is to set the signal on the bus to "0" while this terminal is transmitting data ``1''.

Data “1” is always included in the packet of the home bus system.
” is guaranteed only for the stop bit.

Therefore, in the present invention, a data transmission device that wants to transmit an emergency packet sends data 110 to the stop pin 1- position of the packet being transmitted on the bus as a transmission stop signal.
The transmission device that is transmitting I+ and transmitting to bucket 1 checks the signal on the bus after transmitting the stop bit "1", and if it is 'O', immediately stops transmitting the packet. did.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIG. 4
a, 4b, and 4c are similar to the data transfer devices shown in FIG. 2, and terminal 1 transfers data via 48 data transfer devices to terminal 3, which has data transfer device 4c. A case will be described in which the terminal 2 issues an emergency packet transmission request via the data transfer device 4b.

In FIG. 1, 30a to 30c are transceiver circuits that interface with the bus; 3]-a to 31c are transmission control circuits that control packet transmission; 32a to 32c are reception control circuits that control packet reception; 33a to 33c; is C
Competition control circuit for performing SMA/cD, 34a-3
4-c is a transmission stop signal transmission circuit that transmits a transmission stop signal in synchronization with the stop bit, and 35a to 35c are stop bit check circuits that check the signal on the bus at the stop bit position of each byte during packet transmission. . Further, the same parts as in FIG. 2 are indicated by the same reference numerals.

Next, an overview of the operation of this embodiment will be explained using FIG. FIG. 7(,) shows the byte format of a packet in the home bus system, which uses an AMI, negative logic, 100% duty code, and an astop synchronization method by adding a start bit and a stop bit.

That is, when transmitting, a start bit (data + 1011) is first transmitted, and then a character, which is data, is immediately transmitted. Then, after transmitting one character, a stop bit (data 6"1") is transmitted, followed by a start bit of the next character.

Conversely, when performing reception, the point (time TJ) at which the signal on the bus changes from 111H to "0" is detected.

This resets the internal timer. Thereafter, the signal on the bus is sampled bit by bit based on this internal timer (FIG. 7(C)). After sampling the stop bit, it waits to detect the start bit of the next character.

When the data device 4b receives an instruction to transmit the emergency bucket 1- from the terminal 2, the transmission control circuit 31b uses the transmission stop signal transmission circuit 34b to detect the start bit of the packet being transmitted on the bus at time TJ), part 10. After the bit, data "0" is transmitted (FIG. 7(b)). This transmission stop signal collides with the stop bit of the packet on the bus output from the data transfer device 4a. The signals on the bus at this time are shown in FIG. Since the stop bit of the transmission data is always “1”, if it collides with the data “0” of the transmission stop signal, the data “O” will have priority over the data “1” on the bus, so The stop bit signal becomes II OII.

Conversely, when transmitting a packet from the data transfer device 4a,
The transmission control circuit 31a uses the stop pin 1-check circuit 35a to constantly check the signal on the bus at the same time as transmitting the stop bit of each byte, and if it is '0', immediately interrupts packet transmission. do.

In this way, by transmitting the data 410 II in synchronization with the stop bit of the packet, it is possible to reliably notify the transmission stop signal to the terminal 1 (6) that is transmitting the packet.

Next, the operation of this embodiment will be explained in more detail using the flowchart shown in FIG.

Now, in the home bus system shown in FIG. 1, the data transmission device 4a on the terminal is
Suppose you are transmitting a packet to . The data transmitted by the data transmission device 4a at this time is shown in FIG. 9(,).

At this time, if the terminal 2 issues a request to transmit an emergency packet at time TO, the data transmission device 4b that received the request indicates that there is currently a signal on the bus (40 in FIG. 8) and that the transmission is an emergency packet. Therefore, the transmission stop signal transmitting circuit 34b detects the start bit of the packet being transmitted on the bus (FIG. 8, 42), and transmits the transmission stop signal 56 10 bits later (FIG. 8, 41). (Figure 8 43).

On the other hand, the data transmission device 4a of the terminal 1 that is transmitting the packet uses the stop bit check circuit 35a to check the stop bit signal on the bus every time it transmits 1 byte data (FIG. 8, 45). and data ′′0
'' (time TH), packet transmission is immediately interrupted (FIG. 8, 46).

Further, the data transmission device 4c of the terminal 3 includes a reception control circuit 3.
2c to receive the packet (Fig. 8 49), timeout to detect the end of the packet (Fig. 8 50), and then check for reception errors (Fig. 8 52).
A response signal will be sent back 2 hours later.

Data transmission device i of terminal 2 that sent the transmission stop signal ¥4
Thereafter, the contention control circuit 33b monitors the signal on the bus, and at time TI, which is T1 time after the response signal (FIG. 8, 44), the transmission control circuit 31b starts transmitting the emergency packet (at time T1). 8 Figure 45).

In addition, if the response signal is not returned due to a failure of the terminal that received bucket 1-, etc., as shown in Figure 10, an emergency signal is sent after T3 time has elapsed from the stop bit of the last byte of the previous packet. Start sending packets.

The dummy bit time T2 and pause time T3 are usually T2
Since there is a relationship of < T 3, the contention control circuit 33
As for b, if the signal on the bus is monitored and the packet transmission is performed after confirming that there is no T3 time signal, the same processing may be performed regardless of the presence or absence of the response signal.

As described above, according to this embodiment, the transmission stop signal can be reliably detected, so even when a long message packet is being transmitted,
Emergency packets can be interrupted, which has the effect of increasing the response speed of the system.

Furthermore, since packet transmission is always interrupted at the stop bit, there is an effect that it is easier to synchronize the next packet transmission.

In addition, since the transmission stop signal is always sent in synchronization with only the stop bit, there is no need to constantly check the signal on the bus for each bit when transmitting a packet, which simplifies processing when transmitting a packet. There is also this effect.

In this embodiment, the transmission stop signal is realized by one bit corresponding to the stop bit, but as shown in FIG.
In order to prevent malfunctions due to noise, it may be realized using two or more consecutive bits.

Further, in this embodiment, the data transmission device is entirely configured by hardware, but as shown in FIG. It is also possible to do so. In FIG. 12, 60 is a microcomputer, 30 is a transceiver circuit, 61 is a pulse transformer, 62.63 is a PNP transistor, 64
, 65 and 66 are NPN transistors. The processing of the microcomputer 60 in this case is similar to the flowchart shown in FIG.

[Effects of the Invention] According to the present invention, a transmission stop signal can be reliably detected during packet transmission, so an emergency packet can be inserted even when a long message packet is being transmitted, and the system response speed is fast. It has the effect of becoming.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a block diagram of a home bus system, Fig. 3 is a packet format diagram of the home bus system, and Fig. 4 shows packet signals on the home bus. Fig. 5 is a signal schematic diagram showing a transmission stop signal in the case of the NRZ signal, Fig. 6 is a signal schematic diagram showing the transmission stop signal in the case of the AMl signal, and Fig. 7 is a signal schematic diagram showing the transmission stop signal in the case of the AMl signal. FIG. 8 is a system processing flowchart of one embodiment of the present invention, and FIGS. 9 and 10 are signal schematic diagrams showing signals on the bus according to one embodiment of the present invention. , FIG. 11 is a signal schematic diagram representing signals on a bus according to another embodiment of the present invention,
FIG. 12 is a block diagram of another embodiment of the present invention. ■...Common bus line 3...Information outlet 30.
... Transceiver circuit 31 ... Transmission control circuit 32
... Reception control circuit 33 ... Competition control circuit 34-
...Transmission stop signal transmission circuit 35...Stop pit check circuit 60...Microcomputer 61.
...Pulse transformer 62.63...PNP transistor 64,65.66...NPN transistor

Claims (1)

[Claims] 1. Transmission control means for transmitting a packet signal composed of a plurality of bits onto a transmission medium; reception control means for receiving packets addressed to itself from among the packet signals on the transmission medium; In a data transmission device comprising a contention control means that performs contention control when transmitting a packet signal to a computer, it detects data on the transmission medium every time a stop bit of a transmission packet is sent during normal packet transmission, and detects data on the transmission medium. Transmission interrupting means for immediately interrupting packet signal transmission upon detecting a transmission stop signal, and transmission stop signal generating means for transmitting a transmission stop signal to the stop bit position of the packet signal on the transmission medium when transmitting an emergency packet. A data transmission device comprising: