JPS628565A - semiconductor equipment - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of a semiconductor device, and particularly to the structure of a power semi-integrated circuit with improved breaking strength.

[Conventional technology]

In semiconductor integrated circuits such as audio power amplifiers, power amplifying elements are used for high power operation using currents of several amperes or more and voltages of several tens of volts. When a bipolar transistor is used as a power amplification element, it is known that if excessive power is applied to the bipolar transistor due to an erroneous operation such as a load short circuit, secondary breakdown occurs and the transistor is destroyed.

The area of voltage and current in a relationship that does not cause secondary breakdown is called the safe operating area (hereinafter referred to as SOA). The conventional technology for expanding SOA' of bipolar transistors is to divide the entire emitter into multiple regions and connect each emitter in parallel via a stabilizing resistor (emitter ballast resistor). 0 In addition, in a single bipolar transistor, as shown in the fourth factor (2), the collector 3
The entire emitter region 6 is formed in the base layer 5 which is grown in a vapor phase on a silicon substrate which operates as a silicon substrate.
A pinch resistor 12 is formed between the collector 3 and the annular region 7 in the base layer 6 by surrounding the annular region 7 with the entire ohmic base electrode 9 and connecting the pinch resistor 12 in series with the base. It is used as a base ballast resistor to expand SOA. This structure is EBR
It is called structure. Note that the emitter electrode 8 is in ohmic contact with the emitter region 6.

[Problem that the invention seeks to solve]

The above-described conventional structure using an emitter ballast resistor has the disadvantage that since the ballast resistor is connected in series with the emitter of the transistor, the collector-emitter residual voltage increases during saturation operation, resulting in poor power efficiency.

Furthermore, in the EBR structure of the single bipolar transistor shown in FIG. 5(2), the pinch resistor 12 causes 5OAt
Since it is expanding, if this pinch resistance 12 is increased,
Emitter ground current amplification factor (hrz
), which results in a significant decrease in output power. That is, the single EBR structure is represented as the equivalent circuit shown in FIG.
A pinch resistor 12 is inserted between the base and the base electrode 9, and a resistor 14b based on a silicon substrate used as the collector region 3 is also interposed between the collector and the collector electrode 10. A diode ] 3 is parasitic between the pole 9 and the collector. Since the diode 13 operates through a PN junction between the base layer 5 directly below the base electrode 9 and the collector 3, the cand of the diode 13 is directly connected to the collector. On the other hand, diode 1
Since the anode 3 operates in the PNN branch between the base layer 5 and the collector 3, the branch immediately below the base electrode 9 to which the highest base potential is applied, a pinch resistor 12 is interposed between it and the actual base. There is. Therefore, when the transistor operates in saturation and the collector potential drops, the pinch resistance 1
Due to the voltage drop of 2, diode 13 can easily become forward biased. As a result of this forward bias, the emitter common current amplification factor (hn:) decreases and the output power decreases.

[Means for solving problems]

The semiconductor device of the present invention is a bipolar transistor having a base and an emitter formed on the surface of a semiconductor substrate, and a collector exposed on the substrate surface at the outer periphery of the base. It has a structure in which the base electrode is extracted outside the region of the same conductivity type as the emitter region, and the collector electrode is extracted from the portion exposed on the substrate surface at the outer periphery of the base region. ing.

[Effect]

According to the present invention, the lower portion of the region of the same conductivity type as the emitter region in the base region acts as a base ballast resistor, and the base region at the outer periphery of the region of the same conductivity type as the emitter region serves as the collector region. The formed PN junction acts as a diode between the base and collector, but since the collector electrode is led out from the outer surface, there is a relatively large resistance between the diode and the collector part that actually operates. exists. Therefore, even when approaching saturation operation, the diode does not easily become forward biased due to the voltage drop between the pinch resistor and the collector resistor. Therefore, the common emitter current amplification factor (hyE)
It is possible to obtain a transistor with high output power and high output power.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

The first factor (a) is a sectional view of an output transistor portion of a power integrated circuit according to an embodiment of the present invention, and FIG. 1(b) is a plan view thereof. A low-concentration N-type collector region 3 is formed on a P-type semiconductor substrate l with a high-concentration N-type collector buried region 2 formed on the surface, and a P-type base region 5 and a high-concentration N-type collector region 3 are formed inside the substrate. It has an emitter region 6, which forms the basic structure of an NPN transistor 11. The P-type base region 5 has a highly doped N-type gate 7 surrounding the emitter region 6t, and the base region 5 under this N-type gate 7
acts as a pinch resistance 12. pinch resistance 12
One terminal 15 a is a portion that operates as an actual base of the P-type base region 5 , and the other terminal 15 b is a portion in contact with the base electrode 9 .

A highly doped N-type region 4 is formed from the surface of the collector region 3 to reach the collector buried region 2, and the collector electrode 1
0 is taken out from this high concentration N type region 4. According to this embodiment, the base region 5 of the transistor 11 includes an EBR type pin resistor 12, which is used in a conventional single transistor, so that the current density in each part of the emitter is made uniform. is being expanded. FIG. 2 shows an equivalent circuit of the transistor of the embodiment shown in FIG. The diode 13 is a diode generated between the collector region 3 and the P-type region 15b adjacent to the collector electrode portion 4 of the pinch resistor 12, and the resistors 14a and 14b are the high-concentration N-type collector buried region 2. and a collector series resistance formed by the high-concentration N-type collector electrode section 4. When the transistor 11 is operated in a large current region, the potential of the base terminal 9 increases due to the base current flowing through the EBR type pin resistor 12 (n). However, terminal 1
Since the potential of 5b is determined by the voltage divided by the collector series resistors 14a and 14b, by making the terminal 15b adjacent to the collector electrode section 4, the resistor 14b is made small, the potential of the terminal 15b is made high, and the diode 13 can be prevented from turning on.

FIG. 3 shows a cross-sectional view of the NPN transistor of the second embodiment. The difference from the embodiment of FIG. 1 is that the collector series resistance is 14ak is aggressively made thicker, and the voltage of the EBR type pin resistor 12 is increased to prevent the diode 13 from turning on even if a large ballast resistor is inserted.

〔Effect of the invention〕

As explained above, the present invention is a ballast river pinch resistance collector! @! , by placing it adjacent to the part 9, SO
It is possible to obtain a power amplification semiconductor device in which A is large and hyz does not decrease even in a large current region.

[Brief explanation of the drawing]

1(4) and (B) are a sectional view and a plan view of an output transistor of a power integrated circuit according to a first embodiment of the present invention, FIG. 2 is an equivalent circuit diagram of the embodiment of FIG. 1, FIG. 3 is a sectional view of an output transistor of a power integrated circuit according to a second embodiment of the present invention, and FIG. 4 is a cross-sectional view of an output transistor of a power integrated circuit according to a second embodiment of the present invention.
FIG. 3 is an equivalent circuit diagram of the embodiment. Figure 5 (2) shows the conventional E
A cross-sectional view of a transistor with a BR structure, and FIG. 2(B) is an equivalent circuit thereof. 1...P-type semiconductor substrate, 2...High concentration N-type collector buried region, 3...Low concentration N-type collector region, 4...High concentration Concentration N type region, 5...
... P type base region, 6 ... High concentration N type emitter region, 7 ... High concentration Nm gate, s ...
...Emitter as pole, 9...Base electrode, 10.
...Collector electrode, 11... River/NPN transistor, 12... Pinch resistor, 13...
・Diode s 14at14b...Collector series resistor, 15a...1 terminal of pinch resistor, 15b...other terminal of pinch resistor.

Claims (1)

[Claims] In a semiconductor device including a transistor having a structure in which a collector region of one conductivity type is exposed on the outer circumferential surface of a base region of an opposite conductivity type, the emitter region of the one conductivity type formed in the base region is 1. A semiconductor device comprising a molded additional region, a base electrode being led out from an outer peripheral portion of the additional region, and a collector electrode being led out from a portion of the collector region exposed to the outer peripheral surface.