JPS6285466A - semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To further reduce the size of one layer by forming a resistor connected with the base of a transistor with the base region used as it is, and grounding an emitter impurity region through a Zener diode formed by superposing directly on the impurity region of the substrate at the periphery. CONSTITUTION:A resistor 5 is performed by a base diffused layer 15 covered with an emitter diffused layer 16. Thus, even if a base-diffused sheet resistor has 150 approx. ohms/square, the depth of the base is shallowed. Accordingly, a resistor of several kilo-ohms order can be readily obtained. Thus, a special area to obtain the resistor 5 is eliminated. The periphery of the layer 16 of high density is superposed directly on a high density P-type separately diffused layer 14 to form a Zener diode, and grounded therethrough. Thus, a wiring region for grounding the emitter diffused layer is eliminated to reduce the area at this point.

Description

[Detailed Description of the Invention] [Summary] The protection means of the present invention consists of a transistor whose collector is connected to an input terminal, whose base is grounded via a resistor, and whose emitter is grounded via a Zener diode. By forming the Zener diode by partially overlapping the emitter impurity region and the surrounding substrate impurity region, a semiconductor integrated circuit can be realized in a small area. This makes it possible to prevent electrostatic damage.

[Industrial application field]

The present invention relates to a semiconductor integrated circuit, and more specifically, the present invention relates to a method for preventing damage to a semiconductor integrated circuit due to static electricity.
This relates to one level of protection for

[Conventional technology]

Characteristic deterioration and destruction of semiconductor east circuits due to static electricity occur not only during manufacturing but also after commercialization, and measures to prevent electrostatic damage are absolutely necessary to guarantee highly reliable semiconductor integrated circuits. There is. Therefore, many protection measures for electrostatic damage IL have been proposed.

One of them is a protection means disclosed in Japanese Patent Application Laid-Open No. 56-79463, which is shown in FIG. a transistor 4 grounded through;
P-N parasitically formed between substrate (ground) and collector
It consists of a junction diode 6. Note that 2 is an internal circuit to be protected, and 3 is a power supply terminal.

Next, an outline of the operation of this protection means will be explained. For example, when static electricity from IF is input to the input terminal, the transistor 4 will generate a voltage V Cf lower than the VCB voltage due to transistor operation.
It breaks down at R and absorbs static electricity energy, and when negative static electricity is input, it protects the internal circuit 2 by absorbing static energy through the diode 6.

[Problem that the invention seeks to solve]

Since the type of the emitter's impurity diffusion layer (n-type) and the type of the substrate's diffusion layer (p-type) are different, the emitter is connected to the substrate (grounded).
In order to connect to the device, the connection must be made via, for example, aluminum metal wiring.

In other words, according to the conventional one-stage protection method, each region requires a special contact region with aluminum metal, which causes the problem that the occupied area increases accordingly.

Furthermore, since the resistor 5 requires a resistance value of at least the order of Ω, a diffusion layer for the resistor is specially provided as shown in FIG. There is a problem that the occupied area becomes large.

The present invention was created in view of the problems of the prior art, and an object of the present invention is to provide a semiconductor integrated circuit having a small area and a protection means capable of preventing electrostatic damage by 1F.

[Means for solving problems]

The present invention provides an Mf stage consisting of a transistor whose collector is connected to an input terminal, whose base is grounded via a resistor, and whose emitter is grounded via a Zener diode, the Zener diode connecting the emitter of the transistor. It is created by directly overlapping an impurity region of the opposite conductivity type at the ground level on the peripheral part of the impurity region of the first conductivity type to be formed, and the resistor is formed so as to cover the impurity region of the opposite conductivity type forming the base. It is characterized in that it is created by forming an impurity region of the first conductivity type that forms the emitter.

[Effect]

Since the resistor connected to the base of the transistor is basically formed using the base region as is,
No special area is required for creating this resistor.

In addition, since the emitter impurity region is grounded via a Zener diode formed directly over the surrounding impurity region of the substrate, there is no need for a special area or wiring area for a contact, so it is small. It becomes possible to create area protection measures.

〔Example〕

FIG. 1 is a circuit diagram of a semiconductor integrated circuit equipped with a protection means according to an embodiment of the present invention, l is an input terminal of an internal circuit 2;
3 is a power supply terminal. 4 is a transistor whose collector is connected to the input terminal l, whose base is grounded via a resistor 5, and whose emitter is grounded via a Zener diode 7. Further, 6 is a PN junction diode.

FIG. 2 is a plan view of realizing the circuit shown in FIG. 1 on a semiconductor substrate, and 8 is a pattern for forming element isolation.

9 is a pattern for forming a base, IO is a pattern for forming an emitter, and 11 is a pattern for forming a collector.

3 and 4 are partial cross-sectional views taken along lines AA and BB in FIG. 2, respectively, in which 12 is a P-type substrate and 13 is an N-type epitaxial layer formed thereon. 14 is an element isolation diffusion layer, 15 is a base diffusion layer, 1B
1 is an emitter diffusion layer, and 17 is a collector w: diffusion layer, which is formed by the pattern shown in FIG. Also 1
8 is an oxide film, and 19 is an aluminum wiring for connecting the collector to the input end f-1.

As shown, in the embodiment of the invention the resistor 5 is realized by a base diffusion layer 15 covered by an emitter diffusion layer 16 . As a result, even if the sheet resistance of the base diffusion is about 150Ω/hole, since the depth of the base is effectively shallow, a resistance on the order of several Ω can be easily obtained. Therefore, a special area for realizing the resistor 5 is not required.

Further, in the embodiment, a Zener diode is formed by directly overlapping the peripheral portion of the highly doped N-type emitter diffusion layer 16 on the highly doped P-type isolation diffusion layer 14, and is grounded through this. Therefore, there is no need for a wiring area for grounding the emitter diffusion layer, and in this respect, the area can be reduced as well.
If it becomes possible.

Next, the operation of the embodiment will be explained. When static electricity is input to the input terminal l, the transistor 4 operates as a transistor, breaks down at a voltage VCER lower than the vce voltage, and absorbs the electrostatic energy.

According to experiments, the emitter diffusion layer 16 and the element isolation diffusion layer 14
When the contact area with the zener diode, that is, the junction area of the zener diode is small, there is a problem in that the zener diode cannot absorb the current. However, as shown in FIG. 2, when the element isolation diffusion layer 14 surrounds the emitter diffusion layer 16 to make the junction area of the Zener diode sufficiently large, the current absorption property is good and the function of the protection circuit is sufficiently performed. It has been shown.

On the other hand, when negative static electricity is input to the input terminal, the static electricity energy is absorbed by the P-N junction diode 6 formed by the P-type substrate 12 and the N-type epitaxial layer 13.
Internal circuit 2 is protected.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to form an electrostatic protection means in a small area, so that it can greatly contribute to further miniaturization and improved reliability of semiconductor integrated circuits.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a semiconductor integrated circuit according to an embodiment of the present invention. FIG. 2 is a top view of the circuit shown in FIG. 1 realized on a semiconductor substrate l-, and FIGS. 3 and 4 are A-A in FIG.
It is a partial sectional view seen from BB. FIG. 5 is a circuit diagram of a conventional semiconductor integrated circuit. 4...Transistor 5...Resistor 6...P-N junction diode 7...Zener diode 8...Element isolation formation pattern 9...Base formation pattern 10...Emitter formation Pattern 11...Collector forming pattern 12...Substrate 13...Epitaxial layer 14...Element isolation diffusion layer 15...Base diffusion layer 16...Emitter diffusion layer 17...Collector diffusion layer Kaprinting J times circle Figure 5 wa A wa

Claims (1)

[Claims] Protection means consisting of a transistor whose collector is connected to an input terminal, whose base is grounded via a resistor, and whose emitter is grounded via a Zener diode, the Zener diode forming the emitter of the transistor. It is created by directly overlapping a ground-level impurity region of the opposite conductivity type on the periphery of the impurity region of the conductivity type, and the resistor is formed by forming the emitter so as to cover the impurity region of the opposite conductivity type forming the base. 1. A semiconductor integrated circuit, characterized in that it is manufactured by forming an impurity region of a first conductivity type.