JPS6267786A - Information recording and reproducing device - Google Patents

Abstract

PURPOSE:To attain rapid and automatic program searching at the time of sound reproducing by recording a PCM sound signal compressed at its time axis in the divided 1st area and recording an index signal relating to said PCM sound signal in the 2nd area. CONSTITUTION:A sound signal RA inputted from an input terminal 10 is converted into a digital signal by an A/D converter 11 and the digital signal is supplied to a PCM processor 12a. A PCM processor 12a executes processing such as interleaving, the addition of an error detecting/correcting code, the compression of a time axis, the modulation of a pulse code for the inputted digital sound signal DRA regarding one field period as one unit by using a memory 13 and supplies the processed signal as a time axis-compressed PCM wound signal PCD to a recording amplifier 20 through an L side terminal. By the way, signal processing in the A/C converter 11 and the PCM processor 12 is executed by using a clock MCK generated from a clock generating circuit 15 as a reference clock and a head switching timing signal PCM30 supplied from an OR gate 30 as a timing reference.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a helical scan type S air recording and reproducing device, and is particularly suitable for recording and reproducing a large number of time-axis compressed digital audio signals. Regarding equipment.

Background of the Invention In recent helical scan type VTRs, there is a tendency to improve the quality of reproduced audio. One of the specific methods is to transform the audio signal into a digital signal, compress the time axis for each field period, and use it as an extension of the video signal recording track. A method is known in which PCM recording is performed in a track section formed during a period when the tape is simultaneously scanned (overlamp period).

VT that supports time axis compression PCM recording of such audio signals
In R, a method has been proposed in which a time-base compressed PCM audio signal is recorded also on a track where a video signal is originally recorded, as described in, for example, Japanese Patent Laid-Open No. 58-222402. (Hereinafter, this method will be referred to as the 'gPcM multi-track recording method.) This proposal divides the video signal recording track into, for example, five equal parts, and records a time-axis compressed PCM audio signal on each, thereby recording a total of six tracks including the overlap period. Forming two PCM audio tracks - f6.

Therefore, when this VTR is used as an audio-only device, the recording time is six times longer than when used for normal video, and high-quality PGM audio can be recorded and played over a long period of time.

However, if we consider, for example, that this PCM multi-track system uses a tape with a recording time of 2 hours, the recording time will be 6 times as long as 12 hours, making it possible to record over 100 songs of ordinary music. Therefore, during playback, searching for the song to be played by repeating ``play'', ``rewind'', and ``fast-forward'', as with conventional VTRs, is extremely cumbersome and time-consuming. becomes.

[Purpose of the invention]

An object of the present invention is to solve the above-mentioned problems in the PCM multi-track system, and to provide an information recording/reproducing device capable of high-speed and automatic cueing during playback on a tape on which a large number of songs are recorded. In particular, [Summary of the Invention] In order to achieve the above object, the present invention provides a method in which, in the case of PGM multi-track recording, the width of the recording gate signal that controls the recording area of the PCM signal on the tape is Compared to the case of recording signals and video signals, by widening the recording area at the rear, a recording area for the index signal is formed8.And as the index signal, a signal with a different frequency is recorded between the leading part and the other parts of each side. By detecting the frequency of the index signal at the time of re-compressing, it is determined whether the playback point on Q1 is at the beginning of the song or some other part. The tape is run through a high-speed search until the beginning of the cue.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a recording system of an information recording and reproducing apparatus that uses the present invention and is capable of high-speed cueing during reproduction in the case of the PGM multi-track recording method.

In FIG. 1, 1 is an input terminal for a video signal, and 2 is a bandpass filter ('BPF) for color difference signal separation.

6 is a frequency converter, 4 is a low pass filter (LPF) for luminance signal separation, 5 is a frequency modulator, 6 is an adder, 7 is a vertical synchronization signal separation circuit, 8 is a 1/2 frequency divider, 9 is a switch , 10 is an audio signal input terminal.

11 is an analog-digital converter (A/D converter), 124 is a recording PCM processor, 16 is a memory, 14 is a gate signal generator, 15 is a clock generator, 16 is a switch, 17 is a 1/4 frequency divider , 18 is a timer, 19 is a switch, and 20 is a recording amplifier.

21 is a reference signal generator, and 22 is a switch.

23 is a servo circuit, 24 is a switch, 25 is a 6-phase 5W6
0 generator, 26 is a selection circuit, 27 is an inverter,
28, 29 and 61 are AND gates, 50 is an OR gate, 62 is an input terminal for a select signal, 66 is a rotary cylinder, Saa and 547 are rotary heads, and 55 is a $9. Among the above plotters, 1 to 9 indicate the video signal processing system, and 10 to 15 indicate the audio signal processing system.

Further, 14 to 62 indicate a control system. First, a case will be described in which a video signal and a time-base compressed PCM audio signal are recorded in the overlap portion (hereinafter referred to as AV recording mode).

In Figure 1? and the video signal R input from input terminal 1
V is supplied to BPF2 and LPF"4.

The color difference signal FLVC extracted by the BPF 2 is input to the frequency i signal 3, and after being converted into a low frequency converted color difference signal,
It is supplied to adder 6. On the other hand, the luminance signal RVY extracted by the LPF 4 is supplied to the frequency modulator 5 and the vertical synchronization signal separation circuit 7.

The luminance signal frequency-modulated by the frequency modulator 5 is input to an adder circuit 6, where it is added to the above-mentioned low-pass converted color signal and supplied to a recording amplifier 20 via a switch 9. Note that the switch 9 is turned off when the mode control signal MS is high and turned on when it is low. The vertical synchronizing signal separation circuit 7 extracts the vertical synchronizing signal S from the luminance signal FtVY supplied from the LPF 4 and supplies it to the 1/2 frequency divider 8.

The vertical synchronizing signal SiO frequency-divided by the 1/2 frequency divider 8 is supplied to the servo circuit 23 via the switch 22, and serves as a cylinder 560 rotation reference. Note that the switch 22 is closed to the AV terminal side in the CAV recording mode according to the mode control signal MS.

The Ondo signal RA input from the input terminal 10 is:
It is converted into a digital signal by the A/D converter 11 and supplied to the PCM processor 12a. The PCM processor 12α receives the input digital audio signal DRA,
One field period is taken as one unit, and after processing such as interleaving, addition of error detection/correction codes, and pulse code modulation using the memory 13, the signal is converted into a time-base compressed PCM audio signal PCD. Switch 16 L
The signal is supplied to the recording amplifier 20 via the side terminal L7. still,
The above A/D converter 11 and PCM processor 12a
The signal processing is performed using the clock MC'K generated by the clock generation circuit 15 as a reference clock and the head switching timing signal PC supplied from the OR gate 30.
This is done using M5O as the timing reference. Further, in this embodiment, a bi-phase mark modulation method as shown in FIG. 2 is adopted as a pulse code modulation method. As can be seen from Figure 2, bi-phase mark modulation inverts the state at the boundary of each bit, and when the data is "1",
This is a modulation method that inverts the state even at the center of the bit period. The switch 16 is switched according to the control signal SC, and is closed to the H terminal when the control signal 8C is high, and to the L terminal when the control signal 8C is low. In AV recording mode, the mode selector switch MS is low, so
The control signal Sc, which is the output of the AND gate 61, is always (
(Low and t-click, therefore, the switch 16 is closed to the L terminal side.The control signal for the switch 16, +knee SC, is used for PCM multi-track recording (hereinafter referred to as AA).
This is referred to as recording mode. ), it plays an important role in recording the index signal used for high-speed cueing during playback, and the details will be explained later in which AA recording mode.

The recording amplifier 20 to which the video recording signal RAV and the PCM audio signals R and PD are input is connected to the recording gate signal PC1viGT supplied by the gate generation circuit 14 and the OR gate 5.
Head switching timing signal PCM supplied from 0
50, the video recording signal RAV is continuously recorded in a video area of 180° angle by tape winding, and P
GM audio signal RPD is wrapped with tape on PCM with 56" square
Record to the area intermittently. A specific example of the configuration of this recording amplifier 20 is shown in FIG. 5, and a timing chart of each input/output signal is shown in FIG.

In FIG. 6, 101 is an input terminal for a video recording signal RAV, 102 is an input terminal for a PCM audio signal, 103 is an input terminal for a head switching timing signal PCM300, and 10 is an input terminal for a PCM audio signal.
4 is an input terminal for the recording gate signal PCMC)T, 105 and 106 are output terminals for supplying recording signals to the rotary heads 644 and 34, 66 and 57 are recording signal changeover switches, 6B is an inverter, 59 and 40 is an AND gate, and 41 and 42 are amplifiers that amplify the LB signal to a level suitable for recording. Also, in FIG. 4, (1) is the head rotation phase detection signal 5W30, and (2) is the head cutting timing signal PCM30.
, (5) is the recording gate signal PC,'MGT, (4)
are the PCM audio signals R and PD, (5) is the video recording signal R person V, and (6) is the switching control signal Qa of the switch 66.
, (7) is the switching control signal Q of the switch 67
4. (8) is the recording signal Ra supplied to the rotary head 64Q, and (9) is the recording signal RJ supplied to the rotary head 344. In addition, (8)- and (9) above
The dotted line portions in are the rotating heads 34.11 and 34k.
indicates a period in which the S-tape 65 is not in contact with the S-tape 65. In FIG. 5, the switch 36 and the switch 37 are closed to the H terminal side when the switch changeover control signals QeL and Qlr are No/No, respectively, and are closed to the L terminal side when the switch changeover control signals QeL and Qlr are low. Therefore, the recording timing of the PCM audio signal RPD and the video recording signal ItAV is determined according to the head switching timing signal PCM30 and the recording gate signal PCMGT, and in the AV recording mode, recording is performed in the formant shown in FIG. 5 and Table 1. Ru.

Table 1 Code Area name Area length':! -PCM data α Clock run-in area 5.0
0″′alL”1”b Data area 2&52°
"1' le 10" 0 77 p -L/ :ff -
For 7'47g 2. o 6o aIJ-1
”Margin area d Video overlamp area 2.62°4 1 field video area 180.00°f
At the video overlap area of 5.00°, the above head switching timing signal PCM
30 and the recording gate signal PCMGT will be explained.

In FIG. 1, in the AV recording mode, the tank pulse TP generated by the rotation of the cylinder 66 is supplied to the servo circuit 26 which is not supplied with the vertical synchronizing signal 5V30 whose frequency is divided by 14.
is entered. And in this servo circuit 2'5,
In order to record one field of video signals in the video area, the above-mentioned 4-frequency vertical synchronization signal 5vsa and the head rotation phase detection signal 5W50 obtained by waveform shaping the above-mentioned tank pulse TP are synchronized in a predetermined phase relationship. Thus, the rotation of the cylinder 660 is controlled. The above head rotation phase detection signal SW! 10, the head 54cL in FIG. 1 is Pi2.
This signal switches from high to low when entering the video area from the M area, and from low to high when the head 244 enters the video area from the PCM area. This head rotation phase detection signal 5W30 is supplied to an AND gate 28 and a 6-phase 5W50 generation circuit 25. In the AV recording mode, since the mode control signal MS is low, the head switching timing signal PCM50, which is the output of the OR gate 5G, becomes the head rotation phase detection signal 8W50. Therefore, the recorded video signal RAV is recorded into the video area of the tape 65 via the heads SaC and 34δ alternately every one field period.

Further, the head switching timing signal PCM30 is generated by the clock generation circuit 5. Gate generation circuit 14. and is supplied to the PGM processor 12cL. The clock generation circuit 15 generates a clock MCK and a timing count clock QCK, which serve as a reference for signal processing in the PCM processor 12α, in synchronization with the head switching timing signal. In this embodiment, the clock M
CK frequency/MCK approximately 11.58 MH2, ri07
The frequency of QCK/QCK is approximately +52.94KH2. These frequencies are fMcK −= 756 fkL = 756 × 5
25 /PCM5nfQCK= 4 f H= 4
X 525 /PCM311 where /H is the frequency of the horizontal synchronization signal/PCM is the frequency of the head switching timing signal, which is 1/2 the frequency of the vertical synchronization signal.

The gate signal generation circuit 14 counts the clock QCK from the edge of the head switching timing signal PCM30, and when the mode control signal MS is low, the recording gate signal PeMl as shown in FIG.
T is generated and supplied to the recording amplifier 20. This recording gate signal PCM0'r rises at 36° before the edge of the head switching signal PCM30, and falls at 2.62° before the edge, and the recording gate signal PCM0'r rises at 36° before the edge of the head switching signal PCM30 and falls at 2.62° before the edge. Rock run in Eli 7-a
, 7"-tar area k and after-recording margin area 0. Also, at a point 2.62 degrees before the edge of the head switching timing signal PCM5o, the recording gate signal PCMG
The reason why T is lowered is to over-ramp the video signal by 2.62'''.
The point is the point at which the head scans the tape at the edge of the head switching/f-ming signal.

In addition, the output from the PCM processor 12cL is
The M audio signal RPD is the head switching timing signal P.
Time-axis audio data is generated during the period when the head 64α or 541r scans the area number shown in Figure 5, which is based on the lock MCK according to CM30 and :X, and all other 61
” data is generated.

Note that the data transmission rate of the PeM audio signal RT'D is 5.79 bit/sec. Therefore, all 11"
5.7 in area a and area G in Figure 5 where Q is written.
A single frequency signal of 9λlHz will be recorded.

Now, let's move on to the A recording mode (P), which is the central part of this patent.
I would like to make some comments regarding CM multi-track recording.

In FIG. 1, in the AAA recording mode, the mode changeover switch 24 is closed to the N terminal side, and the mode control signal M
S becomes high. As a result, the head switching timing signal %PCM50, which is the output of the OR gate 60, becomes the output signal of the select circuit 26. The select circuit 26 selects one of the six timing signals supplied from the six-phase SW 30 generating circuit 25 in accordance with the select signal TrS input through the input terminal 62 and supplies it to the AND gate 29 . The above six timing signals are the head rotation phase detection signal 5w5 supplied from the servo circuit 26.
o as a reference, the phase of this signal 5W60 is set to 36° (N
-1) (N is 1.2...6). Figure 7 shows the head rotation phase detection signal 8W30.
and six head switching timing signals PCM30 in the AA recording part. In FIG. 7, (1) is the head rotation phase detection signal 8W30, (2) is the six head switching timing signals PCM30, and (3) is the recording gate signal PCMGT generated corresponding to the six timing signals PeMso. It is. Subscripts 1, 2 in (2) and (5) above. - Hit 6 is the Tr No. 1 of the track in the AA recording mode standby tape pattern shown in FIG. TrNo.2. ---------TrNo.
W-Compatible with recording.

The format of each track in AAA recording mode is
As shown in FIG. 8 and Table 2.

Table 2 Code Area Name Area Length PCM Data 4 Clock, Run, In Area 2.06°~s
, ocio cLtL@1”k data area 2&
62° @15le “0”? Separate lounge area
1.05 aJ, 1@1″aJ-L a
JJL L Index area 2.06°, 1-
LE・0°L Guard area 1.59° No record This area The format of the A recording mode is different from the format of the AVV recording mode shown in Figure 5 and Table 1.
An index area L is provided at the rear of each truck. This index area I is the AV shown in FIG.
A portion of the after-recording margin area G and the video overlap area d during recording mode standby are allocated to the recording of the index signal. Furthermore, the 8th
In the figure, t is a separator area that separates the data area and index area, and b is a guard area that separates each track.

The above index signal is used for high-speed cue search during playback, and is normally "1" of PCM data.
79■ Corporate frequency signal is recorded. And, the first part of a famous song (1j300) rack is covered by a PC.
Recording PCM data "0" over 500 tracks, in which a single frequency of 2,895 MHz, which is "0" of M data, is recorded requires at least This is done once so that the index signal °0" at the beginning of a famous song can be detected. For high-speed cueing during playback, it is necessary to detect whether the PCM data in the index area is "add" or "1". This allows you to count the number of songs and search for the beginning of the song.

Now, a method for recording the above Intex signal will be explained using FIG. 1. In FIG. 1, during AA recording/writing, a high level mode control signal MS is supplied to the gate generation circuit 14 and the AND gate 31. in this case,
The gate generation circuit 14 generates clocks Q and C based on the edge of the head press-down timing signal PL'M30.
By counting K, a recording gate signal PeMGT as shown in (6) in FIG. 6 and an index gate signal IGT as shown in (4) in FIG. 6 are generated. In the above-mentioned AA recording mode, the e-recording gate signals PC to IGT are AV
The gate width is wider toward the rear than in the V-recording mode. This is because in the case of AA recording mode, there is no need for a video overlap area, and instead an index area is provided where P(,'M days are recorded.This recording gate signal PCMC)T is used for AV recording. During the mode standby, the signal is supplied to the recording amplifier 20 and controls the switches 56 and 57 in the amplifier shown in FIG.

On the other hand, the index gate signal IGT is the AND gate 6
1. And gate! In addition to the index gate signal IGT, a mode control signal MS and a gate signal TGT supplied from the timer circuit 1 are input to +1, and a control signal SC, which is the AND output of these signals, is supplied to the switch 16. The timer circuit 18 receives an index pulse IP of 300 seconds after inputting an index pulse IP supplied from a switch 19 that is turned on at or just before the beginning of a masterpiece.
Gate signal T that is high for the field period (5 seconds)
To generate GT, therefore, when recording AA recording, when recording the first 300 tracks of a famous song, the head 5
4a '5? The switch 16 is closed to the H terminal side during the period when the index area 34k scans the index area. Therefore, this index recording period is 11.58MHz o
) A single frequency signal IDΦ of 2,895MH2 which is PCM data @0'' obtained by dividing MCK by 174.
is supplied to the recording amplifier 2o, and the index area
CM data "07" is recorded.

Therefore, the index signal recorded near the beginning of a famous piece of music is as shown in FIG. In FIG. 9, (1) shows the input audio signal RA, (2) shows the index pulse IP supplied from the switch 19, and (3) shows the timer 18.
A gate signal TGT is supplied from the gate signal TGT, and (4) indicates a PGM signal track in which an index signal is recorded.

In the AA recording mode, the mode control signal MS is high, so the switch 9 is turned off. This means that the video recording signal RAV is transmitted to the rotating head 54 in the AA mode.
This is to prevent tracks that are supplied to tracks a and 54k and have already been recorded from being erased.

Furthermore, the audio signal processing in blocks 11 to 13 shown in FIG.
Since this is the same as when the recording mode is in standby, the explanation here will be omitted.

Next, an example of a reproduction system will be explained using FIG. 10.

FIG. 10 is a block diagram of a reproduction system of an information recording and reproduction apparatus that uses the present invention and is capable of high-speed cueing in the case of the PGM multi-track recording method.

In FIG. 10, 46 is an output terminal 44 for the reproduced video signal.
4b is a video squelch circuit, 4b is an adder, 46 is a frequency demodulator, 47 is a frequency converter, 48 is an HPF for frequency modulated luminance signal separation, 49 is an LPF for low beam conversion separation 50 is an output terminal for reproduced audio, 51 is a mute circuit.

52 is a digital-to-analog converter (D/A converter), 55 is a preamplifier, 54 and 55 are control signal input terminals, 56 is a system controller, 57 is an index signal detection circuit, 58 is a window circuit (gate circuit)
It is. 12Ki is a PCM processor for playback. In FIG. 10, blocks with the same reference numerals 7 as in FIG. 1 are flocks having the same functions as the blocks explained in FIG. 7. Of the above blocks,
43 to 49 indicate the Eirin signal processing system, and 50 to 52 and 126°13 indicate the audio signal processing system. First, a case will be described in which a video signal and a time-base compressed PCM audio signal of an overramp portion are reproduced (hereinafter, this will be referred to as AV reproduction mode).

In Figure 10, the signals p-y, , p4 reproduced by the rotary heads 54a, 541r are sufficiently amplified by the preamplifier ε3, and are sequentially switched according to the head switching tie-in 4' signal PCM30.
The video signal PAV reproduced from the video frame area is available on the HP
The PCM audio signal PPD, which is supplied to the F 48 and LPF 49 and reproduced from the PCM area, is supplied to an index detection circuit 57 and a window circuit 58. HPF48
separates the frequency modulated luminance signal PVY from the reproduced video signal PAV and supplies it to the frequency demodulation circuit 46. Also, LPFa
9 separates the low frequency conversion color difference signal PVC from the reproduced signal PAV and supplies it to the frequency conversion circuit 47. The demodulated luminance signal and the color difference signal returned to the original odd frequency are added by an adder 45 and then output from a video output terminal 46 via a squelch circuit 44. Note that the squelch circuit 44 cuts off the output of the reproduced video signal PV except in the AV reproduction mode, according to the mode control signal MSK supplied from the switch 24.

On the other hand, the PC on tape 65 reproduced P from the 'M@ area.
The CM signal PPD is supplied to the PCM processor 124 by the window circuit 58 only during the high period of the gate signal PCMGT supplied from the gate generation circuit 14.
The M processor 126 converts the reproduced PCM signal PPD into one unit per field, and uses the memory 13 to perform pulse code demodulation, time axis expansion, error detection and correction, tinterleave, etc. After processing, D/A
Supplied to converter 52. The digital audio signal PDA supplied to the D/A converter 52 is converted into an analog audio signal and then output from the output terminal 50 via the mute circuit 51. The mute circuit 51 cuts off the output of the reproduced audio in accordance with the mute control signal Mut supplied from the system controller 56 when the quality of the reproduced audio at the start of reproduction or during a search is significantly degraded. The signal processing in the PcM processor 12 and the D/A converter 52 is carried out by the clock generation circuit 1.
The clock MCK generated at 5 is used as a reference clock,
Head switching is performed using the head switching timing signal PCM30 supplied from the ORKATE 50 as a timing reference. still,
The method of generating the head switching timing signal PCM3o is the same as that of the recording system described above, and the explanation thereof will be omitted here.

Next, when playing back a PCM multi-track recording tape (hereinafter, this case will be referred to as AA playback mode), in FIG. 10, in AA playback mode, the mode selector switch 24 is closed to the AA terminal side, and the mode control Signal MS goes high. This results in ℃, or gate 30
The head switching timing signal PCM is the output of
50 is the output signal of the select circuit 26, that is, the signal shown in FIG.
Among the six signals shown in 15), the select signal Trs
Select one according to fr. Then, according to the selected head switching signal PCM60, the PCM audio signal recorded on a specific track of TrN06 from TrNol shown in FIG. 8 is reproduced.

The processing of PCM audio signals during normal playback is
The signal processing is similar to the signal processing in the V playback mode, and the explanation here will be omitted.

Next, the case of cueing by high-speed search playback will be explained. In this case, first, input terminals 54 and 5
5, a search direction designation signal Di and a song number designation signal SN that designates the number of songs to be played from the current playback point are input to the system controller 56. The search direction designation signal Di is, for example, a binary signal of low level for forward direction search and high level for reverse direction search, and the number of songs designation signal SN is, for example, a 4-bit binary signal. , Therefore, both the forward direction and the reverse direction correspond to cue up to the 16th track. The system controller 56 outputs a forward or reverse direction search control signal MD to the servo circuit 26 in accordance with the above search direction designation signal Di.

In accordance with the search control signal MD, the servo circuit 25 increases the rotational speed of the capstan motor (not shown) to increase the tape running speed.

On the other hand, the PGM signal PPD output from the preamplifier 53
are supplied to the index signal detection circuit 57, where the beginning of each is detected.

FIG. 11 shows an example of the configuration of the index signal detection circuit 57. In FIG. 11, 107 is an input terminal for a search direction designation signal, 108 is an input terminal for a reproduced PCM signal, 1
09 is an input terminal for the index gate signal, and 110 is an output terminal for the detection signal NO.

Further, 59 is a limiter, 60.62 is an AND gate 61 is an inverter, 63 is a rising edge detection circuit composed of 61 and 62, 64 is a reference value generation circuit, and 6
5 is a counter, 66 is a comparator, and 67 is a decoder.

In FIG. 11, f is input via the input terminal 108.
, HP CM signal PPD is applied to a pulse wave by a limiter 59 and then supplied to one input terminal of an AND gate 60. The other input terminal of the AND gate 60 is supplied with the index gate signal IGT input through the input terminal 109 t2, and therefore the output signal of the AND gate 60 is P during the index gate period only.
The signal becomes a CM signal and is supplied to the counter 65 as a clock.

On the other hand, the rising edge signal Ed of the index gate signal that was not detected by the edge detection circuit 66 is supplied to the counter 65 as a reset signal. This is the number of PCM signal pulses in one period. Therefore, the count value Nc when reproducing the first track of each is half the value of the count value Nc when reproducing the other tracks. This is because, as explained earlier in the AA recording section, 10'' of the By7Ez mark modulation data shown in Figure 2 is recorded in the leading part of each index signal area, and the other parts are recorded. This is because the data @1# is recorded. However, the point to be careful here is that in the case of high-speed search playback, even if the same data is recorded in the index signal area, the search Due to the difference in speed and tape running speed, the count value Nc fluctuates and becomes 7. This is because the relative speed between the head and the tape changes due to the high-speed search.

For example, in the case of the 8 mm video standard format, the amount of change in the count value is approximately -38% in the case of a 100 times speed search in the forward direction, and approximately +38% in the case of a 100 times speed search in the reverse direction.

Now, suppose that when recording in the index signal area, if the data is 11", there will be 100 pulses, and if the data is 10", it will be 5 pulses.
Assuming that 0 pulses have been recorded, the count value Nc during high-speed search playback will be as shown in Table 6, and by comparing it with a fixed value, it will not be possible to accurately determine whether the data is "0" or @Vi.

Table 5 Therefore, in this embodiment, as shown in FIG. 11, a search direction designation signal Di is supplied to the reference value generation circuit 64, and the reference value Nr is changed depending on whether the signal Di is high or low. . For example, if the number of pulses of the index signal during recording is shown in Table 5 above, it is 1, the reference value Nr is set to 46 when searching at 100x speed in the forward direction, and the number of pulses in the reverse direction is set to 1. The number is set to 106 during QO double speed search. The reference value output N' of the reference value generation circuit 64 and the counter value output Nc of the counter 65 are supplied to a comparator 66, where a comparison is made between the magnitudes of the reference value Nr.
If <count value Nc is equal, pulse L representing data 1'' is applied, and if reference value Nr>count value NC, data '
a” is supplied to the decoder 67. The decoder 67 detects the beginning of each surface from the pulse L and the pulse SK, and sends the detection output Nf to the system shown in FIG. 10 via the output terminal 110. The system controller 56 then counts the leading edge detection signal Nf of each side supplied from the decoder 67.
The tape is fed through a high-speed search until it matches the song number designation signal SN.

As explained above, according to this embodiment, when waiting in the AA recording mode, the width of the recording gate signal for the PCM signal /, 'A=V recording mode is made wider in the rear than in the recording mode, thereby affecting other tracks. It is possible to secure the recording area for the index signal without giving any.

In addition, as the index signal, a signal with a different frequency is recorded at the beginning and other parts of each side, and in AAA raw mode, the frequency of the index signal is detected by high-speed search playback, and the playback point is set at the beginning of the song. or other parts can be determined. This makes it possible to feed the tape to the beginning of a predetermined song by high-speed narch, making it possible to perform automatic high-speed cueing.

In this embodiment, an area approximately 2 degrees behind the PGM audio data is used as the index area, but this index area may be used as the separate area shown in FIG. and extends to guard area L, maximum 4.7
There is no problem even if you record up to the ° range. Also, PL'M
The area in front of the audio data may be used as an index area. However, in that case, the index signal is not recorded because the clock run-in signal is recorded in an area approximately 2 degrees from the foremost part of the PCM audio data.

In addition, in this embodiment, data "1" is set at the beginning of each side as an index signal (5,79MHz single frequency).
Data “0” (2J395MHz length -
frequency), but other frequency signals may be used.

Next, referring to Figure 12, we will explain how to record an index signal in after-recording on a tape on which an audio signal has already been recorded. Note that the first
In FIG. 2, blocks given the same reference numerals as in FIGS. 1 and 10 are blocks having the same functions as the blocks described in FIGS. 1 and 10. In FIG. 12, 68 is an index post-recording controller.

69 is an index signal changeover switch, 7Q and 71 are 4 circuits, and F2 is an AND gate.

7Sa and 7Tatsu are recording/reproduction changeover switches. In the twelfth section, during after-recording of the index signal, the PGM processor 124 detects the address signal from the reproduced PCM signal inputted via the window circuit 58, and converts the address f-tater (index after-recording controller). Here, address data Adr will be explained using FIG. 15. In FIG. 13, (1) is the head phase detection signal 5W30, and (2) is the head phase detection signal 5W30 shown in FIG. T
rNo2゜..., time-axis compressed PCM audio signal PGD corresponding to TrNo6, (3) is the block configuration of the time-axis compressed PCM audio signal for one track, and (4) is the data configuration of the above audio block. It shows. As shown in FIG. 13, the time-base compressed PCM audio signal is divided into, for example, 152 blocks for each field period. In addition to the audio data D1 to D8 (8 bits x 8 words), each block above contains a synchronization signal S (5 bits x 8 words).
bit), block at.

The response signal Adr (8 bits), and the error correction signal Q and PC (8 bits x 2 words) are redundant. Among these, the address signal Adr corresponds to each of the 162 divided blocks, and the address signal Adr
By detecting this, it is possible to know the point on the track that the head is scanning at the time of detection.

In FIG. 12, the index dubbing controller 68 automatically finds the end point of the PCM audio data by detecting any one or more of the 162 addresses from the address signal Adr, and outputs the index signal IND. A timing signal ARGT for recording is generated. Specifically, for example, 1
Assuming that the address of the 00th block B100 is detected, the number of pits M (bits) from there to the end point of the PCM audio data is such that the bit configuration of one block is as shown in (23) in Figure 15. For M= 107
(132-100)+96:5520 (bit)
becomes. Now, the bit transmission rate is 5.79MbPS and the frequency of the reference clock MeK is 1158MH! Therefore, from the time when the 7th dress of the 100th block B100 is detected, 7040 (5520
The point in time when 0) reference clocks are counted becomes the end point of the PCM audio data.

The above index signal post-recording timing signal ARG
T is a recording amplifier 20 and a recording/playback selector switch 7
Supplied to 5cL, 73J. The recording amplifier 20 supplies the index signal IND to the switches 7 and 7 only during the index signal recording timing period according to the timing signal ARGT and the head switching timing signal PCM30. The above switches 734 and 75J3-
is normally closed to the PB terminal side during dubbing, but during the period of recording the index signal, it is closed to the RgC terminal side according to the dubbing timing signal ARGT, and the recording index signal is transferred to the head 34a or the head 544.
and records it in the index area of the track currently being played back on the tape 65. In this case, the signals recorded as index signals are 5, 7, which is 11" of PCM data, as in the case of normal recording explained in FIG.
9 MHz single frequency signal and PCM data +7)'O
11- There are two types of signals, which are a single frequency signal of 2,895 MHz.
It is made by dividing the frequency of K using 1/2 frequency dividing circuits 70 and 71. 1/! The two-frequency index signals generated by the frequency dividing circuits 7o and 71 are supplied to the L input terminal and the H input terminal of the INTEX signal changeover switch 69, respectively. This index signal changeover switch 69 is set to the H side when the control signal ASC is high, and to the L side when the control signal ASC is low.
will be closed. As explained in FIG. 1, the control signal NSC is high for, for example, 500 field periods (5 seconds) from the time the switch 19 is turned on, and therefore, during that period, the index signal changeover switch 69 is Since H41l< is closed, the index signal recorded will be a 2.895MHz single frequency of PCM data 'O'.In periods other than the above, the index signal will be PCM data 'O'.
It becomes a 5.79 MHz single frequency with M data “1”.

As explained above, in this embodiment, since the index signal is recorded in an area separate from the area in which the PCM audio signal is recorded, after-recording of only the index signal is possible, and editing work etc. It is very effective. Furthermore, during after-recording of the index signal, the recording timing of the index signal is determined based on the address in the reproduced PCM audio signal, so the recording area of the PCM audio data and the recording area of the Intex signal are By always keeping the positional relationship with the area constant, it is possible to eliminate unerased areas of already recorded index signals when overwriting.

〔Effect of the invention〕

As explained above, according to the present invention, when PCM multi-track recording is 0, it is possible to record an index signal separately from a PCM audio signal, and when playing back, the index signal is detected by high-speed search, and its information is Accordingly, the tape can be run accurately and quickly to the location where a predetermined song is recorded, and the cue can be found, which is highly effective. In addition, since the above-mentioned Intex signal is recorded in an area separate from the area in which the PGM audio signal is recorded, it is possible to perform A-V coding of only the Intex signal, which is also effective for editing etc. dies.

[Brief explanation of drawings]

Figure 1 is a recording system block diagram showing an embodiment of the present invention.
The figure shows an example of the waveform of the bi-phase mark public opinion signal, Fig. 5 is a block diagram showing an example of Ichisakaki construction of the distribution amplifier, Fig. 4 is the timing chart of the main signal σ1 of the periodic bone system, and Fig. 51 is the A
Figure 6 is a gate signal generation timing chart, Figure 7 is a timing chart of the control signal in A person recording/playback mode, and Figure 8 is a
Figure 9 is a diagram showing an example of the recording burn of the index signal, Figure 10 is a block diagram of the playback system showing an embodiment of the misfire generator, Figure 11 is the index signal output diagram. FIG. 12 is a block diagram showing seven examples of the structure of a signal detection circuit, FIG. 12 is a block diagram showing an after-recording system for an INTEX signal, and FIG. 16 is a diagram showing a data format of a time-base compressed PCM signal. Explanation of symbols 11...Analog-digital converter, 12α
...Recording PGM processor, 124...
... Recycled yarn PCM processor, 13 ... Memory, 14 ... Gate generation circuit, 15 ...
...Clock generation circuit, 16...Intex signal changeover switch,
17... 1A frequency divider, 18... Timer circuit, 19... Index signal control switch, 24... Mode changeover switch, 25
...6-phase 8W50 generation circuit, 26...
Select 00 path, 27...Inverter 28.29
．． 31...and gate, 50...or gate, 44...squelch circuit, things...
...Mute circuit, 52...Digital-to-analog converter, 56.
...System controller, 57...Intex detection circuit, 58...Window circuit, 59...Limiter, 60.62...
...and gate, 61...inverter 63, ...96. Rising edge detection circuit, 64...
...Reference value generation circuit, 65...Counter, 66...Comparator, 67...Decoder. 68... Index dubbing control,
69... Index signal changeover switch,
70.71...1/2 frequency divider, 72...
-AND gate, 73a, 734...recording/reproduction switching circuit.

Claims (1)

[Claims] 1. A recording track formed by helical scanning is divided into two in the longitudinal direction of the track, a video signal is recorded on the first divided track, and at least a video signal is recorded on the second track. means for recording a time axis compressed PCM audio signal;
The video signal recording track is divided into a plurality of tracks, and at least a time-axis compressed PCM audio signal having the same recording format as the time-axis compressed PCM audio signal recorded on the second track is recorded on each of the divided tracks. In the information recording and reproducing apparatus, each of the plurality of divided tracks includes at least a time axis compressed PCM.
When recording an audio signal, the divided track is further divided into at least two areas in the longitudinal direction of the track, and the time axis compression PC is applied to the first divided area.
M audio signal is recorded and the above-mentioned time axis compression PC is recorded in the second area.
An index signal related to the M audio signal is recorded, the index signal is detected by high-speed search playback during playback, and the tape is run to a point where a predetermined audio signal is recorded according to the information of the detected index signal. An information recording and reproducing device characterized by: 2. The information recording and reproducing apparatus according to claim 1, wherein the time-base compressed PCM audio signal is composed of a plurality of blocks, each of which has an address signal. 3. At the same time as reproducing the audio signal, the address signal is detected, a recording area for the index signal is determined based on the address information, and only the index signal is subsequently recorded. The information recording/reproducing device described in the first or second scope.