JPS6257114B2 - - Google Patents
Info
- Publication number
- JPS6257114B2 JPS6257114B2 JP54164759A JP16475979A JPS6257114B2 JP S6257114 B2 JPS6257114 B2 JP S6257114B2 JP 54164759 A JP54164759 A JP 54164759A JP 16475979 A JP16475979 A JP 16475979A JP S6257114 B2 JPS6257114 B2 JP S6257114B2
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- photosensitive resin
- lower electrode
- silicon monoxide
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 claims description 34
- 239000011347 resin Substances 0.000 claims description 32
- 229920005989 resin Polymers 0.000 claims description 32
- 239000010409 thin film Substances 0.000 claims description 32
- 239000010408 film Substances 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 230000001590 oxidative effect Effects 0.000 claims description 2
- 238000000034 method Methods 0.000 description 10
- 238000007740 vapor deposition Methods 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 239000002887 superconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/01—Manufacture or treatment
- H10N60/0912—Manufacture or treatment of Josephson-effect devices
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Description
【発明の詳細な説明】
本発明はジヨゼフソン接合素子の作製法に関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for making a Josephson junction device.
近年、ジヨゼフソン接合素子をメモリ素子とし
て利用することが提案され、例えば特公昭51−
31156号、特公昭53−24278号公報に記載されてい
る。これらの従来のジヨゼフソン接合素子は、第
1図に示すように、基板1上に設けられた下部電
極2と上部電極4との間に数nmの酸化膜3を絶
縁層として挾んだ、サンドイツチ型の非平坦構造
を持つていた。このような断面構造を持つ接合素
子は、パターンを微細化した場合に、段差がある
ために接合部を一様に形成することが難しく、こ
の影響によつてトンネル抵抗にばらつきが生じ
て、動作マージンが低下する原因となつていた。 In recent years, it has been proposed to use Josefson junction devices as memory devices, for example,
It is described in No. 31156 and Japanese Patent Publication No. 53-24278. As shown in FIG. 1, these conventional Josefson junction devices are composed of a sandwich film in which an oxide film 3 of several nanometers is sandwiched as an insulating layer between a lower electrode 2 and an upper electrode 4 provided on a substrate 1. The type had a non-flat structure. In a junction element with such a cross-sectional structure, when the pattern is miniaturized, it is difficult to form a uniform junction because of the step difference, and this effect causes variations in tunnel resistance, resulting in poor operation. This was causing margins to decline.
第1図に示す非平坦構造はジヨゼフソン接合素
子の動作のために必要なものではなく、上下の電
極2および4が超電導材料で形成されなければな
らず、超電導材料が高温度に曝らされると容易に
酸化して、当初の性質を失うので、半導体装置の
製造等で普通に使用されている蒸着によつて電極
や配線を形成することができないことに基因して
いる。 The non-planar structure shown in Figure 1 is not necessary for the operation of the Josefson junction device, as the upper and lower electrodes 2 and 4 must be made of superconducting material, which is exposed to high temperatures. This is due to the fact that electrodes and wiring cannot be formed by vapor deposition, which is commonly used in the manufacture of semiconductor devices, because it easily oxidizes and loses its original properties.
本発明の目的は、したがつて、常温における蒸
着によつて、しかも時差を持つていないジヨゼフ
ソン接合素子の作製法を提供することである。 It is therefore an object of the present invention to provide a method for producing Josephson junction elements by vapor deposition at room temperature and without time differences.
上記目的を達成するために、本発明によるジヨ
ゼフソン接合素子の作製法は、基板の一表面に下
部電極となる超伝導材料から成る第1の薄膜を全
面蒸着する工程と、上記第1の薄膜上に所定の下
部電極の形の第1の感光性樹脂のパターンを形成
する工程と、上記感光性樹脂のパターンをマスク
として、上記第1の薄膜の感光性樹脂に覆れない
部分を除去して下部電極を形成する工程と、上記
下部電極上の感光性樹脂を残したまま、全面に一
酸化硅素の薄膜を室温で上記下部電極と実質上同
じ高さに蒸着する工程と、上記残留している感光
性樹脂を溶解することによつて、上記下部電極上
の一酸化硅素の薄膜を除去する工程と、以上の工
程によつて得られる下部電極と一酸化硅素の薄膜
の実質上平坦な表面上に所定の上部電極の形の空
所を持つた第2の感光性樹脂のパターンを形成す
る工程と、上記第2の感光性樹脂のパターンをマ
スクとして上記下部電極の表面を酸化し、酸化膜
を形成する工程と、上部電極となる超伝導材料か
ら成る第2の薄膜を上記第2の感光性樹脂のパタ
ーン、上記酸化膜および一酸化硅素の薄膜表面全
面に形成する工程と、上記第2の感光性樹脂のパ
ターンを溶解することによつて、その上にある第
2の薄膜の部分を除去し、上部電極を形成する工
程とから成ることを要旨とする。 In order to achieve the above object, the method for manufacturing a Josephson junction device according to the present invention includes the steps of: depositing a first thin film made of a superconducting material, which will become a lower electrode, on one surface of a substrate; forming a first photosensitive resin pattern in the shape of a predetermined lower electrode; and using the photosensitive resin pattern as a mask, removing a portion of the first thin film that cannot be covered with the photosensitive resin. forming a lower electrode, depositing a thin film of silicon monoxide on the entire surface at room temperature to substantially the same height as the lower electrode while leaving the photosensitive resin on the lower electrode; a step of removing the silicon monoxide thin film on the lower electrode by dissolving the photosensitive resin containing the silicon monoxide; and a substantially flat surface of the lower electrode and the silicon monoxide thin film obtained by the above steps. forming a second photosensitive resin pattern having a cavity in the shape of a predetermined upper electrode thereon; and oxidizing the surface of the lower electrode using the second photosensitive resin pattern as a mask; a step of forming a second thin film made of a superconducting material to serve as an upper electrode on the entire surface of the second photosensitive resin pattern, the oxide film and the silicon monoxide thin film; The method consists of the step of dissolving the second photosensitive resin pattern, removing the second thin film portion thereon, and forming an upper electrode.
以下に、附図を参照しながら、実施例を用いて
本発明を一層詳しく説明するけれども、これらは
例示に過ぎず、本発明の枠を越えることなく、い
ろいろな変形や改良があり得ることは勿論であ
る。 The present invention will be explained in more detail below using examples with reference to the accompanying drawings, but these are merely illustrative, and it goes without saying that various modifications and improvements may be made without going beyond the scope of the present invention. It is.
第2図は本発明の方法によつて作製されたジヨ
ゼフソン接合素子の断面図で、第3図は本発明に
よる方法を断面図で工程順に示す。 FIG. 2 is a cross-sectional view of a Josephson junction device manufactured by the method of the present invention, and FIG. 3 is a cross-sectional view showing the method of the present invention in the order of steps.
まず、基板1の一表面上に、例えば金2重量
%、インジウム8重量%、鉛90重量%のような下
部電極となる超伝導材料から成る第1の薄膜2′
を全面蒸着する(A)。その第1の薄膜2′の上に、
例えばホトレジスト(AZ1350J)のような感光性
樹脂を塗布し、公知の方法で所定の下部電極の形
で第1の感光性樹脂のパターン6を形成する(B)。
この第1の感光性樹脂のパターン6をマスクとし
て、イオンミーリングによつて、第1の薄膜2′
を下部電極2に形成する。このとき、第1の感光
性樹脂のパターン6もまた薄くなるが、除去しよ
うとする第1の薄膜2′の部分が完全になくなつ
た後にも第1の感光性樹脂のパターン6の一部が
下部電極2の上に残留するような厚さに感光性樹
脂を塗布しておく(C)。下部電極2の上の感光性樹
脂を残したまま、下部電極2の膜厚と同じ高さに
一酸化硅素SiOの薄膜5を室温で全面蒸着する
(D)。ついで、下部電極2の上に残留していた感光
性樹脂をアセトン等の溶媒の中で溶解除去すれ
ば、一酸化硅素の薄膜5のうち下部電極2の上に
ある部分は取り除かれる(E)。以上の工程によつて
得られる下部電極と一酸化硅素の薄膜の実質上平
坦な表面上に所定の上部電極の形の空所を持つ
た、第2の感光性樹脂のパターン7を形成する
(F)。この第2の感光性樹脂のパターンをマスクと
して、下部電極2表面の露出した部分をアルゴ
ン・ガスを用いた高周波スパツタリングによつて
綺麗にし、ついで酸素ガスを用いた高周波プラズ
マ酸化法によつてその部分を酸化し、数nmの厚
さに酸化膜3を形成し、絶縁層とする(G)。つい
で、例えば金数%、残部鉛のような上部電極とな
る超伝導材料から成る第2の薄膜4′および4を
第2の感光性樹脂のパターン7、酸化膜3、およ
び一酸化硅素の薄膜5の表面全面に室温で蒸着に
よつて形成する(H)。最後に、一酸化硅素の薄膜5
の形成の際と同様に、溶媒を用いて第2の感光性
樹脂のパターン7を溶解除去すれば、第2の薄膜
のうち不用の部分のみが取り除かれ、上部電極4
が形成され、第2図に示すジヨゼフソン接合素子
が得られる。 First, on one surface of the substrate 1, a first thin film 2' made of a superconducting material that will become the lower electrode, such as 2% by weight gold, 8% by weight indium, and 90% by weight lead.
is deposited on the entire surface (A). On the first thin film 2',
For example, a photosensitive resin such as photoresist (AZ1350J) is applied, and a first photosensitive resin pattern 6 in the form of a predetermined lower electrode is formed by a known method (B).
Using this first photosensitive resin pattern 6 as a mask, the first thin film 2' is formed by ion milling.
is formed on the lower electrode 2. At this time, the first photosensitive resin pattern 6 also becomes thinner, but even after the part of the first thin film 2' to be removed has completely disappeared, a part of the first photosensitive resin pattern 6 still remains. A photosensitive resin is applied to a thickness such that it remains on the lower electrode 2 (C). While leaving the photosensitive resin on the lower electrode 2, a thin film 5 of silicon monoxide SiO is deposited on the entire surface at room temperature to the same height as the film thickness of the lower electrode 2.
(D). Next, by dissolving and removing the photosensitive resin remaining on the lower electrode 2 in a solvent such as acetone, the portion of the silicon monoxide thin film 5 on the lower electrode 2 is removed (E). . A second photosensitive resin pattern 7 having a cavity in the shape of a predetermined upper electrode is formed on the substantially flat surface of the lower electrode and silicon monoxide thin film obtained by the above steps.
(F). Using this second photosensitive resin pattern as a mask, the exposed portion of the surface of the lower electrode 2 is cleaned by high frequency sputtering using argon gas, and then cleaned by high frequency plasma oxidation using oxygen gas. The portion is oxidized to form an oxide film 3 with a thickness of several nanometers, which is used as an insulating layer (G). Next, the second thin films 4' and 4 made of a superconducting material that will serve as the upper electrode, such as a few percent gold and the balance lead, are coated with a second photosensitive resin pattern 7, an oxide film 3, and a silicon monoxide thin film. Formed on the entire surface of No. 5 by vapor deposition at room temperature (H). Finally, a thin film of silicon monoxide 5
If the pattern 7 of the second photosensitive resin is dissolved and removed using a solvent in the same manner as in the formation of the upper electrode 4, only the unnecessary portion of the second thin film is removed.
is formed, and the Josephson junction element shown in FIG. 2 is obtained.
本発明の方法によつて作製したジヨゼフソン接
合素子は冒頭に述べた従来のジヨゼフソン接合素
子に存在した段差を持つていないので、ドンネル
抵抗のばらつきが小さいという利点を持つてい
る。本発明の方法によつて、パターン幅2μmの
ジヨゼフソン接合素子を作製したところ、従来の
素子に較べて、トンネル抵抗のばらつきは殆んど
なくなり、動作マージンを大幅に向上することが
できた。 The Josephson junction device manufactured by the method of the present invention does not have the step difference that existed in the conventional Josephson junction device mentioned at the beginning, and therefore has the advantage that the variation in Donnell resistance is small. When a Josefson junction device with a pattern width of 2 μm was manufactured using the method of the present invention, the variation in tunnel resistance was almost eliminated and the operating margin was significantly improved compared to conventional devices.
第1図は従来のジヨゼフソン接合素子の断面
図、第2図は本発明の方法によつて作製したジヨ
ゼフソン接合素子の断面図、第3図は本発明の方
法の工程を示す断面図である。
1……基板、2……下部電極、3……酸化膜、
4……上部電極、5……一酸化硅素の薄膜、6…
…第1の感光性樹脂のパターン、7……第2の感
光性樹脂のパターン、2′……下部電極となる超
伝導材料から成る第1の薄膜、4′……上部電極
となる超伝導材料から成る第2の薄膜のうち第2
の感光性樹脂のパターンの上にある部分。
FIG. 1 is a cross-sectional view of a conventional Josephson junction device, FIG. 2 is a cross-sectional view of a Josephson junction device manufactured by the method of the present invention, and FIG. 3 is a cross-sectional view showing the steps of the method of the present invention. 1... Substrate, 2... Lower electrode, 3... Oxide film,
4... Upper electrode, 5... Thin film of silicon monoxide, 6...
...First photosensitive resin pattern, 7... Second photosensitive resin pattern, 2'... First thin film made of superconducting material that will become the lower electrode, 4'... Superconductor that will become the upper electrode The second thin film of the material
The part above the photopolymer pattern.
Claims (1)
ら成る第1の薄膜を全面蒸着する工程と、上記第
1の薄膜上に所定の下部電極の形の第1の感光性
樹脂のパターンを形成する工程と、上記感光性樹
脂のパターンをマスクとして、上記第1の薄膜の
感光性樹脂に覆れない部分を除去して下部電極を
形成する工程と、上記下部電極上の感光性樹脂を
残したまま、全面に一酸化硅素の薄膜を室温で上
記下部電極と実質上同じ高さに蒸着する工程と、
上記残留している感光性樹脂を溶解することによ
つて、上記下部電極上の一酸化硅素の薄膜を除去
する工程と、以上の工程によつて得られる下部電
極と一酸化硅素の薄膜の実質上平坦な表面上に所
定の上部電極の形の空所を持つた第2の感光性樹
脂のパターンを形成する工程と、上記第2の感光
性樹脂のパターンをマスクとして上記下部電極の
表面を酸化し、酸化膜を形成する工程と、上部電
極となる超伝導材料から成る第2の薄膜を上記第
2の感光性樹脂のパターン、上記酸化膜、および
一酸化硅素の薄膜表面全面に形成する工程と、上
記第2の感光性樹脂のパターンを溶解することに
よつて、その上にある第2の薄膜の部分を除去
し、上部電極を形成する工程とから成ることを特
徴とする、ジヨゼフソン接合素子の作製法。1. A step of entirely vapor-depositing a first thin film made of a superconducting material that will become a lower electrode on one surface of the substrate, and forming a pattern of a first photosensitive resin in the shape of a predetermined lower electrode on the first thin film. a step of forming a lower electrode by removing a portion of the first thin film that cannot be covered with the photosensitive resin using the pattern of the photosensitive resin as a mask; and a step of forming a lower electrode by leaving the photosensitive resin on the lower electrode. depositing a thin film of silicon monoxide on the entire surface at room temperature to substantially the same height as the lower electrode;
a step of removing the thin film of silicon monoxide on the lower electrode by dissolving the remaining photosensitive resin; and a step of removing the thin film of silicon monoxide on the lower electrode and the thin film of silicon monoxide obtained by the above steps. forming a second photosensitive resin pattern having a cavity in the shape of a predetermined upper electrode on the upper flat surface; and using the second photosensitive resin pattern as a mask to cover the surface of the lower electrode. A step of oxidizing to form an oxide film, and forming a second thin film made of a superconducting material to serve as an upper electrode on the entire surface of the second photosensitive resin pattern, the oxide film, and the silicon monoxide thin film. and a step of removing a portion of the second thin film thereon by dissolving the second photosensitive resin pattern to form an upper electrode. Manufacturing method of bonding element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16475979A JPS5688384A (en) | 1979-12-20 | 1979-12-20 | Manufacture of josephson junction element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16475979A JPS5688384A (en) | 1979-12-20 | 1979-12-20 | Manufacture of josephson junction element |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5688384A JPS5688384A (en) | 1981-07-17 |
JPS6257114B2 true JPS6257114B2 (en) | 1987-11-30 |
Family
ID=15799378
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16475979A Granted JPS5688384A (en) | 1979-12-20 | 1979-12-20 | Manufacture of josephson junction element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5688384A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20220124913A (en) * | 2021-03-04 | 2022-09-14 | 한양대학교 에리카산학협력단 | Device for Converting Energy |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4418095A (en) * | 1982-03-26 | 1983-11-29 | Sperry Corporation | Method of making planarized Josephson junction devices |
JPS58209184A (en) * | 1982-05-31 | 1983-12-06 | Nec Corp | Manufacture of josephson junction element |
-
1979
- 1979-12-20 JP JP16475979A patent/JPS5688384A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20220124913A (en) * | 2021-03-04 | 2022-09-14 | 한양대학교 에리카산학협력단 | Device for Converting Energy |
Also Published As
Publication number | Publication date |
---|---|
JPS5688384A (en) | 1981-07-17 |
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