JPS6253037A - Variable speed communication system - Google Patents

Abstract

PURPOSE:To change the transmission speed of information by applying speed conversion to input information into a high speed signal at a constant speed, applying primary modulation to the high speed signal by a predetermined code series and secondary modulation to the result by a modulator so as to sent the modulated result. CONSTITUTION:A data inputted from an input terminal 100 is converted into a data string outputted at a prescribed speed by a speed conversion circuit 10. Then the output of the circuit 10 is given to an M-series generator 12 gener ating an M-series being a predetermined code series and multiplied by a multi plier circuit 11 applying primary modulation. Further,the output of the circuit 11 is modulated by a modulator 13 applying the secondary modulation and the result is outputted from an antenna 101. A base band signal demodulated by a demodulate 20 is converted into a digital signal by an A/D converter 21 and the primary modulation of the M-series is demodulated by a digital multiplier 22,the information rate is added by an adder 23 and the decision output is obtained from a terminal 103.

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention changes the information transmission speed according to the size of the earth station when earth stations of various sizes are accommodated in the same satellite communication network. Related to variable speed communication system.

(Prior Art) In satellite communications, a large number of earth stations communicate with each other, and a plurality of earth stations simultaneously use a satellite. In the conventional frequency division multiple access method used to receive signals from multiple stations, it was necessary to prepare a demodulator for each station, making the equipment large. . In contrast, time division multiplexing
In the access method, signals from all stations can be received with a single demodulator, so the advantage is that the equipment size can be small.

However, in the time division multiple access system, all stations must transmit signals at the same speed.
Small earth stations with small antennas had the disadvantage of not being able to communicate because they did not have enough transmission power. (Problems to be solved by the invention) The present invention eliminates the drawbacks of the conventional TDMA system using earthen embankments, and enables communication with earth stations with different antenna sizes using a single modulator/demodulator. The purpose is to provide a variable speed communication system.

(Means for Solving the Problems) In the present invention, input information is speed-converted into a high-speed signal at a constant speed, the high-speed signal is firstly modulated with a predetermined code sequence, and then a modulator is used to secondly modulate the high-speed signal. It is modulated and transmitted, and on the receiving side, a demodulator demodulates the secondary modulation and converts it to a baseband signal, samples the baseband signal, converts it to a digital signal, and then inversely modulates it with the code sequence to increase the information rate. The above-mentioned problem is solved by a variable speed communication system characterized by making a determination.

(Function) Generally, in order to realize a modulator/demodulator that transmits information at different speeds, a waveform shaping circuit and a synchronization circuit require filters having different bands, and a plurality of circuits are required. In the present invention, speed conversion is performed in the baseband corresponding to the information transmission speed, and the input speed to the modem is kept constant before transmission. By doing this, the modulator/demodulator always operates at a constant speed and can be implemented with the same device.

On the receiving side, information is decoded from the demodulator output. In that case, the output of the speed conversion circuit on the transmitting side is modulated with a pseudo-random sequence so that the modulated signal has a certain band and the synchronization of information bits is easy, and the output of the demodulator on the receiving side is kept constant. Transmitted information can be determined by sampling the signal periodically, converting it into a digital signal using a zero converter, demodulating it with a pseudo-random sequence, and performing integral detection. Since modulation, demodulation, and integral detection using such a pseudo-random sequence can all be realized by digital processing, it is possible to cope with changes in the information transmission rate.

(Embodiment) FIG. 1 is a diagram showing an embodiment of a transmitter and a receiver for implementing the present invention. Data input from the input terminal 100 is converted by the speed conversion circuit 10 into a data string that is output at a constant speed (hereinafter referred to as a chip rate). This speed conversion circuit simply reads information using a high-speed clock. For example, when the information rate is 115 of the chip rate, for an input of (1, 0), (1, 1, 1,
1, 1, 0, 0, 0, 0, 0). The output of this speed conversion circuit 10 is an M-sequence generator 5 that generates an M-sequence that is a predetermined code sequence.
12 and a multiplication circuit 11 that performs -order modulation.

The multiplication circuit 11 is realized by an exclusive OR circuit. The output of the multiplier circuit 11 is modulated by a modulator 13 that performs secondary modulation and output from the antenna 101. In this case what 2
Whether the next modulation method is adopted is not particularly related to the purpose of the present invention, so a detailed explanation will be omitted, but any modulation method may be used.

Next, the operation of the receiver will be explained.

The signal received from antenna 102 is demodulated at demodulation 520, which demodulates the secondary modulated signal. The demodulated baseband signal is converted into a digital signal by D conversion 521, and the M-sequence primary modulation is demodulated by digital multiplier 22, and added! At 23, the information rates are added and a judgment output is obtained from the terminal 103. In this case carrier synchronization,
It is necessary to achieve chip timing synchronization and M-sequence synchronization. The frame structure for synchronizing these is shown in FIG. 2(a).

Carrier synchronization and clock synchronization are achieved within the demodulator 20 in the Carrier and C1ock sections. Thereafter, an M sequence is sent for synchronizing the M sequence and synchronizing the information bits. Using this M sequence, the initial synchronization circuit 25 synchronizes the phase of the M sequence and the phase of the data symbol, resets the subsequent M sequence generator 24 and counter 26, and determines the addition phase of the adder 23. (b)
Waveforms at each part of this embodiment are shown below. Figure 2(b)
is the output of the speed conversion circuit 10, and the signal changes slowly. FIG. 2(C) shows the M sequence, and FIG. 2(d) shows the output of the multiplier 11. This waveform is transmitted through a modulator and the demodulated baseband waveform is as shown in FIG. 2(e). In FIG. 2(e), the waveform is degraded due to band limitation and noise. The waveform sampled at the arrow position and converted to 0 is shown in Figure 2 (O). At the chip rate, errors occur at T1 and T2. Furthermore, Figure 2 (G
) shows the contents of the adder 23. When the waveforms of Figure 2 (O) are added for the information symbols, the polarity of each is as shown in Figure 2 (
b) can be determined to be the same as Tl, T
It can be seen that the error in 2 does not affect the judgment of information symbols. This is an effect of integrating the energy of 6 chips in the adder 23. Although the noise in each chip can be considered independent, the signal energy is the same for all chips, so Figure 2 (
In case b), by adding 6 chips in the adder 23, the signal-to-noise ratio can be improved by 6 times, making it possible to communicate even with a small earth station. If the earth station has only a smaller antenna and the signal level is even lower, the transmission cycle of the information signal shown in FIG. 2(b) is made longer. For example, if the waveform shown in FIG. 2(b) is transmitted at twice the period and the addition time in addition 523 is increased to 12 chips, the signal-to-noise ratio can be improved by a factor of 12.

This addition time can be changed very easily since it is only necessary to change the count number of the counter 26.

(Effects of the Invention) As described in detail above, according to the present invention, it is possible to provide a variable speed communication system in which even if the information transmission speed is changed, the information can be easily demodulated using the same modulation/demodulation device.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the present invention, and FIGS. 2(a) to (g) are diagrams showing the operation of the present invention. In the figure, 10 is a speed conversion circuit, 11 is a primary modulator, 12 is a secondary modulator, 20 is a secondary demodulator, 22 is a primary demodulator, and 23 is a determination circuit. Figure 1 Figure 2

Claims (1)

[Claims] Converts the input information into a high-speed signal with a constant speed,
After primary modulating the high-speed signal with a predetermined code sequence, a modulator performs secondary modulation and transmits it, and on the receiving side, a demodulator demodulates the secondary modulation and converts it to a baseband signal, and the baseband signal is converted to a baseband signal. A variable speed communication system characterized by sampling a signal, converting it into a digital signal, inversely modulating it with the code sequence, demodulating the primary modulation, and making a determination based on the information rate.