JPS6251056A - Recording speed discriminator - Google Patents

Abstract

PURPOSE:To discriminate exactly a recording speed by making the second reference pilot signal same in frequency as a pilot signal shifted by one track against the first reference pilot signal and discriminating the recording speed by the change of the period of a difference frequency signal obtained in the generating period of the second reference signal. CONSTITUTION:By inserting an inverter 17 and a change-over switch 18 and making even the polarities of difference frequency signal detecting components inputted to a gate 11, a tracking error signal 400 is generated. The second reference pilot signal the same in frequency as the pilot signal shifted by one track against the first reference pilot signal is generated time-divisionally. A gate circuit 12 is opened by a gate signal 600 corresponding to the generating section of the second reference pilot signal and makes pass a difference detecting output of fH outputted from a detector 8, sending it to a waveform arranging circuit 15. During a section where the gate circuit 12 is closed, a value held by a hold circuit 14 is sent to the waveform arranging circuit 15 and the waveform arranging circuit 15 arranges the waveform of an inputted signal, outputting it to a recording speed discriminating circuit 16.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an automatic recording speed determination device for a magnetic recording/reproducing device that performs tracking control using a pilot signal.

[Technical Background of the Invention] Rotating head type magnetic recording/reproducing device @ (hereinafter referred to as VTR)
As a tracking control system that
The pilot signal described in No. 31,795 entitled "Method and Apparatus for Position Control of Write and Read Heads" is well known. However, when this method is used, various methods have been considered to determine the recording speed since the conventional method of determining the recording speed using a control signal cannot be used.

Here, a known example of the above method that is closest to the present invention will be explained below using the drawings. FIGS. 6 and 7 are tape pattern examples and multiplier output examples for explaining the recording speed determination method using the conventional pilot system. As shown in Fig. 6, pilot signals f1 to f4 are recorded on the tape, and each of them is set to fl (6,5ft+>
, f2 (7,5fH), f3 (10,5fH),
f4 (9,5ft+>.Fll represents the horizontal scanning frequency.As shown in Fig. 6, when scanning one track, the first
There are provided a section a in which a reference pilot signal of 1 is generated during reproduction, and a section a in which a second reference pilot signal used for determining the recording speed during reproduction is generated.

Figure 7 shows the pilot signal recorded on the track being scanned ((A) in the same figure), the first and second reference pilot signals ((B) and (D) in the same figure), and the multiplier. The difference frequency signal ((C) and (D) in the same figure) which is the multiplier output when given is shown. In this figure, in the section of the first reference pilot signal used for tracking control shown in (B) of the same figure, the pilot signals of the left and right adjacent tracks and this first reference pilot signal are shown in (C) of the same figure. Like 3
A difference frequency signal of fH1f11 is generated, and tracking control is performed using this difference frequency signal. On the other hand, the same figure (
The second reference pilot signal shown in D> is supplied in a form shifted by 11-racks from the first reference pilot signal,
Therefore, the difference frequency between the left and right adjacent pilot signals of 1 to 5 racks, which are output from the multiplier, and this second reference pilot signal is <0f11.2fl+, 4fl, as shown in FIG.
+, and if the recording speed and reproduction speed match the pilot signal of the track being scanned, fH will be constantly generated.

FIG. 8 shows an example of a conventional circuit block diagram that performs the above operation. Regenerated RF signal @1 regenerated by the head
00 is converted into only a pilot signal component by a band pass filter (BPF) 1 and is input to an 1I)0 unit 2.

On the other hand, this multiplier 2 receives a first signal obtained from a pilot signal oscillator 3 through a low-pass filter (L, P, F) 4.
, second reference pilot signals 201 and 202 are input. Here, the reference pilot signal 2 supplied to the multiplier 2
01.202 is 5.95MHz (NTSC system)
During recording, the clock 301 is automatically set to fl in response to the head switching signal 300.

f2. f3. f4. The frequency is divided in the order of fl and sent to a recording amplifier system (not shown), and during reproduction, f1 to f4 can be selected from the outside by a reproduction reference pilot signal selection signal 302. I)n? The difference frequency signal outputted by 52 is passed through a bandpass filter 6 that passes only the frequency fll.
and a bandpass filter 7 that passes only the frequency 3fH.
Only the components of the difference frequencies fll and 3fll are extracted, each detected by a detection circuit (DET) 8.9, and then input to the differential amplifier 10. The differential amplifier 1G supplies the difference component between the two power inputs to the gate circuits 11 and 12. The goo 1-circuit 11 is open in the first reference pilot signal generation section a in FIG. 6, and closed in the section a. The gate circuit 12 is open during the second reference pilot signal generation section and closed during the other sections. Therefore, only the signal component used as the tracking control signal from the gate circuit 11 is output as the tracking control signal 400 through the hold circuit 14, and this gate circuit 11
While closed, the value held by the hold circuit 13 is output as a tracking control signal @400. Further, the gate circuit 12 allows only the component used for recording speed determination to pass through the hold circuit 14 to the waveform shaping circuit 15, and while the gate circuit 12 is closed, the value held by the hold circuit 14 is transmitted to the waveform shaping circuit 15. 1
5. The waveform shaping circuit 15 shapes the waveform of the input signal and then outputs it to the recording speed determination circuit 16. The recording speed determination circuit 16 determines the recording speed based on the level of the input signal, and outputs a mode determination signal 500. Note that a gate signal 700 is supplied to the gate circuit 11 to open and close the gate.
2 is supplied with a gate signal 600 to open and close this gate.

[Problems with the Background Art] In the recording speed determination method using the conventional pilot method as described above, the generation sequence of the reproduction reference pilot signal is different from that during recording, so a polarity inversion circuit is not required. However, from the pilot signal recorded on the track being scanned, as shown in Fig. 7(E), 2
A difference frequency signal of f11 is generated, which deteriorates the S/N ratio with respect to the difference frequency signal of f33ftl shown in FIG. 7(C) used for tracking control, which has the drawback of making tracking control unstable.

[Object of the Invention] In view of the above drawbacks, an object of the present invention is to provide a recording speed discrimination circuit that can reliably discriminate the recording speed without impairing the stability of the 1-to-racking control using the pilot signal method. There is a particular thing.

[Summary of the Invention] The present invention provides a method for obtaining a tracking control signal from a plurality of pilot signals, and in which first and second reference pilot signals generated in a time-division manner in a regenerated pilot signal are: A difference frequency signal obtained by 1q from the first reference pilot signal is used for tracking control, a difference frequency signal obtained from the second reference pilot signal is used for recording speed determination, and the first reference pilot signal is used for tracking control. The second reference pilot signal is a signal with the same frequency as the pilot signal recorded on the track, and the second reference pilot signal is a signal with the same frequency as the pilot signal that is shifted by one track with respect to the first reference pilot signal. The above object is achieved by determining the recording speed based on the change in the period of the difference frequency signal obtained during the generation period.

[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described with reference to the drawings, in which the same parts as those of the conventional example are denoted by the same reference numerals. FIG. 1 is a block diagram showing an embodiment of the recording speed determination device of the present invention.

Only a pilot signal component is extracted by a bandpass filter 1 from a reproduced RF signal 100 reproduced by the head and inputted to a multiplier 2. First and second reference signals 201 and 202 supplied from a pilot signal oscillator 3 through a low-pass filter 4 are input to the 1t)s unit 2.

The pilot signal oscillator 3 is supplied with a 5.95 MH2 clock 301, a head switching signal 300, and a pilot signal select signal 302. I) From the difference frequency signal outputted from the calculator 2, a pilot signal of fH is extracted by a bandpass filter 6 with an extraction frequency fH, and is inputted to a detection circuit 8, where the signal is detected and then sent to the negative input of a differential amplifier 10. It is supplied to the terminal and gate circuit 12. Also,! ) From the difference frequency signal output from the calculator 2, a 3fH pilot signal is extracted by a bandpass filter 7 with an extraction frequency of 3fH and inputted to the detection circuit 9, where it is detected and then sent to the positive input terminal of the differential amplifier 10. is input. Differential amplifier 1
0 amplifies the input signal component and sends it directly to the terminal a of the switch 18 which is switched to the terminal a by the head switching pulse 300, and the inverter 17 to the terminal.
Output via . The difference signal component with uniform polarity obtained from the movable terminal C of the switch 18 is sent to the hold circuit 14 only in the first reference pilot signal generation period by the gate circuit 11.
The tracking error signal @400 is passed through as it is and is supplied to the capstan motor drive circuit (not shown) in the next stage, and the section where the gate circuit 11 is closed is sent to the hold circuit 1.
The value held by 3 is the tracking error signal 4
It is also output as 00 to the capstan motor drive circuit at the next stage. The detected output of the fH pilot signal output from the detection circuit 8 is outputted to the waveform shaping circuit 15 by the gate 12 through the hold circuit 13 only in the second reference signal generation period, and this gate circuit 12 is closed. In the interval, the held value is supplied by the hold circuit 13 to the waveform shaping circuit 15. The waveform shaping circuit 15 shapes the waveform of the input signal and then passes the waveform to the recording speed determination circuit 16.
Output to. The recording speed determination circuit 16 determines the recording speed from the periodic change of the input signal, and outputs a recording speed mode determination signal 500. A gate signal 700 is supplied to the gate circuit 11 to open and close the gate, and a gate signal @600 is supplied to the gate circuit 12 to open and close the gate.

Next, the operation of this embodiment will be explained in more detail. The first reference pilot signal supplied to the multiplier 2 is shown in FIG.
A>, and the second reference pilot signal is as shown in FIG. 2(B), which is different from the conventional example.

Therefore, the difference frequency signals output from the multiplier 2 become as shown in FIGS. 2(C) and 2(E), respectively. That is, Fig. 2 (E
), in the second reference pilot signal generation section, the fH13fl+ signal is alternately output as the difference frequency signal. Further, as shown in FIG. 2C, in the first reference pilot signal generation section, the difference frequency output from the multiplier 2 is output with the polarities of fH and 3f11 switched for each track. For this reason, as shown in FIG. 1, in this example, an inverter 11 and a changeover switch 18 are inserted to set the polarity of the difference frequency signal detected component input to the gate 11 to 1, thereby generating the conventional tracking error signal 400. is creating. On the other hand, in the second reference pilot signal period, as shown in FIG. 2(E), fll, 3fH, and fH are alternately generated as the outputs of the multiplier 2 with the scanning pilot signal. Looking at the fH multiplied signal here, there is an output depending on the width of the track being scanned, an output depending on crosstalk, no output at all, an output depending on crosstalk, and an output depending on the track width. The gate circuit 12 is opened by a gate signal 600 corresponding to the second reference pilot signal generation section, passes the fH differential frequency signal detection output output from the detection circuit 8, and sends it to the waveform shaping circuit 15. During the period in which the gate circuit 12 is closed, the value held by the hold circuit 14 is sent to the waveform shaping circuit 15. The waveform shaping circuit 15 shapes the waveform of the input signal and outputs it to the recording speed determination circuit 16.

FIG. 3 is a timing chart showing signal waveforms of each part in the above operation. Figure 3 (A) shows a head switching signal that indicates the polarity of the head, and (B) shows an example of a signal that selects a reference pilot signal. This signal has the function of shifting the switching timing of the pilot signal, and The part that has been removed becomes the second reference pilot signal section A, and the remaining part becomes the first reference pilot signal section start. (C), (D
> is tI)W when the recording speed and playback speed match
2 shows the full difference frequency signal and 3fH difference frequency signal waveforms obtained from the device 2, and (E) shows the gate signal 700 that opens and closes the gate circuit 11. (G) is a tracking error signal 40 that is finally output from the hold circuit 13.
It shows 0. (G) shows the gate signal @600 that opens and closes the gate circuit 12, and (H) shows the output of the hold circuit 14, which is a waveform in which the output according to the track width of fil and the zero output are alternately held. Become. The waveform of the hold circuit 14 is shaped by the waveform shaping circuit 15, resulting in the signal waveform shown in (1). Therefore, the signal indicated by (I) is input to the recording speed determination circuit 16.

Next, based on the recording speed determination signal shown in FIG. 3 (1) created as described above, write the following information. Let's explain the operation for determining speed. FIG. 4 shows examples of various reproduction patterns when tape patterns recorded at two recording speeds are reproduced at the two recording speeds. Here, the LP recording mode (LPREC) indicates a mode in which the recording speed is slow;
PPLAY indicates the case where the tape is played back at the same tape speed as LPREC. Similarly, SP recording mode (SPREC)
) indicates a mode with faster recording speed, and S P PLAYG
, t S P REC and the same tape speed.

Therefore, Fig. 2 (A>, (B)) shows the difference frequency product obtained by reproducing the recorded signal pattern recorded by LPREC by LPPLAY and applying the first and second reference pilot signals to the obtained signal as described above. It is a diagram showing an example of a molecule il, afH difference frequency reproduction pattern. (C) and (D) are fH obtained when a reference signal similar to the above is given to a signal reproduced by 5P PLAY from an LPREC recording signal pattern. , 3fH, and the same applies hereafter.

Note that the solid line indicates the playback head track width of 1 when the playback head track width is LPPLAY.
0.25 μm, 20.5 μm at 5PPLAY, the dashed line is 20.58m15PPL at LPPLAY
This is a schematic drawing of the case where AY is 30 μm. However, when the recording and playback speeds match, only solid lines are drawn.

Figure 5 shows the signal pattern examples shown in Figure 4 above.
A hold circuit 1 holds the signal of the second reference pilot signal section used for speed determination in the recording speed determination circuit 16.
FIG. 3 is a diagram showing an example of output signal pattern No. 3; (A), (
B) is the difference frequency f at 5pREC and 5PPLAY.
The output waveforms of the hold circuit 13 of ll and 3 fil are shown, and (E) and (F) show the output waveforms of the hold circuit 13 of the difference frequency fH13fl during LPREC1LPPLAY. In this case, the tape speeds during recording and playback are the same.

On the other hand, cases C), (D), (G), and (1'') are cases where the tape speeds during recording and playback do not match. For example, focusing on the waveform of the difference frequency f11, if they match, In comparison, the period is irregular. Therefore, the recording speed discrimination circuit 16 can observe the period of the input signal, detect a mismatch between the recording speed and the reproduction speed, and output the recording speed mode discrimination signal 500.

According to this embodiment, li) Since the signal of 2f11 is not included in the difference frequency signal outputted from the calculator 2, the difference frequency signal of fll and 3fH for tracking control is used for recording speed determination. Therefore, the recording speed can be reliably determined while maintaining stable tracking control without degrading N.

[Effects of the Invention] As described above, according to the recording speed determination V7R device of the present invention, there is an effect that recording speed can be reliably determined without impairing the stability of tracking control using the pilot signal method.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the recording speed discrimination device of the present invention, FIG. 2 is a diagram of various signal waveforms for explaining the device shown in FIG. 1, and FIG. 3 is the device shown in FIG. 1. Figure 4 is the output waveform diagram of the multiplier in Figure 1.
FIG. 5 is an output waveform diagram of the hold circuit in FIG. 1, FIG. 6 is a diagram showing an example of a tape pattern, and FIG. 7 is a diagram of various signal waveforms for explaining the operation of a conventional tracking control device and recording speed discrimination device. , FIG. 8 is a block diagram showing an example of a conventional tracking control device and recording speed determining device. 2...l) Calculator, 3...Pilot signal oscillator, 6.7...Band pass filter, 8.9...Detection circuit, 10...Differential amplifier, 12...Gate circuit , 13... Hold circuit 15... Waveform shaping circuit, 16... Recording speed determination circuit. Agent Patent Attorney Ken Nori Chika Hiroshi Uji Figure 6

Claims (1)

[Claims] Tracking control is performed using a difference frequency signal obtained by multiplying a reproduced pilot signal obtained by reproducing a plurality of pilot signals cyclically recorded on tracks on a tape by a first reference pilot signal, and In a video tape recorder that determines the recording speed using a difference frequency signal obtained by multiplying the reproduced pilot signal by a second reference pilot signal, the pilot signal recorded on the track that is under tracking control and Reference signal generating means for time-divisionally generating a first reference pilot signal having the same frequency and a second reference pilot signal having the same frequency as the recording pilot signal shifted by one track with respect to the first reference pilot signal; A recording speed determination device comprising: recording speed determination means for determining the recording speed based on a change in signal period obtained by amplitude detection of a difference frequency signal obtained during a period in which the second reference pilot signal is generated. Device.