JPS6244851B2 - - Google Patents
Info
- Publication number
- JPS6244851B2 JPS6244851B2 JP56149098A JP14909881A JPS6244851B2 JP S6244851 B2 JPS6244851 B2 JP S6244851B2 JP 56149098 A JP56149098 A JP 56149098A JP 14909881 A JP14909881 A JP 14909881A JP S6244851 B2 JPS6244851 B2 JP S6244851B2
- Authority
- JP
- Japan
- Prior art keywords
- resin
- lsi chip
- substrate
- bump
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【発明の詳細な説明】
本発明は半導体装置の製法、特に半導体素子
（主として半導体集積回路素子）の実装に関する
ものであり、その目的とするところは、基板へボ
ンデイングされた不良半導体素子の交換を容易に
行わしめるにある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and in particular to the mounting of semiconductor elements (mainly semiconductor integrated circuit elements), and its purpose is to replace defective semiconductor elements bonded to a substrate. It's easy to do.
従来、例えば液晶セルを構成する、二枚のガラ
ス板の少なくとも一方を延長し、この延長部分に
Lsiチツプを実装したり、或いは各種の回路基板
にLsiチツプがしばしば実装される。この場合、
一般に従来の実装法はLsiチツプに設けた複数個
のバンプと基板上の配線導体とを同時にボンデイ
ングし、しかる後、Lsiチツプを樹脂封止する方
法が採られている。 Conventionally, for example, at least one of the two glass plates that make up a liquid crystal cell is extended, and a
LSI chips are often mounted on various circuit boards. in this case,
In general, conventional mounting methods involve simultaneously bonding a plurality of bumps provided on an LSI chip and wiring conductors on a substrate, and then sealing the LSI chip with a resin.
しかし、特に１枚の基板上へ多数のLsiチツプ
を実装する（マルチ・チツプ化）場合、不良チツ
プの交換が必要となり、従来方法では封止樹脂と
基板とが接着している為、Lsiチツプの取り換え
に際して、ガラス等の基板や基板上のパーツに対
して損傷を与えることが多く、かつ取換えに時間
を要し、Lsiチツプ取換え後、破損あるいは亀裂
した基板や部品を再度使用することはできず、不
良チツプの場合、基板ごと捨てる結果となり、基
板の歩留りが著しく低下するなどの欠点があつ
た。 However, especially when mounting a large number of LSI chips on one board (multi-chip implementation), it is necessary to replace defective chips. When replacing the LSI chip, it often damages the substrate such as glass or the parts on the substrate, and it takes time to replace it, and after replacing the LSI chip, it is difficult to use the damaged or cracked substrate or parts again. In the case of a defective chip, the entire board was thrown away, resulting in a significant drop in the yield of the board.
本発明は上記の点に鑑みてなされたもので、特
にボンデイング前にバンプ部分を残して半導体素
子を樹脂封止することにより、封止樹脂と基板と
の接着を防止し、不良品半導体素子の交換を容易
に行えるようにした半導体装置の製法を提供せん
とするものである。 The present invention has been made in view of the above points, and in particular, by sealing the semiconductor element with resin while leaving the bump portion before bonding, it is possible to prevent the sealing resin from adhering to the substrate and prevent defective semiconductor elements. It is an object of the present invention to provide a method for manufacturing a semiconductor device that allows easy replacement.
以下、本発明の一実施例について図面を参照し
て説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第１図乃至第４図は本発明による製法に基づい
て製造される半導体装置の一例の製造工程を示し
ている。 1 to 4 show the manufacturing process of an example of a semiconductor device manufactured based on the manufacturing method according to the present invention.
第１図はバンプ形成後のLsiチツプを示し、１
はLsiチツプ、２はチツプ上に突出した接続端子
であるバンプである。第２図において、上記Lsi
チツプ１に封止樹脂４（例えば、エポキシ系等）
をはじく物質３、例えばシリコン系樹脂等をバン
プ２の先端部に塗布する上記Lsiチツプ１を封止
樹脂４中にデイツピングし、引きあげ、又はスプ
レー法により樹脂を塗布するとバンプ２の先端部
分には封止樹脂４は塗布されない（第３図）。上
記樹脂４に熱等を加えて硬化した後、上記封止樹
脂４をはじく物質３を除去し、基板５上の配線導
体６とバンプ２とを同時にボンデイングし、半導
体装置を製造する。なお、物質３の膜が薄い場合
は、とくに除去することなくそのままボンデイン
グすることができる（第４図）。この前記方法は
フラツトパツケージ、フイルムキヤリアー方式等
の実装法に比べ小型にでき且つ高密度実装を可能
にする。また通常の雰囲気中でボンデイングが行
え、空調設備が不要である。なお、バンプ部分に
形成される封止樹脂と接着しないあるいはしにく
い樹脂等のコーテイング物質をバンプ全体に形成
するかバンプの一部分に形成するかは実験的或い
は試験的に決められる。 Figure 1 shows the Lsi chip after bump formation;
is an LSI chip, and 2 is a bump that is a connection terminal protruding from the chip. In Figure 2, the above Lsi
A sealing resin 4 (for example, epoxy type, etc.) is applied to the chip 1.
Apply a substance 3 that repels the above, such as silicone resin, to the tip of the bump 2. Dip the LSI chip 1 into the sealing resin 4, pull it out, or apply the resin by spraying, and the tip of the bump 2 Sealing resin 4 is not applied (FIG. 3). After the resin 4 is cured by applying heat or the like, the substance 3 that repels the sealing resin 4 is removed, and the wiring conductors 6 on the substrate 5 and the bumps 2 are simultaneously bonded to manufacture a semiconductor device. Note that if the film of substance 3 is thin, it can be bonded as is without any particular removal (FIG. 4). This method allows for smaller size and higher density mounting compared to mounting methods such as flat package and film carrier methods. Furthermore, bonding can be performed in a normal atmosphere, and air conditioning equipment is not required. Note that whether a coating material such as a resin that does not adhere or is difficult to adhere to the sealing resin formed on the bump portion is formed on the entire bump or on a portion of the bump can be determined experimentally or experimentally.
以上説明したように、本発明によれば、Lsiチ
ツプを樹脂封止する場合に、バンプに樹脂をはじ
く物質を塗布しておき、このようなLsiチツプを
樹脂封止しているため、樹脂をはじく物質が塗布
された以外のチツプ部分を全に樹脂封止でき、こ
の樹脂封止も簡単になる。しかも、この樹脂封止
したLsiチツプを、基板へボンデイングするた
め、不良のLsiチツプの基板への交換がきわめて
簡単になり、かつ基板の歩留まりが向上しコスト
低下に大きな効果を奏する。 As explained above, according to the present invention, when an LSI chip is encapsulated with resin, a substance that repels the resin is applied to the bumps, and such an LSI chip is encapsulated with resin, so that the resin is not removed. All parts of the chip other than those coated with the repellent substance can be sealed with resin, and this resin sealing becomes easy. Moreover, since this resin-sealed LSI chip is bonded to the substrate, it is extremely easy to replace a defective LSI chip with a substrate, and the yield of the substrate is improved, which has a significant effect on cost reduction.
第１図乃至第４図は本発明に係わる半導体装置
の一例の製造工程を示す断面図である。
図中、１：半導体素子、２：バンプ、３：コー
テイング物質、４：封止樹脂、５：基板、６：配
線導体。
1 to 4 are cross-sectional views showing the manufacturing process of an example of a semiconductor device according to the present invention. In the figure, 1: semiconductor element, 2: bump, 3: coating material, 4: sealing resin, 5: substrate, 6: wiring conductor.
Claims (1)
素子であるLsiチツプを、配線導体が形成された
電極基板上に載置し、上記複数個のバンプと配線
導体とを同時にボンデイングする半導体装置の製
法において、 上記ボンデイング前に少なくとも上記バンプの
先端部分に上記Lsiチツプを封止するための樹脂
をはじく物質を塗布した上記Lsiチツプを樹脂封
止することを特徴とする半導体装置の製法。[Claims] 1. An LSI chip, which is a semiconductor element having a plurality of bumps for connecting electrodes, is placed on an electrode substrate on which a wiring conductor is formed, and the plurality of bumps and the wiring conductor are connected at the same time. A method of manufacturing a semiconductor device by bonding, wherein the LSI chip is sealed with a resin by applying a resin-repellent substance to at least the tip of the bump before the bonding. manufacturing method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56149098A JPS5848947A (en) | 1981-09-18 | 1981-09-18 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56149098A JPS5848947A (en) | 1981-09-18 | 1981-09-18 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5848947A JPS5848947A (en) | 1983-03-23 |
| JPS6244851B2 true JPS6244851B2 (en) | 1987-09-22 |
Family
ID=15467647
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56149098A Granted JPS5848947A (en) | 1981-09-18 | 1981-09-18 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5848947A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02189926A (en) * | 1989-01-18 | 1990-07-25 | Nec Corp | Semiconductor integrated circuit device |
| US5139969A (en) * | 1990-05-30 | 1992-08-18 | Mitsubishi Denki Kabushiki Kaisha | Method of making resin molded semiconductor device |
| JPH0547958A (en) * | 1991-08-12 | 1993-02-26 | Mitsubishi Electric Corp | Resin sealed semiconductor device |
| US6168972B1 (en) | 1998-12-22 | 2001-01-02 | Fujitsu Limited | Flip chip pre-assembly underfill process |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5361277A (en) * | 1976-11-15 | 1978-06-01 | Hitachi Ltd | Semiconductor element |
-
1981
- 1981-09-18 JP JP56149098A patent/JPS5848947A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5848947A (en) | 1983-03-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5610442A (en) | Semiconductor device package fabrication method and apparatus | |
| JP2662190B2 (en) | Electronic element assembly and rework method | |
| US7615871B2 (en) | Method and apparatus for attaching microelectronic substrates and support members | |
| US6553660B2 (en) | Electronic device and a method of manufacturing the same | |
| KR100572525B1 (en) | Method for manufacturing flip chip semiconductor device | |
| KR19980042617A (en) | Wafer Level Packaging | |
| WO1998033212A1 (en) | Film carrier tape, semiconductor assembly, semiconductor device, manufacturing method therefor, mounting board, and electronic equipment | |
| JPH02273946A (en) | Mounting structure and mounting method of semiconductor device | |
| KR20020021597A (en) | Semiconductor device and process of production of same | |
| US6259155B1 (en) | Polymer enhanced column grid array | |
| JPH06204272A (en) | Manufacture of semiconductor device | |
| JP2002110714A (en) | Chip-integrating board, its manufacturing method, chip- like electronic component, its manufacturing method, and electronic equipment and its manufacturing method | |
| JPH01303730A (en) | Semiconductor element mounting structure and its manufacturing method | |
| JPS6244851B2 (en) | ||
| JPH10199927A (en) | Circuit substrate with anisotropic conductive film, circuit chip, and method for producing the same | |
| JPS5848932A (en) | Preparation of semiconductor device | |
| JPH03157959A (en) | Mounting structure and manufacturing method | |
| JPH03155144A (en) | Mounting method for bare semiconductor ic chip | |
| JPH09283555A (en) | Mounting structure of semiconductor chip, manufacture of semiconductor package and semiconductor package | |
| KR100365054B1 (en) | substrate for semiconductor package and manufacturing method of semiconductor package using it | |
| JPH09181244A (en) | Semiconductor device | |
| JPH01187846A (en) | Semiconductor device | |
| JP2000012608A (en) | Method for manufacturing semiconductor device | |
| JPH10313016A (en) | Semiconductor device mounting method | |
| JPH02122693A (en) | Semiconductor device mounting method |