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JPS6244440B2 - - Google Patents

Info

Publication number
JPS6244440B2
JPS6244440B2 JP18051181A JP18051181A JPS6244440B2 JP S6244440 B2 JPS6244440 B2 JP S6244440B2 JP 18051181 A JP18051181 A JP 18051181A JP 18051181 A JP18051181 A JP 18051181A JP S6244440 B2 JPS6244440 B2 JP S6244440B2
Authority
JP
Japan
Prior art keywords
layer
conductivity type
active layer
grooves
buried
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP18051181A
Other languages
Japanese (ja)
Other versions
JPS5882587A (en
Inventor
Mitsuhiro Kitamura
Ikuo Mito
Kenichi Kobayashi
Isao Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP18051181A priority Critical patent/JPS5882587A/en
Publication of JPS5882587A publication Critical patent/JPS5882587A/en
Publication of JPS6244440B2 publication Critical patent/JPS6244440B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • H01S5/2275Buried mesa structure ; Striped active layer mesa created by etching

Landscapes

  • Semiconductor Lasers (AREA)

Description

【発明の詳細な説明】 本発明はIoasP活性層の周囲をIoP層で
埋め込んだ埋め込みヘテロ構造半導体レーザの製
造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a buried heterostructure semiconductor laser in which the periphery of an I o G a S P active layer is buried with an I o P layer.

埋め込みヘテロ構造半導体レーザ(以下BH−
LDと略す)は低い発振しきい値電流、安定化さ
れた発振横モード、高温動作可能などの優れた特
性を有しているため、光フアイバ通信用光源とし
て注目を集めている。本出願人は特願昭55−
123261号明細書に示した様に、活性層を含むメサ
ストライプ以外で確実に電流ブロツク層が形成で
き、したがつて温度特性にすぐれ、製造歩留りの
向上したIoasP BH−LDを発明した。しか
しながら、この構造のBH−LDではエツチングし
て形成されたメサストライプがウエフア全体に対
して小さな突起物となつているため、メサエツチ
ング後の基板処理、あるいはそれにつづく埋め込
み成長過程において機械的なダメージを受けやす
く、歩留りの低下を招いていた。
Buried heterostructure semiconductor laser (BH−
LD (abbreviated as LD) has excellent characteristics such as low oscillation threshold current, stabilized oscillation transverse mode, and ability to operate at high temperatures, so it is attracting attention as a light source for optical fiber communications. The applicant filed a patent application in 1983.
As shown in the specification of No. 123261, IoGaAsP BH - LD can reliably form a current blocking layer in areas other than the mesa stripe including the active layer, and therefore has excellent temperature characteristics and improved manufacturing yield . invented. However, in BH-LDs with this structure, the mesa stripes formed by etching form small protrusions on the entire wafer, which can cause mechanical damage during substrate processing after mesa etching or during the subsequent buried growth process. This led to a decrease in yield.

本発明の目的は上記の欠点を除去すべく、発光
再結合するIoasP活性層を含むメサストラ
イプを機械的なダメージから防ぎ、高性能なBH
−LDを歩留りよく製造する製造方法を提供する
ことにある。
The purpose of the present invention is to eliminate the above -mentioned drawbacks by preventing mesa stripes containing an IoGaAsP active layer that undergoes radiative recombination from mechanical damage, and to provide a high-performance BH
- It is an object of the present invention to provide a manufacturing method for manufacturing LDs with high yield.

本発明によれば、第1導電型IoP基板上に少
なくともIoasP活性層およびその第2導電
型IoP層を積層させた半導体ウエフアに、第2
導電型IoP層、およびIoasP活性層まで選
択エツチング法により除去して2本の平行な溝を
形成する工程と、溝の形成された半導体ウエフア
に少なくとも第2導電型IoP電流ブロツク層、
第1導電型IoP電流ブロツク層を2本の平行な
溝によつてはさまれたメサストライプの上面のみ
除いて積層させ、さらに第2導電型IoP埋め込
み層を全面にわたつて連続して積層させるエピタ
キシヤル成長工程とを含むことを特徴とする埋め
込みヘテロ構造半導体レーザの製造方法が得られ
る。
According to the present invention, a semiconductor wafer in which at least an IoGaAsP active layer and a second conductivity type IoP layer are laminated on a first conductivity type IoP substrate , a second
A step of removing the conductive type I o P layer and the I o Ga As P active layer by a selective etching method to form two parallel grooves, and etching the semiconductor wafer in which the grooves are formed with at least a second conductive type. I o P current blocking layer,
A first conductivity type I o P current blocking layer is laminated except for only the top surface of the mesa stripe sandwiched between two parallel grooves, and a second conductivity type I o P buried layer is layered continuously over the entire surface. There is obtained a method for manufacturing a buried heterostructure semiconductor laser, which is characterized in that it includes an epitaxial growth step of stacking layers.

以下図面を用いて本発明の実施例を説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明の実施例のBH−LDの断面図で
ある。このようなBH−LDを得るには、まず
(001)n−IoP基板101上にn−IoPバツフ
ア層102、ノンドープIoasP活性層10
3、p−IoPクラツド層104(厚さ1μm)
を順次積層させたウエフアに通常のフオトレジス
トの技術によつて<110>方向に平行な2本の溝
を形成する。これらの溝は幅5μm程度とすれば
よく、2本の溝の間隔が2μm程度に設定し、こ
の2本の溝によつてはさまれたメサストライプが
発光再結合するIoasP活性層105を含む
ようにする。また、これらの溝の形成に際しては
選択エツチング法を用いまずHCl:H2O=4:1
とした混合エツチング液を用い、3℃で2分間エ
ツチングして、p−IoPクラツド層104を除
き、続いてH2SO4:H2O2:H2O=3:1:1の
混合エツチング液を用いて50℃で1分間エツチン
グして、IoasP活性層103を除くことに
より自動的にIoasP活性層103までの深
さの溝が形成できることになる。このようにして
得られた半導体ウエフアに埋め込み成長を行な
い、p−IoPブロツク層106、n−IoP電流
ブロツク層107を2本の溝ではさまれたメサス
トライプ150の上面のみを除いて、次にp−I
oP埋め込み層108を全面にわたつて連続する
ように、最後にp−IoasP電極層109
を、順次積層させる。
FIG. 1 is a sectional view of a BH-LD according to an embodiment of the present invention. To obtain such a BH-LD, first, an n-I o P buffer layer 102 and a non-doped I o Ga A s P active layer 10 are formed on a (001) n-I o P substrate 101.
3. p-I o P cladding layer 104 (thickness 1 μm)
Two grooves parallel to the <110> direction are formed on a wafer in which the wafers are sequentially laminated using a conventional photoresist technique. These grooves may have a width of about 5 μm, and the interval between the two grooves is set to about 2 μm, and the mesa stripes sandwiched between these two grooves are recombined by light emission . A P active layer 105 is included. In addition, when forming these grooves, a selective etching method was used to first prepare HCl:H 2 O=4:1.
The p - IoP cladding layer 104 was removed by etching for 2 minutes at 3° C. using a mixed etching solution of H 2 SO 4 :H 2 O 2 :H 2 O=3:1:1. By etching for 1 minute at 50° C. using a mixed etching solution to remove the IoGaAsP active layer 103, a groove with a depth up to the IoGaAsP active layer 103 is automatically formed. It will be possible. Filling growth is performed on the semiconductor wafer thus obtained, and the p-I o P blocking layer 106 and the n-I o P current blocking layer 107 are removed except for the upper surface of the mesa stripe 150 sandwiched between two grooves. Then p-I
Finally, a p -I o G a A s P electrode layer 109 is formed so that the P buried layer 108 is continuous over the entire surface.
are sequentially stacked.

このBH−LDにおいては、従来例のように1つ
のメサストライプのみが突起物のように形成され
ておらず、埋め込み成長の段階でのカーボンボー
トとの接触による基板損傷が生じにくく、製造歩
留りが大幅に向上した。このようにして得られた
BH−LDにおいて、室温での発振しきい値電流が
10〜20mA、微分量子効率が50%程度というもの
が再現性よく得られた。
In this BH-LD, only one mesa stripe is not formed like a protrusion as in the conventional example, and the substrate is less likely to be damaged by contact with the carbon boat during the buried growth stage, resulting in improved manufacturing yield. Significantly improved. obtained in this way
In BH-LD, the oscillation threshold current at room temperature is
A value of 10 to 20 mA and a differential quantum efficiency of about 50% was obtained with good reproducibility.

本発明の実施例においては、活性層を含むメサ
ストライプの両側にp−IoPクラツド層を残し
た製法であるため、メサエツチング後の基板処
理、埋め込み成長時等の素子作製時に起こる機械
的なダメージを防ぐことができ、それによつて
BH−LDの製造歩留りが大幅に改善した。このよ
うにして得られたレーザは均一性、再現性がよ
く、ウエフア間でのバラツキも少なく、BH−LD
の製造歩留りが大幅に向上した。本発明において
は、本願の発明者らが新たに開発した成長法を採
用することにより、活性層を含むメサストライプ
の両側の部分にはn−IoP層が積層されるの
で、この部分を通じて電流が流れることはなく、
電流は活性層を含むメサストライプのみに集中し
て流れる。
In the embodiments of the present invention, the manufacturing method leaves p- IoP cladding layers on both sides of the mesa stripe including the active layer, so mechanical problems that occur during device fabrication, such as during substrate processing after mesa etching and during buried growth, are avoided. Damage can be prevented, thereby
The manufacturing yield of BH-LD has been significantly improved. The laser obtained in this way has good uniformity and reproducibility, and there is little variation between wafers, and BH-LD
The manufacturing yield has been significantly improved. In the present invention, by adopting a growth method newly developed by the inventors of the present application, n-I o P layers are stacked on both sides of the mesa stripe including the active layer, so that the n-I o P layer is stacked through this part. No current flows,
Current flows concentrated only in the mesa stripe containing the active layer.

本発明の特徴は通常のBH−LDにおける活性層
を含むメサストライプの両側にp−IoPクラツ
ド層を残したことであり、それによつてメサエツ
チング後の基板処理、埋め込み成長時に起こる機
械的ダメージを防ぐことができた。またストライ
プ形成の際の溝のエツチングにおいても選択エツ
チング法を用いたため、メサエツチングの再現性
もきわめて良い製造方法である。
The feature of the present invention is that p- IoP cladding layers are left on both sides of the mesa stripe containing the active layer in a conventional BH-LD, thereby preventing mechanical damage that occurs during substrate processing and buried growth after mesa etching. could be prevented. Furthermore, since a selective etching method was used for etching grooves when forming stripes, the reproducibility of mesa etching is also extremely good.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の製造方法によるBH−LDの素
子断面図である。 図中、101……n−IoP基板、102……
n−IoPバツフア層、103……IoasP活
性層、104……p−IoPクラツド層、105
……発光再結合するIoasP活性層、106
……p−IoP電流ブロツク層、107……n−
oP電流ブロツク層、108……p−IoP埋め
込み層、109……p−IoasP電極層、1
10……p形オーミツク性電極、111……n形
オーミツク性電極である。
FIG. 1 is a cross-sectional view of a BH-LD device manufactured by the manufacturing method of the present invention. In the figure, 101... n-I o P substrate, 102...
n- IoP buffer layer, 103... IoGaAsP active layer, 104 ... p- IoP cladding layer, 105
...I o G a A s P active layer that emits light and recombines, 106
...p-I o P current blocking layer, 107...n-
I o P current blocking layer, 108... p-I o P buried layer, 109... p-I o Ga A s P electrode layer, 1
10... p-type ohmic electrode, 111... n-type ohmic electrode.

Claims (1)

【特許請求の範囲】[Claims] 1 第1導電型IoP基板上に少なくともIoa
sP活性層およびその上の第2導電型IoP層を
積層させた半導体ウエフアに、前記第2導電型I
oP層および前記IoasP活性層まで選択エツ
チング法により除去して2本の平行な溝を形成す
る工程と、溝の形成された前記半導体ウエフアに
少なくとも第2導電型IoP電流ブロツク層、第
1導電型IoP電流ブロツク層を前記2本の平行
な溝によつてはさまれたメサストライプの上面の
みを除いて積層させ、さらに第2導電型IoP埋
め込み層を全面にわたつて連続して積層させるエ
ピタキシヤル成長工程とを含むことを特徴とする
埋め込みヘテロ構造半導体レーザの製造方法。
1 At least I o Ga on the first conductivity type I o P substrate
A semiconductor wafer in which an A s P active layer and a second conductivity type I o P layer thereon are laminated with the second conductivity type I
o P layer and the I o Ga A s P active layer are removed by a selective etching method to form two parallel grooves, and the semiconductor wafer in which the grooves are formed has at least a second conductivity type I o A P current blocking layer and a first conductivity type I o P current blocking layer are laminated except for only the upper surface of the mesa stripe sandwiched between the two parallel grooves, and then a second conductivity type I o P is buried. 1. A method for manufacturing a buried heterostructure semiconductor laser, comprising: an epitaxial growth step in which layers are continuously laminated over the entire surface.
JP18051181A 1981-11-11 1981-11-11 Manufacture of buried hetero structure semiconductor laser Granted JPS5882587A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18051181A JPS5882587A (en) 1981-11-11 1981-11-11 Manufacture of buried hetero structure semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18051181A JPS5882587A (en) 1981-11-11 1981-11-11 Manufacture of buried hetero structure semiconductor laser

Publications (2)

Publication Number Publication Date
JPS5882587A JPS5882587A (en) 1983-05-18
JPS6244440B2 true JPS6244440B2 (en) 1987-09-21

Family

ID=16084522

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18051181A Granted JPS5882587A (en) 1981-11-11 1981-11-11 Manufacture of buried hetero structure semiconductor laser

Country Status (1)

Country Link
JP (1) JPS5882587A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6017977A (en) * 1983-07-11 1985-01-29 Nec Corp Semiconductor laser diode
US4870468A (en) * 1986-09-12 1989-09-26 Kabushiki Kaisha Toshiba Semiconductor light-emitting device and method of manufacturing the same
JP4850886B2 (en) * 2008-10-21 2012-01-11 リンナイ株式会社 Gas passage filter mounting structure

Also Published As

Publication number Publication date
JPS5882587A (en) 1983-05-18

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