JPS6242566A - thin film transistor - Google Patents
thin film transistorInfo
- Publication number
- JPS6242566A JPS6242566A JP60182229A JP18222985A JPS6242566A JP S6242566 A JPS6242566 A JP S6242566A JP 60182229 A JP60182229 A JP 60182229A JP 18222985 A JP18222985 A JP 18222985A JP S6242566 A JPS6242566 A JP S6242566A
- Authority
- JP
- Japan
- Prior art keywords
- amorphous silicon
- hydrogenated amorphous
- thin film
- film transistor
- active layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims description 33
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 56
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 11
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 claims description 9
- SCCCLDWUZODEKG-UHFFFAOYSA-N germanide Chemical compound [GeH3-] SCCCLDWUZODEKG-UHFFFAOYSA-N 0.000 claims description 8
- 238000010030 laminating Methods 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims 1
- 239000010408 film Substances 0.000 description 10
- 230000000694 effects Effects 0.000 description 6
- 230000007257 malfunction Effects 0.000 description 6
- 239000012535 impurity Substances 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000000354 decomposition reaction Methods 0.000 description 2
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000032900 absorption of visible light Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000002940 repellent Effects 0.000 description 1
- 239000005871 repellent Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
- H10D62/815—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW]
- H10D62/8161—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices
- H10D62/8162—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices having quantum effects only in the vertical direction, i.e. layered structures having quantum effects solely resulting from vertical potential variation
- H10D62/8163—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices having quantum effects only in the vertical direction, i.e. layered structures having quantum effects solely resulting from vertical potential variation comprising long-range structurally-disordered materials, e.g. one-dimensional vertical amorphous superlattices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
- H10D30/6748—Group IV materials, e.g. germanium or silicon carbide having a multilayer structure or superlattice structure
Landscapes
- Formation Of Insulating Films (AREA)
- Recrystallisation Techniques (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】 〔概要〕 薄膜トランジスタの改良である。[Detailed description of the invention] 〔overview〕 This is an improvement on thin film transistors.
活性層を、水素化アモルファス炭化シリコン、水素化ア
モルファス窒化シリコン、水素化アモルファスゲルマニ
ウム化シリコン、水素化アモルファス酸化シリコン等の
薄膜４２と水素化アモルファスシリコンの薄膜４１とを
交互に積層してなる非晶質半導体薄膜積層体４とするこ
とにより。The active layer is an amorphous layer formed by alternately laminating thin films 42 of hydrogenated amorphous silicon carbide, hydrogenated amorphous silicon nitride, hydrogenated amorphous silicon germanide, hydrogenated amorphous silicon oxide, etc. and thin films 41 of hydrogenated amorphous silicon. By forming a semiconductor thin film laminate 4 of high quality.
これを可視光に対して透明とし、遮光板等を必要とする
ことなく、暗電流を減少し誤動作等の発生を防止しうる
ようにした薄膜トランジスタである。This is a thin film transistor that is transparent to visible light and can reduce dark current and prevent malfunctions without requiring a light shielding plate or the like.
本発明は、薄膜トランジスタに関する。特に、可視光に
対して透明の活性層を使用して、暗電流を誠少し誤動作
等の発生を防止する改良に関する。The present invention relates to thin film transistors. In particular, the present invention relates to an improvement that uses an active layer that is transparent to visible light to minimize dark current and prevent malfunctions.
薄膜トランジスタは、ガラス基板等非晶質基板の上に形
成されることが一般であるから、非晶質半導体である水
素化アモルファスシリコン膜を活性層とする場合が一般
である。Since thin film transistors are generally formed on an amorphous substrate such as a glass substrate, a hydrogenated amorphous silicon film, which is an amorphous semiconductor, is generally used as an active layer.
ところが、水素化アモルファスシリコンはバンドギャッ
プが約１．８ｅＶであり、可視光を吸収するから、信号
光としては赤外光より長波長の光を使用しても、不所望
の可視光を吸収して暗電流を生じ、さらには誤動作のお
それがある。However, hydrogenated amorphous silicon has a band gap of approximately 1.8 eV and absorbs visible light, so even if light with a wavelength longer than infrared light is used as a signal light, it will absorb undesired visible light. This may cause dark current and even malfunction.
この欠点を解消するには、バンドギャップが大きな非晶
質半導体を活性層とすればよい、この要請に応える非晶
質半導体としては、水素化アモルファス炭化シリコン、
水素化アモルファス窒化シリコン等があるが、これらに
あっては、キャリヤのモビリティ−が低く、抵抗率が大
きいから、抵抗率を低下するために不純物を導入するこ
とが望ましいが、このために不純物を導入すると。To overcome this drawback, an amorphous semiconductor with a large bandgap can be used as the active layer.Amorphous semiconductors that meet this requirement include hydrogenated amorphous silicon carbide,
Hydrogenated amorphous silicon nitride, etc., have low carrier mobility and high resistivity, so it is desirable to introduce impurities to lower the resistivity. When introduced.
トラップが増加する等して電気特性が損なわれる。水素
化アモルファス炭化シリコン、水素化アモルファス窒化
シリコン等のドーピング特性が悪いからである。そこで
、従来技術においては、活性層としては水素化アモルフ
ァスシリコンを使用し、これに遮光板を併用することが
一般であり。Electrical characteristics are impaired due to an increase in traps, etc. This is because hydrogenated amorphous silicon carbide, hydrogenated amorphous silicon nitride, and the like have poor doping characteristics. Therefore, in the prior art, hydrogenated amorphous silicon is generally used as the active layer, and a light shielding plate is used in conjunction with this.
可視光に対して透明な活性層よりなるｆａ１１トランジ
スタの開発が望まれていた。It has been desired to develop an fa11 transistor having an active layer transparent to visible light.
本発明の目的はこの要請に応えることにあり、可視光に
対して透明な活性層を有し、暗電流が少なく不所望の可
視光吸収にもとづき誤動作等をすることのないｔａＪ膜
トランジスタを提供することにある。The purpose of the present invention is to meet this demand, and to provide a taJ film transistor that has an active layer that is transparent to visible light, has low dark current, and does not malfunction due to undesired absorption of visible light. It's about doing.
Ｌ記の目的を達成するために本発明が採った手段は、水
素化アモルファス炭化シリコン、水素化アモルファス窒
化シリコン、水素化アモルファスゲルマニウム化シリコ
ン、水素化アモルファス酸化シリコン等の薄膜４２と水
素化アモルファスシリコンの薄膜４１とを交互に積層し
てなる非晶質半導体薄膜積層体４をもって活性層を形成
することにある。The means taken by the present invention in order to achieve the object described in item L include a thin film 42 of hydrogenated amorphous silicon carbide, hydrogenated amorphous silicon nitride, hydrogenated amorphous silicon germanide, hydrogenated amorphous silicon oxide, etc. and hydrogenated amorphous silicon. The purpose is to form an active layer using an amorphous semiconductor thin film laminate 4 formed by alternately laminating thin films 41 of .
本発明は、アモルファススーパーラティスの／くンドギ
ャップが、量子井戸の深さと幅とキャリヤである電子ま
たは空孔の有効質敬との関数として決定されるという性
質を利用し、バンドギャップの小さい水素化アモルファ
スシリコンの薄膜とバンドギャップの大きい水素化アモ
ルファス炭化シリコン、水素化アモルファス窒化シリコ
ン、水ｌｌアモルファスゲルマニウム化シリコン、水素
化アモルファス酸化シリコン等の薄膜との積層体を活性
層としたものである。換言すれば、上記の量子効果を利
用してバンドギャップが水素化アモルファスシリコンよ
り大きな非晶質半導体を実現し、これを活性層として可
視光吸収性を排除し、一方、アモルファススーパーラテ
ィスにおいて生じるキャリヤの閉じ込め効果を利用して
、電流は水素化アモルファスシリコン中を流れるように
したものである。The present invention utilizes the property that the band gap of an amorphous superlattice is determined as a function of the depth and width of the quantum well and the effective quality of carrier electrons or holes. The active layer is a laminate of a thin film of hydrogenated amorphous silicon and a thin film of hydrogenated amorphous silicon carbide, hydrogenated amorphous silicon nitride, hydrogenated amorphous silicon germanide, hydrogenated amorphous silicon oxide, etc. having a large band gap. In other words, by utilizing the quantum effect described above, we can realize an amorphous semiconductor with a band gap larger than that of hydrogenated amorphous silicon, use this as an active layer to eliminate visible light absorption, and on the other hand, absorb carriers generated in the amorphous super lattice. The current is made to flow through hydrogenated amorphous silicon by utilizing the confinement effect of .
この非晶質半導体はバンドギャップの制御が容易である
ことに加えて、ドーピング特性のすぐれている利点も有
するから、薄膜トランジスタの活性層として利用すると
き、不純物を導入して低抵抗とすることができる。水素
化アモルファス炭化シリコン、水素化アモルファス窒化
シリコン、水素化アモルファスゲルマニウム化シリコン
、水素化アモルファス酸化シリコン等はドーピング特性
が悪いためドープできないが、水素化アモルファスシリ
コンはドーピング特性がすぐれているので、水素化アモ
ルファスシリコンのみに不純物を導入して積層体の不純
物濃度を制御しうるからである。In addition to being easy to control the band gap, this amorphous semiconductor also has the advantage of excellent doping characteristics, so when used as the active layer of a thin film transistor, it is possible to introduce impurities to make it low resistance. can. Hydrogenated amorphous silicon carbide, hydrogenated amorphous silicon nitride, hydrogenated amorphous silicon germanide, hydrogenated amorphous silicon oxide, etc. cannot be doped because of their poor doping properties, but hydrogenated amorphous silicon has excellent doping properties and cannot be doped. This is because the impurity concentration of the stacked body can be controlled by introducing impurities only into amorphous silicon.
以下１図面を参照しつ一１本発明の一実施例に係る薄膜
トランジスタについてさらに説明する。A thin film transistor according to an embodiment of the present invention will be further described below with reference to the drawings.
第２図参照
ガラス基板等ｌ上にニッケルクローム等の導電体膜を厚
さ約１，０００人に形成した後、これを輻約２０％脂に
バターニングしてゲート電極２を形成する。Referring to FIG. 2, a conductive film of nickel chrome or the like is formed on a glass substrate or the like to a thickness of about 1,000 mm, and then buttered to a thickness of about 20% to form a gate electrode 2.
第３図参照
高周波グロー放電分解法を使用して、厚さ約３．０００
人の窒化シリコンの膜（ゲート絶縁膜）３と、」−記せ
る水素化アモルファスシリコンの薄膜４１と水素化アモ
ルファス炭化シリコン、水素化アモルファス窒化シリコ
ン、水素化アモルファスゲルマニウム化シリコン、水素
化アモルファス酸化シリコン等の薄Ｗ１４２との積層体
４と、リンがドープされた水素化アモルファスシリコン
の薄膜５とをつづけて形成する。積層体４を構成する各
薄膜の厚さは５〜５０＾であるが、積層体４全体の厚さ
は約１，０００人とする。積層体４は少なくとも１０組
形成されることになる。リンがドープされた水素化アモ
ルファスシリコンの薄！１５の厚さは約 １００人であ
る。Using the high-frequency glow discharge decomposition method, see Figure 3, the thickness is approximately 3.000 mm.
Human silicon nitride film (gate insulating film) 3, hydrogenated amorphous silicon thin film 41, hydrogenated amorphous silicon carbide, hydrogenated amorphous silicon nitride, hydrogenated amorphous silicon germanide, hydrogenated amorphous silicon oxide A laminate 4 of a thin W 142 such as the above and a thin film 5 of hydrogenated amorphous silicon doped with phosphorus are successively formed. Although the thickness of each thin film constituting the laminate 4 is 5 to 50^, the thickness of the entire laminate 4 is approximately 1,000. At least ten sets of laminates 4 are formed. Thin hydrogenated amorphous silicon doped with phosphorus! The thickness of 15 is about 100 people.
この工程は、水素をもって希釈されたモノシランと、メ
タンとモノシランとの混合ガスとを、順次切り換えてな
す高周波グロー放電分解法を使用すれば可能である。This step can be carried out by using a high frequency glow discharge decomposition method in which monosilane diluted with hydrogen and a mixed gas of methane and monosilane are sequentially switched.
第４図参照
厚さ約 １ 、０００へのチタンｓ６と厚さ約２，００
０人のアルミニウム膜７とを形成する。この工程は通常
の真空蒸・着法、スパッタ法等を使用して可能である。See Figure 4 Titanium S6 to thickness approx. 1,000 and thickness approx. 2,000
0 aluminum film 7 is formed. This step can be carried out using a conventional vacuum evaporation/deposition method, sputtering method, or the like.
ゲート電極２と対向する領域から膜５．６．７を、幅約
１５〜２０μｍに除去してソース電極８・ドレイン電極
９を形成する。The film 5.6.7 is removed from the region facing the gate electrode 2 to a width of about 15 to 20 μm to form a source electrode 8 and a drain electrode 9.
以りの工程をもって製造された薄膜トランジスタの活性
層のバンドギャップは水素化アモルファスシリコンのバ
ンドギャップより大きいので、可視光を吸収することは
なく、暗電流が流れたり、不所望の可視光を吸収して誤
動作することはない。The band gap of the active layer of the thin film transistor manufactured using the above process is larger than that of hydrogenated amorphous silicon, so it does not absorb visible light, causing dark current to flow or absorbing unwanted visible light. It will not malfunction.
以上説明せるとおり、本発明に係る薄膜トランジスタの
活性層は水素化アモルファス炭化シリコン、水素化アモ
ルファス窒化シリコン、水素化アモルファスゲルマニウ
ム化シリコン、水素化アモルファス酸化シリコン等の薄
膜と水素化アモルファスシリコンの薄膜とを交りに８１
層してなる弊品質半導体、薄膜積層体をもって構成され
ており、量子効果によってそのバンドギャップは自由に
制御されて水素化アモルファスシリコンのバンドギャッ
プより大きくされており、しかも、水素化アモルファス
シリコン中にはドープが可能である力）らトラップ等の
おそれなくドーピングが自由にできる。そのため、予期
せざる可視光を吸収して暗電流を発生したり、不所望の
可視光を吸収して誤動作することもない、また、アモル
ファススーパーラティスのキャリヤ閉じ込め効果により
電流は水素化アモルファスシリコン中を流れるので。As explained above, the active layer of the thin film transistor according to the present invention includes a thin film of hydrogenated amorphous silicon carbide, hydrogenated amorphous silicon nitride, hydrogenated amorphous silicon germanide, hydrogenated amorphous silicon oxide, etc., and a thin film of hydrogenated amorphous silicon. 81 at the same time
Our quality semiconductor is composed of a thin film stack, and its bandgap is freely controlled by quantum effects to be larger than the bandgap of hydrogenated amorphous silicon. Doping can be done freely without fear of traps, etc. Therefore, there is no possibility of absorbing unexpected visible light and generating dark current, or absorbing unwanted visible light and causing malfunctions.In addition, due to the carrier confinement effect of the amorphous super lattice, the current is not generated in hydrogenated amorphous silicon. Because it flows.
モビリティ−も高く、動作速度も速く、この薄膜トラン
ジスタの特性はすぐれている。特に平面ディスプレイの
駆動用薄膜トランジスタとして使用すると、有効画素面
積が増加して明るい平面ディスプレイが得られる等の効
果もある。This thin film transistor has excellent characteristics such as high mobility and fast operation speed. In particular, when used as a thin film transistor for driving a flat display, the effective pixel area increases and a bright flat display can be obtained.
第１図は、本発明の一実施例に係る薄膜トランジスタの
断面図である。
第２〜４図は１本発明の一実施例に係る薄膜トランジス
タの製造工程図である。
ｌ・・・ガラスル撥、 ２・ ・ ・ゲート電極。
３・φ−Ｍ化シリコンの膜（ゲート絶ａｒｇａ＞、４・
拳・、ｔｆ体、 ４１・番・水素化アモルファスシリコ
ンの薄膜、 ４２０参・水素化アモルファス炭化シリコ
ン１．水素化アモルファス窒化シリコン、水素化アモル
ファスゲルマニウム化シリコン、水素化アモルファス酸
化シリコン等のｐＪＳ。
５争・・リンがドープされた水素化アモルファスシリコ
ンの薄膜、６− ・・チタン膜、７ ｅ ｅ ｅアルミ
ニウム膜、 ８・φ・ソース電極、９拳拳会ドレイン電
極。
代理人 弁理士 井桁貞−＋、、、、 、 、、’）・
＼１．−ユ ・ノ
・ご、）・
工ｙｒｔ日
第４囚
不沼明
′：ＬＡｔ圀
第２図
工屁記
第３図FIG. 1 is a sectional view of a thin film transistor according to an embodiment of the present invention. 2 to 4 are process diagrams for manufacturing a thin film transistor according to an embodiment of the present invention. l... glass repellent, 2... gate electrode. 3. φ-M silicon film (gate isolation arga>, 4.
Fist・, TF body, No. 41・Thin film of hydrogenated amorphous silicon, No. 420・Hydrogenated amorphous silicon carbide 1. pJS such as hydrogenated amorphous silicon nitride, hydrogenated amorphous silicon germanide, and hydrogenated amorphous silicon oxide. 5. Thin film of hydrogenated amorphous silicon doped with phosphorus, 6.. Titanium film, 7. e ee aluminum film, 8. φ source electrode, 9. fist drain electrode. Agent Patent Attorney Sada Igeta-+,,,, ,,,')・
\1. - Yu・no・go・)・Work day 4th prisoner Akira Funuma': LAt country 2nd map 3rd page
Claims (1)
窒化シリコンと水素化アモルファスゲルマニウム化シリ
コンと水素化アモルファス酸化シリコンとよりなるグル
ープから選らばれた一つの物質の薄膜（４２）と水素化
アモルファスシリコンの薄膜（４１）とを交互に積層し
てなる非晶質半導体薄膜積層体（４）を活性層とする薄
膜トランジスタ。A thin film of one substance selected from the group consisting of hydrogenated amorphous silicon carbide, hydrogenated amorphous silicon nitride, hydrogenated amorphous silicon germanide, and hydrogenated amorphous silicon oxide (42) and a thin film of hydrogenated amorphous silicon (41) A thin film transistor whose active layer is an amorphous semiconductor thin film laminate (4) formed by alternately laminating .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60182229A JPS6242566A (en) | 1985-08-20 | 1985-08-20 | thin film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60182229A JPS6242566A (en) | 1985-08-20 | 1985-08-20 | thin film transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6242566A true JPS6242566A (en) | 1987-02-24 |
Family
ID=16114600
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60182229A Pending JPS6242566A (en) | 1985-08-20 | 1985-08-20 | thin film transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6242566A (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6288367A (en) * | 1985-10-11 | 1987-04-22 | ゼネラル エレクトリツク カンパニー | transistor |
| JPS63181473A (en) * | 1987-01-23 | 1988-07-26 | Hosiden Electronics Co Ltd | Thin-film transistor |
| EP0276002A2 (en) * | 1987-01-23 | 1988-07-27 | Hosiden Corporation | Thin film transistor |
| JPS63224259A (en) * | 1987-03-12 | 1988-09-19 | Toshiba Corp | Method for manufacturing thin film elements |
| JPH0521801A (en) * | 1990-12-25 | 1993-01-29 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| JPH0521794A (en) * | 1991-02-04 | 1993-01-29 | Semiconductor Energy Lab Co Ltd | Dieleciric gate type field effect semiconductor device and fabrication thereof |
| EP0587520A1 (en) * | 1992-08-10 | 1994-03-16 | International Business Machines Corporation | A SiGe thin film or SOI MOSFET and method for making the same |
| WO2002001641A1 (en) * | 2000-06-27 | 2002-01-03 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device |
| US6838698B1 (en) | 1990-12-25 | 2005-01-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having source/channel or drain/channel boundary regions |
| US7253437B2 (en) | 1990-12-25 | 2007-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Display device having a thin film transistor |
| JP2009170905A (en) * | 2008-01-15 | 2009-07-30 | Samsung Electronics Co Ltd | Display substrate and display device including the same |
-
1985
- 1985-08-20 JP JP60182229A patent/JPS6242566A/en active Pending
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6288367A (en) * | 1985-10-11 | 1987-04-22 | ゼネラル エレクトリツク カンパニー | transistor |
| EP0484987A2 (en) * | 1987-01-23 | 1992-05-13 | Hosiden Corporation | Thin film transistor |
| JPS63181473A (en) * | 1987-01-23 | 1988-07-26 | Hosiden Electronics Co Ltd | Thin-film transistor |
| EP0276002A2 (en) * | 1987-01-23 | 1988-07-27 | Hosiden Corporation | Thin film transistor |
| JPH0620135B2 (en) * | 1987-03-12 | 1994-03-16 | 株式会社東芝 | Method of manufacturing thin film element |
| JPS63224259A (en) * | 1987-03-12 | 1988-09-19 | Toshiba Corp | Method for manufacturing thin film elements |
| JPH0521801A (en) * | 1990-12-25 | 1993-01-29 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| US6838698B1 (en) | 1990-12-25 | 2005-01-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having source/channel or drain/channel boundary regions |
| US7253437B2 (en) | 1990-12-25 | 2007-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Display device having a thin film transistor |
| US7375375B2 (en) | 1990-12-25 | 2008-05-20 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
| JPH0521794A (en) * | 1991-02-04 | 1993-01-29 | Semiconductor Energy Lab Co Ltd | Dieleciric gate type field effect semiconductor device and fabrication thereof |
| EP0587520A1 (en) * | 1992-08-10 | 1994-03-16 | International Business Machines Corporation | A SiGe thin film or SOI MOSFET and method for making the same |
| JPH06112491A (en) * | 1992-08-10 | 1994-04-22 | Internatl Business Mach Corp <Ibm> | Field effect transistor |
| US5461250A (en) * | 1992-08-10 | 1995-10-24 | International Business Machines Corporation | SiGe thin film or SOI MOSFET and method for making the same |
| WO2002001641A1 (en) * | 2000-06-27 | 2002-01-03 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device |
| US6674131B2 (en) | 2000-06-27 | 2004-01-06 | Matsushita Electric Industrial Co., Ltd. | Semiconductor power device for high-temperature applications |
| JP2009170905A (en) * | 2008-01-15 | 2009-07-30 | Samsung Electronics Co Ltd | Display substrate and display device including the same |
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