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JPS6242244U - - Google Patents

Info

Publication number
JPS6242244U
JPS6242244U JP13474385U JP13474385U JPS6242244U JP S6242244 U JPS6242244 U JP S6242244U JP 13474385 U JP13474385 U JP 13474385U JP 13474385 U JP13474385 U JP 13474385U JP S6242244 U JPS6242244 U JP S6242244U
Authority
JP
Japan
Prior art keywords
insulating film
interlayer insulating
contact hole
multilayer wiring
wiring device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13474385U
Other languages
Japanese (ja)
Other versions
JPH0546274Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985134743U priority Critical patent/JPH0546274Y2/ja
Publication of JPS6242244U publication Critical patent/JPS6242244U/ja
Application granted granted Critical
Publication of JPH0546274Y2 publication Critical patent/JPH0546274Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の第一の実施例を示す平面図
、第2図はその断面図、第3図はこの考案の第二
の実施例を示す平面図、第4図はこの考案の第三
の実施例を示す平面図、第5図はこの考案の第四
の実施例を示す平面図、第6図はこの考案の第五
の実施例を示す平面図、第7図は従来例を示す平
面図、第8図はその断面図である。 1……基板、2……下部電極、3……層間絶縁
膜、5……上部電極、6……コンタクトホール、
7……凹凸状部、9〜12……凹凸状部。
Fig. 1 is a plan view showing the first embodiment of this invention, Fig. 2 is a sectional view thereof, Fig. 3 is a plan view showing the second embodiment of this invention, and Fig. 4 is a plan view showing the second embodiment of this invention. FIG. 5 is a plan view showing the fourth embodiment of this invention, FIG. 6 is a plan view showing the fifth embodiment of this invention, and FIG. 7 is a plan view showing the conventional example. The plan view shown in FIG. 8 is a sectional view thereof. DESCRIPTION OF SYMBOLS 1... Substrate, 2... Lower electrode, 3... Interlayer insulating film, 5... Upper electrode, 6... Contact hole,
7... Uneven portion, 9-12... Uneven portion.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板上に少なくとも下部電極と層間絶縁膜と上
部電極とを有し、前記層間絶縁膜に形成したコン
タクトホールを介して下部電極と上部電極とを接
続する多層配線デバイスにおいて、前記コンタク
トホールを少なくともその一辺又は一部に凹凸状
部を含む形状に形成したことを特徴とする多層配
線デバイス。
In a multilayer wiring device that has at least a lower electrode, an interlayer insulating film, and an upper electrode on a substrate, and connects the lower electrode and the upper electrode via a contact hole formed in the interlayer insulating film, the contact hole is connected to at least one of the contact holes. A multilayer wiring device characterized in that it is formed in a shape that includes an uneven portion on one side or a part thereof.
JP1985134743U 1985-09-03 1985-09-03 Expired - Lifetime JPH0546274Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985134743U JPH0546274Y2 (en) 1985-09-03 1985-09-03

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985134743U JPH0546274Y2 (en) 1985-09-03 1985-09-03

Publications (2)

Publication Number Publication Date
JPS6242244U true JPS6242244U (en) 1987-03-13
JPH0546274Y2 JPH0546274Y2 (en) 1993-12-03

Family

ID=31036269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985134743U Expired - Lifetime JPH0546274Y2 (en) 1985-09-03 1985-09-03

Country Status (1)

Country Link
JP (1) JPH0546274Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016171150A (en) * 2015-03-11 2016-09-23 株式会社東芝 Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6079748A (en) * 1983-10-06 1985-05-07 Sanyo Electric Co Ltd Multilayer interconnection structure for semiconductor integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6079748A (en) * 1983-10-06 1985-05-07 Sanyo Electric Co Ltd Multilayer interconnection structure for semiconductor integrated circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016171150A (en) * 2015-03-11 2016-09-23 株式会社東芝 Semiconductor device
US9947574B2 (en) 2015-03-11 2018-04-17 Kabushiki Kaisha Toshiba Semiconductor device

Also Published As

Publication number Publication date
JPH0546274Y2 (en) 1993-12-03

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