JPS6236431B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a time base error correction device (hereinafter abbreviated as TBC), and more specifically, to a correction device for correcting a velocity error (velocity error) of an input video signal extracted from the TBC. The present invention relates to a TBC equipped with a circuit and a comb filter that separates a luminance signal and a color signal from a video signal.

TBCs are generally used to correct time-base errors in playback signals from video tape recorders (VTRs), magnetic disks, etc., including time-base errors, by referring to stable synchronization signals. These time axis errors are caused by changes in the relative speed between the tape/magnetic head during recording and reproduction.
Video signals from VTRs or magnetic disks, etc.
First, TBC's analog-to-digital converter (A/
converted into digital form by a D converter),
stored in digital memory. This memory preferably has a storage capacity of one or more lines, and the output from the memory is converted into an analog video signal by a digital-to-analog converter (D/A converter).

The input video signal is converted to digital form by a clock rate determined by an oscillator on the input side. The frequency of the oscillator on the input side is
Follow the time axis fluctuations of the VTR output signal. The reading of information from the memory into the D/A converter is normally done under the control of an oscillator on the output side which is locked to a local synchronization signal. Therefore, the frequency becomes stable.

The operating principle is that information is written into memory at a speed based on the time-based variations from the VTR, but information is read from memory at a constant rate, eliminating time-based variations on the input video signal.
Here, the input side oscillator needs to generate clock pulses corresponding to the time axis fluctuations of the input signal. For this reason, a synchronization signal or a burst signal is generally separated from the TBC input video signal and a phased locked loop (PLL) is created based on this signal, but since the response time of this loop system is finite,
It is not possible to sufficiently follow the phase of the TBC input video signal. Various methods have already been proposed for this purpose. One example is the method described in Japanese Patent Application Laid-Open No. 48-61021. According to this method, the phase error is corrected for each burst signal, so the phase error is largest immediately before the LINE where the burst signal comes in. It turns out. In order to correct the speed error in this LINE, the readout clock pulse supplied to the D/A converter is supplied through a phase modulator, and a voltage corresponding to the speed error of the input oscillator is applied to this phase modulator. Due to speed errors in the line in addition to canceling out when reading
A method for reducing the residual phase error of TBC has also been proposed.

At this time, the clock supplied to the D/A converter can be commonly used as the clock for reading data to the memory.

On the other hand, when separating the luminance signal and chroma signal from the TBC output video signal and performing various signal processing such as level adjustment, phase adjustment, waveform shaping, chroma phase inversion, blanking gate, etc., conventional methods have been very simple. The TBC output signal was separated into a luminance signal and a chroma signal using a low-pass filter or a high-pass filter. Also, as a complicated method,
A comb filter is used to utilize the line correlation of the television signal to separate the luminance signal. The reason why the latter is superior to the former is that if there is a luminance signal component and a component close to the color subcarrier frequency, the former separates the luminance component as a chroma component, whereas the latter separates it based on the presence or absence of line correlation. Therefore, even if the luminance component is close to the color subcarrier, it can be reliably separated as long as there is no phase or correlation before and after the line.

Generally, in an NTSC color television signal, the phase of the color signal is inverted for each scanning line, so it is possible to distinguish between the color signal and the luminance signal by looking at the phase difference before and after the scanning line. However, since a television signal that has a sudden phase change for each scanning line may cause an error in discrimination, a method of further inserting a high-pass or low-pass filter after the comb filter is also used.

In a comb filter, it is difficult to easily create a delay line with a delay that is an integral multiple of the scanning line, and in general, the video signal is first converted to an AM or FM signal, passed through a glass delay line, delayed, and then retransmitted into the video signal. A method of converting it into a signal is used, which is expensive in terms of cost and is not completely satisfactory in terms of accuracy.

As a way to solve such problems, TBC
A digital delay circuit is provided between the internal memory and the D/A converter, a comb filter is configured, the digital signal is separated into a luminance signal and a chroma signal, each signal is processed, and then the two are mixed.
Supplies to D/A converter. This is because, compared to an analog signal, a delay of an integral multiple of a scanning line in a digital signal can be made highly accurate and stable using a digital memory element. However, when a comb filter is inserted between the memory and the D/A converter in this way, the comb filter processes the video signal, but no processing is done for speed errors. The correlation with the video signal is lost due to the lack of
It becomes impossible to completely correct speed errors in the video signal.

An object of the present invention is to provide a correction circuit that corrects speed errors even when such a comb filter is inserted.

An embodiment of the present invention is shown in FIG. 1, and waveforms at that time are shown in FIG. 2. In FIG. 1, a TBC input video signal 11 is supplied to an A/D converter 12 and a burst separation circuit 13, which separates a burst signal from the video signal 11 and supplies it to an oscillator 14. The oscillator 14 generates a write lock (continuous wave) 15 with burst instantaneous phase lock, and outputs a write lock (continuous wave) 15 to the A/D converter 12 and memory control 1.
Supply to 8. In addition, the phase error 16 between the continuous wave 15 and the burst is detected for each line and supplied to the capacitor memory 19, and the memory control 18
are stored sequentially under control from On the other hand, the A/D converter 12 converts the video signal 11 into the write clock 15.
Based on this, the data is converted into, for example, an 8-bit PCM code and supplied to the main memory 17, where it is sequentially stored under control from the memory control 18.

Next, the information stored in the memory is supplied to the memory control 18 through the phase modulator 21 using a read clock generated by the read clock generator 20, and is sequentially read out. This main memory output 51
is provided to a one line delay 22 and an adder 24. The one line delay 22 output is further provided to a one line delay 23 and adders 27 and 28. The one line delay 23 output goes to the adder 24 and is added to the memory output 51 of two lines before, where if the same signal is repeated line by line,
The level of both the luminance component and the color component will increase by 6 dB.

The output of the adder 24 enters the 6dB attenuator 25 for 6dB
After being attenuated, the signal is supplied to a phase inverter 26 and an adder 28.

In adder 28, 1 line delay 22 output and 6dB
The output of the attenuator 25 is added, and the color component becomes 1.
Since the phase differs by 180° due to the line delay difference, only the luminance component is subtracted and added, and is supplied to the luminance signal processing circuit 30 as a luminance signal 56.

On the other hand, the adder 27 adds the output of the one-line delay 22 and the output of the phase inverter 26, subtracts the luminance component, adds the color component, and supplies the resulting signal to the color signal processing circuit 29 as a color signal 55.

The chrominance signal processing circuit 29 and the luminance signal processing circuit 30 perform level adjustment, phase adjustment, waveform shaping, blanking gate, contour compensation as necessary, crispening of noise components, and 1 field or 1 field adjustment. Chroma inversion, etc., in which the phase of the chroma component is inverted for each frame, matching the sequence of the television signal, is applied to a television signal that repeats the same pixel of the frame (for example, a static reproduction state of a VTR or a reproduction signal of a magnetic disk). The newly generated synchronization signal and burst signal are added to the luminance signal and the chromaticity signal, respectively, and after being combined, both are supplied to the D/A converter 32, where they are converted into analog signals. , TBC video output 33
It is supplied to the outside as

The speed error signals stored in the capacitor memory 19 are sequentially read out by the memory control 18. This capacitor memory output speed error 52 is such that the speed error when the main memory output video signal 51 is written to each memory at the same timing is not read out, but the speed error one line before it is read out. It is controlled by a memory control 18.
This is because the speed error detection is delayed by one line from the video signal containing the actual speed error. Furthermore, the storage capacity of the main memory 17 and that of the capacitor memory 19 are generally equal, and 1 to 32 lines are normally used.

The capacitor memory output speed error 52 is caused by a sampling and holding circuit 36 that is supplied to a sampling and holding circuit 36 that delays one line and a mixing circuit 38 in the same way as in the video signal system described above.
The output is supplied to a sampling and holding circuit 37 and a mixing circuit 40, which further performs a one-line delay. The output of the sampling hold circuit 37 enters the mixing circuit 38, is mixed with the capacitor memory output speed error 52, enters the 6 dB attenuator 39, is attenuated by 6 dB, enters the mixing circuit 40, is mixed with the output of the sampling hold circuit 36, and becomes a mixing output. It is supplied to the sawtooth wave signal generator 41 as a speed error 59, and a sawtooth wave with a voltage corresponding to the voltage of 59 is instantaneously generated by resetting the sawtooth wave time constant circuit with the reset pulse 41A, and is phase modulated. The speed error component contained in the video signal output from the adder 31 is phase-modulated in the opposite direction by the amount of the component, thereby changing the phase of the readout clock pulse and changing the phase of the speed error component contained in the video signal output from the adder 31. The current speed error is canceled.

In this way, when speed error correction is performed in the present invention, signals from the same or similar pixels are output from the comb filter across the previous and subsequent scanning lines, and the speed error is processed in the same manner as the comb filter. Good speed error correction can be performed. This is because by passing through a comb filter, the comb filter adds the speed error over, for example, 3 lines, and if you add the speed error in the same way as that, the speed included in the video signal output from the comb filter can be calculated. This is because you can obtain something that corresponds to the error.

Furthermore, if there is no correlation between signals before and after the scanning line, there will be no correspondence between the video signal output from the comb filter described above and the speed error created as in the present invention. This means that the speed errors contained in the comb filter output video signal are not added together over the lines to create a new signal.
It is considered that the individual signals are simply mixed together, and good speed error correction cannot be achieved unless correction is made using the speed error corresponding to each individual signal.

However, in general, the speed error component of the main memory output 51 television signal has a noticeable effect on the chromaticity signal, but is hardly perceivable in the luminance signal, the frequency band of the chrominance signal itself is narrow, and the scanning line The effect of the speed error is more noticeable when the chromaticity signals before and after are the same or similar signals. In other words, it is only necessary to correct speed errors for video signals in which the chromaticity signal is repeated in the same way on a scanning line.

Therefore, by performing speed error correction as in the present invention, it is possible to eliminate the effects of speed errors that are actually noticeable. Main memory 17 in FIG.
may be one or more frames, and may be used as a frame synchronizer.Also, the capacitor memory 19 may be a digital memory, and an analog-to-digital converter may be provided between it and its input (in this case,
digitize up to 40 and place a D/A converter between 40 and 41).

In the case where the oscillator 14 does not instantaneously phase-lock to bursts and is controlled in phase on an average basis,
Speed error correction can be performed by setting the reset level of 1 to the speed error voltage of the previous line.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a time axis correction device according to the present invention, and FIG. 2 is a waveform diagram of each part of the embodiment shown in FIG.

Claims (1)

[Claims] 1. An A/D converter that A/D converts a television video signal including a time axis error, an oscillator that generates a write clock locked to a burst signal of the video signal, and an oscillator that converts the write clock and the burst signal in phase. A speed error detector for comparing and extracting speed errors, a video memory for storing output information of the A/D converter, a speed error memory for storing the speed error, and generating a read clock for the video memory. an oscillator; a comb filter that utilizes the correlation between television scan lines receiving the output of the video memory; a compensation filter having substantially the same characteristics as the comb filter that receives the speed error from the speed error memory; a phase modulator that modulates the phase of the readout clock according to a speed error from the filter; and a D/A converter that converts the output of the comb filter into an analog video signal using the readout clock from the phase modulator as latch timing. A time axis error correction device comprising: