JPS6235516A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6235516A JPS6235516A JP17455185A JP17455185A JPS6235516A JP S6235516 A JPS6235516 A JP S6235516A JP 17455185 A JP17455185 A JP 17455185A JP 17455185 A JP17455185 A JP 17455185A JP S6235516 A JPS6235516 A JP S6235516A
- Authority
- JP
- Japan
- Prior art keywords
- light
- impurity
- gas
- substrates
- temperature gradient
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【発明の詳細な説明】
〔概要〕
化学気相成長(CV D)法において、ガス流方向に温
度勾配を持たせると共に、その低温部で不純物ガスのみ
を光化学反応で分解可能な波長の光を照射し、基板間の
膜厚を均一にすると共に不純物濃度の均一性も良くする
。[Detailed Description of the Invention] [Summary] In the chemical vapor deposition (CVD) method, a temperature gradient is created in the direction of gas flow, and at the same time, light of a wavelength that can decompose only impurity gases by photochemical reaction is emitted in the low temperature part. irradiation to make the film thickness uniform between the substrates and improve the uniformity of the impurity concentration.
本発明は化学気相成長法(CV D)を用いた半導体装
置の製造方法に係り、特に基板上に均一な膜厚で均質な
成長層を得る方法に関する。The present invention relates to a method of manufacturing a semiconductor device using chemical vapor deposition (CVD), and particularly to a method of obtaining a homogeneous growth layer with a uniform thickness on a substrate.
薄膜形成技術の一つである化学気相成長法(Cemic
al Vapor depositi。Chemical vapor deposition (Cemic) is one of the thin film formation techniques.
al Vapor depositi.
n、CVD法)は、集積回路製造プロセスの重要なプロ
セスの一つとなっている。しかし、ウェハその一つに、
ウェハ間の堆積膜厚のバラツキを抑えることがある。CVD (CVD) has become one of the important processes for manufacturing integrated circuits. However, one of the wafers
Variations in deposited film thickness between wafers may be suppressed.
一般に、量産用CVD装置では、バッチ処理方式を採用
しているので、原料ガスのガス流方向への消費により、
下流のウェハの膜厚が薄くなる傾向がある。Generally, CVD equipment for mass production uses a batch processing method, so the raw material gas is consumed in the gas flow direction.
There is a tendency for the film thickness of downstream wafers to become thinner.
そのため、この成長膜厚のバラツキをなくす為、ガス流
方向に温度勾配を持たせることがなされている。Therefore, in order to eliminate this variation in the thickness of the grown film, a temperature gradient is created in the gas flow direction.
しかし、上記において、反応槽内に同時に不純物ガスを
導入し、不純物ドープ薄膜を形成する場合には、不純物
濃度の均一性が確保できないという問題が生じる。However, in the above method, when an impurity gas is simultaneously introduced into the reaction tank to form an impurity-doped thin film, a problem arises in that the uniformity of the impurity concentration cannot be ensured.
即ち、前記したように、ウェハ間のB’A厚の均一性を
確保するために、ガス流方向に温度勾配をもたせると、
不純物ガスはガス流方向への消費は微小だが、温度勾配
に大きく影響されるため、低温部では低不純物濃度、高
温部では高不純物濃度となり、ウェハ間で均一な不純物
濃度は得られない。本発明はこの問題を解決し、ウェハ
間の膜厚と膜質の均一性を確保しようとするものである
。That is, as described above, in order to ensure uniformity of B'A thickness between wafers, if a temperature gradient is created in the gas flow direction,
The consumption of impurity gas in the gas flow direction is small, but it is greatly affected by the temperature gradient, so the impurity concentration is low in the low temperature area and high in the high temperature area, making it impossible to obtain a uniform impurity concentration between wafers. The present invention aims to solve this problem and ensure uniformity in film thickness and film quality between wafers.
(問題点を解決するための手段〕
本発明においては、反応槽中の原料ガス流方向に複数の
基板を配設し、該基板上に形成される膜厚を均一にする
ために温度勾配を持たせると共に、不純物ガスを導入す
る化学気相成長(CVD)法において、
該温度勾配での低温部に、光化学反応で該不純物ガスの
みを分解可能な波長の光を照射するようにする。(Means for Solving the Problems) In the present invention, a plurality of substrates are arranged in the flow direction of the raw material gas in a reaction tank, and a temperature gradient is created to make the thickness of the film formed on the substrates uniform. In the chemical vapor deposition (CVD) method in which an impurity gas is introduced, the low temperature part of the temperature gradient is irradiated with light having a wavelength that allows only the impurity gas to be decomposed by a photochemical reaction.
〔作用〕
上記において、温度勾配により複数の基板間の膜厚をバ
ラツキなく形成することが可能になると共に、光照射に
より低温部での不純物ガスの分解能になる。その際、膜
堆積用原料ガスは光の作用を受けないものを選定するこ
とが必要である。[Function] In the above, the temperature gradient makes it possible to form a film with uniform thickness among a plurality of substrates, and the light irradiation makes it possible to resolve impurity gases in a low temperature area. At this time, it is necessary to select a raw material gas for film deposition that is not affected by light.
以下に、本発明の実施例として、シリコン多結晶を堆積
する例を示す。An example of depositing silicon polycrystals will be shown below as an embodiment of the present invention.
第1図(A)に反応層内のシリコン・ウェハ3と原料ガ
ス流及び温度分布を表している。FIG. 1(A) shows the silicon wafer 3, source gas flow, and temperature distribution in the reaction layer.
多結晶シリコンを成長させる原料ガスとしてモノシラン
(SiH4)を用いる。一方、不純物ガスとしてはフォ
スフイン(PH3)或はジポラン(82H6)を用いる
。Monosilane (SiH4) is used as a source gas for growing polycrystalline silicon. On the other hand, phosphine (PH3) or diporane (82H6) is used as the impurity gas.
第1図(B)にこれら各ガスの吸収特性を示すように、
モノシラン(SiH4)は波長約170nmの光でなけ
れば光分解しないのに対し、不純物ガスのフォスフイン
(PH3)、 ジボラン(B2 Hs )は波長250
nm以下の光で分解出来る。As shown in Figure 1 (B), the absorption characteristics of each of these gases are as follows.
Monosilane (SiH4) will not be photodecomposed unless it is exposed to light with a wavelength of approximately 170 nm, whereas the impurity gases phosphine (PH3) and diborane (B2 Hs) are exposed to light with a wavelength of approximately 250 nm.
It can be decomposed by light of nm or less.
従って、本実施例で光源として低圧水銀ランプ(波長1
84.9nm、254.7nm)を用いることにより、
不純物ガスのみ分解可能となる。Therefore, in this example, the light source is a low-pressure mercury lamp (wavelength 1
84.9nm, 254.7nm),
Only impurity gas can be decomposed.
その結果、低温部で多結晶シリコンの堆積は促進するこ
となく、不純物のドープのみが促進され、ウェハ間で、
膜厚の均一化と共に、不純物濃度の均一化も達成される
。As a result, only the doping of impurities is promoted without promoting the deposition of polycrystalline silicon in the low-temperature region.
In addition to uniform film thickness, uniform impurity concentration is also achieved.
第2図に、本実施例に用いるCVD装置の概要をしめし
ている。図に於いて、1は加熱用コイル、2は反応槽、
3はウェハ、4は低圧水銀ランプである。第1図におい
て、反応槽2の右側がガス排気口側であるので高温にな
っている。従って、反応槽2の左側に低圧水銀ランプを
設けている。FIG. 2 shows an outline of the CVD apparatus used in this example. In the figure, 1 is a heating coil, 2 is a reaction tank,
3 is a wafer, and 4 is a low-pressure mercury lamp. In FIG. 1, the right side of the reaction tank 2 is at a high temperature because it is the gas exhaust port side. Therefore, a low pressure mercury lamp is provided on the left side of the reaction tank 2.
リンドープ多結晶シリコンを堆積する場合についてしめ
すと、通常の化学洗浄を施したSiウェハ3を反応槽2
ヘセソトした後、反応槽を約10′″3(Pa)まで真
空引する。In the case of depositing phosphorus-doped polycrystalline silicon, a Si wafer 3 that has been subjected to ordinary chemical cleaning is placed in a reaction tank 2.
After drying, the reaction vessel was evacuated to about 10'3 (Pa).
次に、不活性ガスである窒素を10(Pa)程度反応槽
2へ導入しながら、加熱用コイル1により所定の温度(
600〜900℃)に昇温すると共に、低圧水銀ランプ
4を動作させる。照射光の強度は10 m W / c
m2程度とした。Next, while introducing nitrogen, which is an inert gas, into the reaction tank 2 at a pressure of about 10 (Pa), the heating coil 1 is used to maintain a predetermined temperature (
600 to 900[deg.] C.), and the low-pressure mercury lamp 4 is operated. The intensity of the irradiated light is 10 mW/c
It was set to about m2.
シリコンウェハ3が所定の温度に達した後、反応ガスで
あるモノシラン(SiH4)、及びフォスフイン(PH
3)を反応槽2に導入し、多結晶シリコンの堆積を行な
う。After the silicon wafer 3 reaches a predetermined temperature, reaction gases monosilane (SiH4) and phosphine (PH
3) is introduced into the reaction tank 2 to deposit polycrystalline silicon.
以上、実施例を示したが、本発明はこれに限ることなく
、化学気相成長法により膜厚と膜質の均一な成長層を形
成する場合に広く通用できるものであり、例えば、原料
ガスとしてモノシラン(SiH+)の他、ジクロルシラ
ン(SiH2CI2)、トリクロルシラン(SiHCl
2)等を用いることもできる。Although the embodiments have been described above, the present invention is not limited thereto, and can be widely used when forming a grown layer with uniform thickness and quality by chemical vapor deposition. In addition to monosilane (SiH+), dichlorosilane (SiH2CI2), trichlorosilane (SiHCl
2) etc. can also be used.
度の均一化をも図ることができるため、半導体の製造工
程に寄与する所大である。Since it is also possible to achieve uniformity in temperature, it is a great contribution to the semiconductor manufacturing process.
第1図(A)、 (B)は、それぞれ本発明の実施例
の反応層内の状態を示す模式図、及び原料ガスと不純物
ガスの吸収特性を示す説明図、第2図は、本発明の実施
例に用いるCVD装置の概要図である。
1・・・加熱用コイル
2・・・反応層
3・・・ (Si)ウェハ
4・・・低圧水銀ランプFIGS. 1(A) and 1(B) are schematic diagrams showing the state inside the reaction layer of the embodiment of the present invention, and explanatory diagrams showing the absorption characteristics of raw material gas and impurity gas, respectively. FIG. 2 is a schematic diagram of a CVD apparatus used in the embodiment. 1... Heating coil 2... Reaction layer 3... (Si) wafer 4... Low pressure mercury lamp
Claims (1)
基板上に形成される膜厚を均一にするために温度勾配を
持たせると共に、不純物ガスを導入する化学気相成長(
CVD)法において、 該温度勾配での低温部に、光化学反応で該不純物ガスの
みを分解可能な波長の光を照射することを特徴とする半
導体装置の製造方法。[Claims] A plurality of substrates are arranged in the flow direction of the raw material gas in a reaction tank, and a temperature gradient is provided to make the film thickness formed on the substrates uniform, and an impurity gas is introduced. Chemical vapor deposition (
1. A method for manufacturing a semiconductor device, comprising: irradiating a low-temperature part of the temperature gradient with light having a wavelength that allows only the impurity gas to be decomposed by a photochemical reaction in the CVD method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17455185A JPH071753B2 (en) | 1985-08-08 | 1985-08-08 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17455185A JPH071753B2 (en) | 1985-08-08 | 1985-08-08 | Method for manufacturing semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6235516A true JPS6235516A (en) | 1987-02-16 |
JPH071753B2 JPH071753B2 (en) | 1995-01-11 |
Family
ID=15980532
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17455185A Expired - Lifetime JPH071753B2 (en) | 1985-08-08 | 1985-08-08 | Method for manufacturing semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH071753B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6328030A (en) * | 1986-07-21 | 1988-02-05 | Seiko Epson Corp | Compound semiconductor crystal growth method |
US5250463A (en) * | 1990-06-26 | 1993-10-05 | Kabushiki Kaisha Toshiba | Method of making doped semiconductor film having uniform impurity concentration on semiconductor substrate |
-
1985
- 1985-08-08 JP JP17455185A patent/JPH071753B2/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6328030A (en) * | 1986-07-21 | 1988-02-05 | Seiko Epson Corp | Compound semiconductor crystal growth method |
US5250463A (en) * | 1990-06-26 | 1993-10-05 | Kabushiki Kaisha Toshiba | Method of making doped semiconductor film having uniform impurity concentration on semiconductor substrate |
US5702529A (en) * | 1990-06-26 | 1997-12-30 | Kabushiki Kaisha Toshiba | Method of making doped semiconductor film having uniform impurity concentration on semiconductor substrate and apparatus for making the same |
Also Published As
Publication number | Publication date |
---|---|
JPH071753B2 (en) | 1995-01-11 |
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