JPS62286493A - Toy moving in synchronous elation to sound source - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a mechanism that moves in synchronization with a sound source. More specifically,
The present invention provides voice or sound from a toy.
und) and which have moving parts that move synchronously.

Mechanisms that move in sync with the sound source are appealing to both adults and children. For example, Cantoli Bena Giampoli (Co) is performed at Disneyland in Anaheim, California.
In the entry Bear Jamboree, a group of bears and other characters move their eyelids, lips, and limbs as they sing and talk. A large number of people are enjoying this special performance.

For greater enjoyment by the customer, it is highly desirable to have a porta-pull mechanism, such as a toy character that moves in synchronization with the sound source. Additionally, it would be desirable to have an improved drive mechanism to provide the motion, improved circuitry and mechanisms to synchronize the motion to the sound source, and to have a character in which the sound and motion can be varied in a wide variety of ways. Additionally, it is also desirable to provide synchronization of one or more mechanisms, such as multiple toys or multiple characters, to the sound source. In this way, the lively characters convey dialogue and otherwise interact to add specificity to their activities. Therefore,
A need exists for toys and other mechanisms whose movements are synchronized to a sound source and have these and other advantageous characters.

SUMMARY OF THE INVENTION The present invention provides a mechanism for synchronizing movement caused by a sound source, such as movement of one or more parts of a toy character. In the illustrated embodiment, a cassette tape deck is contained within the body of a toy character, such as a bird, although other sources may be used. The tape deck is used to play prerecorded cassettes to play audio information on one channel of the tape deck and data information on the second channel. The audio information is amplified and transmitted to speakers inside the bird, so the bird can talk and sing as needed. Data from the data channel is decoded by a decoder and, in response to the data, the drive mechanism is operated to move the desired part of the bird.

If one or more selectable satellite characters are used, the data channel may also contain a bird or other master character.
r) Convey address information to. Audio from the master character is blocked if the satellite character is addressed and the decoder determines that audio should be emitted on behalf of the master character. Each satellite character includes one or more drive mechanisms that move various parts of the character. Each satellite character includes a decoder as a decoded character in the master character to decode data information and control the movement of the satellite character when the decoder determines that the character is addressed. Additionally, each satellite character typically includes a speaker circuit so that they can sing, speak, and actually communicate with the master character. However, only the master character needs to be equipped with a tape deck. The movements and voices of the various characters can be changed simply by changing the cassette.

Accordingly, it is an overall object of the present invention to provide an improved toy or other mechanism having moving parts that are synchronized with a sound source.

Another object of the invention is to provide a toy that is sensitive to data and audio signals recorded on cassette tape or other sources.

Yet another object of the invention is to provide a toy comprising one or more characters, each character having a movable part that moves in synchronization with an audio signal.

Another object of the invention is to provide a toy that is durable, reliable and relatively inexpensive.

Another object of the invention is to provide a drive mechanism for a toy that is relatively simple, compact, and extremely quiet, yet requires relatively little power to produce the desired movements. It is.

These and other objects, features and advantages of the invention will become apparent with reference to the following description and drawings.

EXAMPLE Drive Mechanism Figures 1 through 8 depict a bird character having various movable body parts driven by a drive mechanism according to the present invention. However, the drive mechanism is equally suitable for moving other characters and elements of the system. Moreover, the circuit described below is suitable for other characters and applications as well.

Referring to FIG. 1, the bird's head lO has an upper fixed beak 12 and a lower movable beak 14 pivoted on the head at a pivot 16. Pivot 16 is positioned midway between the ends of beak 14. The beak 14 is a lever part 1 positioned within the head 10
It has 8. The lever 18 is a toothed rack.
ed rack) 20. rack 20
pivot 1 in each direction generally indicated by arrow 22
6, the exposed portion of beak 14 moves correspondingly as indicated generally by arrow 24. Part 1
A pair of eyes, one numbered 26, are securely mounted on the head 10.

Cup-shaped eyelid 28 is pivoted onto eye 26 at position 30. The eyelid 28 is formed by a lever 32 which projects into the head 10 and terminates in a rack 34. The eyelids are mounted such that rack 34 is driven about pivot 30 generally in the direction of arrow 36 and correspondingly moves eyelid 28 as indicated by arrow 38. Each eyelid may include an independent drive mechanism. However, the eyelids are typically interconnected such that one drive mechanism causes both of the bird's eyes to blink simultaneously.

The drive mechanism for the lower beak 14 is shown in FIG. 2 and includes a conventional small DC motor 40. motor 40
depends on the polarity of the voltage applied to the motor
can be rotated in either direction. Pulley 44 is mounted on shaft 42 and connected by belt 46 to a larger drive pulley 48.

Pulley 48 is supported by a shaft 50 that is pivotally mounted to head 10. Gear 52 is driven by shaft 50 and positioned to mesh with rack 20. Thus, when motor 40 operates, shaft 50 is driven by pulleys 44,48 and gear 52 rotates to produce the desired movement of rack 20 and beak 14. Upper and lower stops 54,56, not shown in FIG. 1, prevent gear 52 from being driven out of rack 20. Also, belt 4
6 slip to prevent the drive mechanism from being damaged under high load conditions.

The use of drive gears and racks ensures the accuracy and quality of the beak 14 (
Generate prescribed motion. Additionally, both high speed and low speed motors may be used if desired. Furthermore, this drive mechanism is mechanically simple, extremely quiet and reliable.
Reliable.

The eyelid drive mechanism shown in FIG. 3 is similar to the lower beak drive mechanism shown in FIG.

Therefore, the corresponding elements in Figure 3 are numbered the same as those in Figure 2, but are given the letter "a" to distinguish them from the elements in Figure 2. .

The head in FIG. 4 is similar to the head in FIG.

However, in FIG. 4, the upper beak 12 is pivoted onto the head lO at an intermediate point 60, while the lower beak 14 is fixed. Additionally, beak 12 includes an internal lever portion 62 terminating in a rack 64 . When rack 64 is driven about pivot 60 in the direction indicated by arrow 66, the exposed portion of beak 12 moves as indicated by arrow 68. The eyes 26 are also pivoted to the head 10 at 70. A lever 72 extends within the head 10 from behind the eye and terminates in a rack 74. Rack 7
4 is driven around pivot 70 in the direction of arrow 76, a corresponding movement of eye 26 occurs. The bird's two eyes may be interconnected to move simultaneously if desired.

5 and 6 show additional parts of the drive mechanism used to move the eyes 26 and upper beak 12 of the character of FIG. Since these temple structures are similar to the shank and groove of FIG. 2, corresponding parts are designated by corresponding numbers with the letters "b" and "C" respectively.

Therefore, these drive mechanisms will not be discussed in detail.

FIG. 7 depicts the internal drive mechanism utilized to move the bird tail 84 of FIGS. 1 and 4 in the direction generally indicated by arrow 86. The drive mechanism of FIG. 7 includes an upwardly extending, angled, inverted arm 88 rigidly mounted on a pivot 90 that is pivoted on the bird's body. Internal coil spring 92
is connected to the tail 84 at one end 94 and to the distal portion of the arm 88 at the other end 96. The fan-shaped lever 98 is the pivot 90
at one end 100 and includes a rack 102 at the other end. Arm 88 and rack 102 are positioned for movement in a plane perpendicular to the axis of pivot 90.

Additionally, lever 98 and arm 88 typically project from pivot 90 in directions perpendicular to each other. The remainder of the drive mechanism of FIG. 7 is similar to that shown in FIG.

Accordingly, corresponding elements are numbered correspondingly, except that the element in FIG. 7 includes the letter "d". In this manner, lever 98 pivots pivot point 90 when gear 52d is driven by motor 40d.

This pivots arm 88 and moves tail 84. Spring 92 moves tail 84 in response to movement of arm 88.
some wagging motion
give. This movement mimics the movement of the bird's tail.

FIG. 8 generally shows arrow 1 of the head 10 of FIGS. 1 and 4.
The internal drive mechanism used to move in the direction indicated by 04 is shown. In the form of FIG. 8, the head 10 is connected to the mounting block 1 on the shaft 108.
Connected to 06. The shaft 108 is attached to the bird's body.
Pivoted at 10 and hidden in the bird's neck. The length of shaft 108 is variable depending on the desired length of the bird's neck. Additionally, the neck is made of a flexible material. Therefore, the neck can be twisted in the direction of arrow 104 as shaft 108 pivots, even though it is difficult to see in FIG. However, the lever 112 is rigidly coupled to the shaft 108 and projects therefrom in a direction generally perpendicular to the shaft axis.The rack 114 is pivoted at the distal end of the lever 112 and is similar to that shown in FIG. Accordingly, elements of the drive mechanism in Figure 8 that correspond to Figure 2 are similarly numbered, except that the elements in Figure 8 include the letters reJ. In the drive mechanism shown in FIG. 8, when the gear 52e is driven by the motor 40e, the shirt eye 08 and the head 10 are twisted.

Although not shown in FIGS. 7 and 8, the levers 98, 1
12, the gears 52d and 52e are connected to the racks 102 and 1
It is equipped with a stop that prevents it from moving away from 14.

ELECTRICAL CIRCUIT Referring to FIG. 9, the bird character plays a prerecorded cassette tape such that the audio is played on one channel 142 of the tape deck and the data information is played on the other channel 144. It has a deck 140. Tape deck 140 is conventional and includes a motor 148 controlled by a motor regulator circuit 146. When the cassette tape is inserted into the tape deck, the main switch 150 is closed. There, power is passed through switch 150 to battery bag 1.
52 to a motor regulating circuit 146, which operates the tape deck to play cassette tapes. Of course, record players and other playback devices could also be used.

The audio signal on channel 142 is routed to dual preamplifier circuit 1
46' to the non-inverting input of an amplifier 144'. This circuit includes a second amplifier 148' having its non-inverting input connected to data channel 144 for purposes described below. Each amplifier 144
', 148' each have a resistive-capacitive feedback circuit 150', 152' connected from the output to the inverting input of the associated amplifier. amplifier 1
The amplified audio signal from 44' is connected to a DC blocking capacitor 154 and a volume control potentiometer 156.
is coupled to audio amplifier 158 through. amplifier 1
The amplified signal from 58 is coupled through a capacitor 160 to a speaker 162 located on the bird's head 10. Thus, songs, chatter, and other sounds recorded on cassette tape and played on audio channel 142 are conveyed to the character. The volume of the audio is adjusted by potentiometer 156.

Data on data channel 144 is amplified by amplifier 148' and passed through capacitor 164 to decoder circuit 1.
68 data inputs 166. In the illustrated embodiment, data in the form of a frequency modulated signal is provided to a decoder, as described in detail below. One typical data signal is labeled "input" in FIG. Decoder 168 determines from the data signal the drive mechanism to be operated and the desired direction of operation. The decoder has multiple output channels, each for a motor drive. These two channels, C
H, 1 and CH, 2 are the lower beak drive motor 40 (Fig. 2) and the eyelid drive motor 40a (the third
9) for driving the motor. Additional outputs, not shown, are provided to drive additional motors as required.

More specifically, the decoder 168 outputs CH,l;
R, also labeled 170, 172. Moreover, the decoder has the output LSR of C1l,2
, and are also labeled 174 and 176.

The output 170 is connected to the PNP (PNP) Range Meta 1 F80 base through a resistor. The emitter of transistor 178 is connected to the supply voltage (+V) from battery pack 152. The collector of this transistor is connected to one end 180 of the beak drive motor 40. The other end 182 of the motor 40 is connected to a battery pack terminal 184 at approximately half +V. diode 18
6 has its anode connected to the collector of transistor 178 and its cathode connected to the emitter of this transistor. Moreover, the output 1 of CH,1
72 is connected to the base of an NPN transistor 188 through a resistor.

Transistor 188 has its emitter connected to ground and its collector connected to both the collector of transistor 178 and line 180. diode 19
0 has its anode connected to the emitter of transistor 188 and its cathode connected to the collector of this transistor.

When connected in this manner, when CHol's L output 170 is at a positive or logic "1" level and CHol's R output 172 is at a "0" logic level, transistor 17
8 and 188 are both off. In this case, motor 4
0 does not work. On the other hand, the output of CH,l is 170
Assume that under the control of decoder 168 falls to a "0" logic level. In this case, transistor 178 is conductive. At that time, through the transistor 178 and the motor 4
Current flows from the positive voltage supply to drive the motor and beak in a first direction through zero. On the other hand, if CH,1's R output 172 changes to a positive or logic "l" level, transistor 188 becomes conductive. Current is then passed through motor 40 and transistor 188 to terminal 1.
84, which drives the motor and moves the beak in the opposite direction.

The L output 174 of C11,2 is connected through a resistor to the base of a PNP transistor 196. The emitter of this transistor is connected to a positive voltage supply.

Further, the collector of this transistor is connected to one end 198 of the eyelid drive motor 40a. motor 40
The other end 200 of a is connected to the terminal 184 of the power pack. The collector of transistor 196 is also connected to the anode of diode 202, which has its cathode connected to the emitter of this transistor. Moreover, the R output 176 of CH12 is
It is connected through a resistor to the base of an NPN transistor 204 whose transmitter is grounded. transistor 20
The collector of 4 is also connected to the 198 side of motor 40a and the collector of transistor 196. Diode 206 has its anode connected to ground and its cathode connected to the collector of the transistor.

As controlled by decoder 168, CH,2 and output 1
When 74 is at a positive or logic "1" level and CH12's R output 176 is at a "0" logic level, both transistors 196, 2o4 are off. in this case,
The motor 40a is not driven and the character's eyelids remain stationary. CH12 under the control of decoder 168
When the L output 174 of the transistor 196 falls to 0, the transistor 196 becomes conductive. In this case, current flows from the voltage source to battery terminal 184 through transistor 196 and motor 40a. This drives motor 40a in one direction and moves the eyelids accordingly.

When the R output 176 of CH,2 changes to a positive or logic "1" level under the control of decoder 168, transistor 204 conducts. In this case, current flows from terminal 184 through motor 40a and transistor 204. This drives motor 40a and the eyelids in opposite directions.

The toy may include one or more selectable satellite puppets or satellite characters, which are indicated at 21 in FIG.
It is marked 0. The audio output from amplifier 144' is provided through line 212 and a resistor to satellite puppet audio input 214. Satellite puppets have the same audio circuitry as the master character,
Satellite puppets can therefore also emit sound. Additionally, the data output from amplifier 148' is provided via line 216 and through a resistor to satellite puppet data input 218. In addition to transmitting information used to control the movements of the torso sections, data channel 144 also communicates with satellite puppets 21
Send address information to indicate that 0 is being addressed. If the satellite puppet is addressed, the decoder 168 limits and prevents the master character's drive mechanism from responding to the drive of the motor control data for the satellite puppet. On top of that,
Satellite puppet 210 also includes a movable body portion and a drive mechanism for the portions similar to the mechanism shown in FIGS. 1-8. Based on the limitations to which it is addressed, the satellite puppet decoder is responsive to data signals that control the satellite puppet drive mechanism and its movement.

With address information, data channel 144 conveys instructions to selectively mute the bird or master character as desired. When decoder 168 detects that a mask-character is to be muted, a muting signal is communicated from output 220 of decoder 168 to a switch (not shown) in audio amplifier 158. In response to the muting signal, the output from audio amplifier 158 is blocked and the master character does not speak or otherwise emit sound.

The decoder in the satellite puppet 210 is the decoder 1
68 also includes a muting signal for selectively muting the satellite puppets.

In this manner, depending on the information on data channel 144, the audio is controlled from different characters. Thus, for example, it is possible to actually control the delivery of the dialogue or the singing along. Moreover, only one tape deck 140 is required so that all information is conveyed through the master character to the various satellite puppets.

Decoder Circuit Overview The decoder circuit 168 and its operation will now be described with reference to FIGS. 10 and 11. In the illustrated embodiment, the data and satellite puppet address information arriving at the decoder input 166 consists of 12-bit words of frequency modulated frames.

Valid data and address supplies start and stop with logic ``0'' bits to recognize valid data and address signals.

Moreover, each valid address and data word are all logical "l"
with at least one complete 12-bit blank word of bits. The blank word allows the 2 decoder to reset itself between valid data and address words.

Address/data bits (A/D) follow the start bit. If this bit is a logical ``1'', the decoder consists of the following 8 bits) (D7. Be aware of what you say. These data bits are followed by parity vias, which are used to check the validity of data and address information, as described below. Again, the last bit comprises a stop bit. A
Assume that the /D bit is a logic '0' instead of a logic '1'.

In this case, the next bit of the word is the channel enable bit (CH,ON). If the channel enable bit is a logic "1", decoder 168 ignores the data as it is for the addressed satellite puppet. A mute bit follows the channel enable bit. If the mute pit is a logic "1", decoder 168 sends a positive signal at output 220 to amplifier 158.

This locks out the audio from the master character.

On the other hand, if the mute pit is a logic "0", the master character does not mute and continues to send audio.

6 address bits (A5.A4゜......,
AO) follows the mute pit. These address bits determine which satellite puppet 210 is being addressed. The number of address bits is
As explained below, even if the illustrated decoder 16
8 only addresses satellite puppet 210, allowing addressing of up to 64 satellite puppets.

This format information
) and referring to FIG. 10, the frequency modulated encoded input 166 is first made into a square wave by a Schmitt trigger 230 to provide a square wave demodulated signal at 232. This signal is provided to a sync generator 234 which synchronizes the asynchronous data and address information inputs to the oscillator signal for use by the decoder circuit.

Synchronization generator 234 is connected to line 236 for purposes described below.
the clock output ('rCLK J) on line 238 and the 'load enable' signal on line 238.
e) generate output. The synchronization generator also generates an output 240 corresponding to synchronized data and address information. The sync generator output 240 is a digital retriggerable monostable circuit (Dmono) that recovers the data and address bits from the encoded input signal received at the demodulator input 166.
242. The captured data is Dmo
appears at the "data" output 244 of the no circuit 242 and is clocked into a 12-pinto shift register 246 in response to the CLK signal on line 236.

Valid word decoder circuit 248 monitors the bits stored in shift register 246 and determines whether an address or data word is present. More particularly, valid word decoder circuit 248 includes a first data word detect NOR gate 250 for detecting the presence of a data word within shift register 246 . When a data word is detected, an appropriate signal as described below is sent to the output 25 of the valid word decoder.
2 and is coupled to a data latch 256 made up of four flip-flops. In response to this signal, data bits DO through D3 are clocked through the flip-flops of latch 256 to outputs 170 through 176 of Cll, 1 and CHO2. Short circuit protection circuit 260 includes a pair of transistors 178, 188 and a pair of transistors 196, 204 (FIG. 9).
simultaneous conduction and completion of an electrical short circuit through each transistor pair.

Valid word decoder circuit 248 also includes circuitry that determines which particular satellite puppet is to be addressed. In the illustrated form, the circuit includes a NOR gate 262 that produces the appropriate output on line 264 if a valid satellite puppet address is detected. Line 264 is connected to a status latch 266 comprised of a channel enable flip-flop 267 and a mute control flip-flop 268. When a valid satellite puppet address is detected, the output on line 264 is output to flip-flops 267, 2
68 inputs load the shift register channel enable bit and mute bit to the status latch. In particular, the main character
r) assumes that the mute pit is to be muted such that it is a logic "1".

Based on detection of a valid satellite puppet address, a logic "1" mute pit from the shift register is passed to status latch output 220, muting the main character. Additionally, if the drive channel of the satellite character being addressed is to enable movement of the satellite character, shift register C11
, ON bit is logic "1". This bit is clocked to the Q output of flip-flop 267 and applied to one input of data word detect NOR gate 250. This causes the output 252 from the valid word decoder circuit 248 to be a logic ``0''.
” to be held. Therefore, data is not clocked through the data latch 256 and the main character drive mechanism is not activated. Instead, the data is recovered by a decoder in the satellite puppet and used to control movements of the drive mechanism in the satellite puppet.

Decoder circuit 168 also includes a parity check circuit 270 that evaluates the parity of the data and address words stored in the shift register. As explained below, circuit 270 disables data latch 256 and status latch 266 if word parity is not verified. Additionally, decoder circuit 168 includes decoder input 16
6 includes a signal error detection circuit 272 that searches for high frequency audio signals. For example, such a signal can occur if a standard cassette tape is played on tape deck 140 (FIG. 9) rather than a prerecorded cassette tape in the format of FIG. 11. If such an error is detected, the outputs of CHol and CH,2 will show that the character drive mechanism is in an undesirable accidental manner (sporad
icmanner) exists at a level that does not work.

Decoder Circuit Details With the general appearance of decoder circuit 168 in mind, further details of this circuit will be understood from the following description.

Synchronous generator 234 includes first and second D-type flip-flops 280, 282 clocked by a clock signal from oscillator 284. For reasons explained below, the oscillator clock signal is nominally connected to line 166.
It is set at a rate (eg, 4500 Hz) that is 32 times the ``0'' logic pulse rate of the above encoded signals and 8 times the ``1'' logic pulse rate of such signals. The oscillator output is buffered in amplifier 286 and provided to the satellite puppets on line 288 to synchronize the satellite puppets to the master character.

The 0 input of flip-flop 280 is Schmitt trigger 2
A demodulated output 232 is received from 30. The Q output of flip-flop 280 is connected to the 0 input of flip-flop 282 and also constitutes the CLK signal to shift register 246 on line 236.

Also, the Q output of the flip-flop 280 is the NOR gate 2
90 is connected to one input. The Q output of this flip-flop 280 is connected to the load enable control OR gate 292.
01 input. The Q output of flip-flop 282 is connected to another input of NOR gate 290, while the Q output of this flip-flop is connected to NOR gate 2920.
Connected to input. A positive going asynchronous input pulse is synchronized to flip-flop 280 on the falling edge of the clock pulse from oscillator 284. These input pulses are then applied to flip-flop 2 on the next falling edge of the oscillator output.
82.

Assume that a logic "1" signal is applied to the 0 input of flip-flop 280. It is also assumed that the logic ``1'' signal is present exactly on its negative half cycle. in this case,
A "0" appears at the D input of flip-flop 280. On the next oscillator pulse, the D input to flip-flop 282, the CLk signal on line 236, and the input to gate 290 from flip-flop 280 will all be "1". On the next oscillator pulse, the Q output from flip-flop 282 and thus the other input to gate 290 goes to ``0''. Since one of the inputs to gate 290 is a "1", the output 240 at 240 is a "0". Inverter 294 inverts the signal at 240 and in this case applies a "1" to the input of NOR gate 296. The other input of oscillator 296 is coupled to the output of oscillator 284. Since one of the inputs to gate 296 is a "1", its output is a "0" and the next inversion by the pair of inverters 298.300 is Dmon.

Appears in circuit 242 as a ``0'' at the reset input to 4-bit binary counter 302. This signal from inverter 300 is also applied to the reset input of set-reset flip-flop 304 in circuit 242 and to the reset input of set-reset flip-flop 306 in error detector 272 for purposes described below. first,
The Q output of flip-flop 304 is at a logic "1" level. Counter 302 has four Q outputs connected to the inputs of a NOR gate 308 with its output applied to the set or S input of flip-flop 3040. Since the initial counter is "0", each of these Q outputs is initially "1" and the output of NOR gate 308 is "0". The oscillator frequency is nominally eight times the frequency of the logic "1" signal, and in this example the logic "1"
Since the signal is applied to input 232 of the synchronous generator, the fourth Q output of counter 302 will be '0' before the next '0' signal from inverter 300 resets the counter.
” does not fall. Therefore, the Q output of flip-flop 304 remains at "1" and appears on data line 244. The signal at 232 eventually goes positive on the positive half cycle of a logic "1" input signal. Based on the next oscillator pulse,
The clock signal on line 236 falls and the clock signal on line 244
clock the data from into the shift register.

In comparison, if a logic "0" signal is applied to input 232, the fourth Q output of counter 302
Let it fall to ``0'' before 2 is reset.

In this case, the Q output of flip-flop 304 drops to "0". Therefore, based on the next clock pulse on line 236, a logic "0" data signal is clocked into the shift register.

On the first clock pulse following the application of a "1" to the 0 input of flip-flop 280, flip-flop 28
The input from 0 to gate 292 becomes "1". After one clock pulse, the other input to gate 292 from the Q output of flip-flop 282 is a "0". This is because "0" is applied from the Q output of flip-flop 280 to the 0 input of flip-flop 282. Then, when the input signal at 232 falls to "0", the next pulse from oscillator 284 causes flip-flop 280 to
The Q output of drops to "0". At this time, and until the next oscillator pulse, from flip-flop 282 to gate 292
When the Q output to changes to ``1'', the output from gate 292 at 238 is ``1''.

Once inverted by inverter 310, the zero load enable signal is applied to NOR gates 250,262. This applies to latch 25 if the other input to either gate 250, 262 is also at a logic "0" level.
6, enable these gates to produce a ``1'' output that was used to clock 266. Therefore, once the -transformation data and address words have gone through the cycle, the load enable signal is passed to gates 250 and 262.

When this occurs, a determination is made by valid word decoder circuit 248 as to whether a valid address or data word is in shift register 246.

Harrity generator 270 is conventional and receives as its input all bits except the start and stop bits from shift register 246. If and at the same time an even number of logical "1" data bits are present at the input of the parity generator, a "1" appears at the output 314 of this circuit and is sent to the input of each of the NOR gates 250, 262. This disables the valid word decoder circuit 248 from actually detecting either a valid address or a valid data word. This is because there is an error in the word stored in the shift register as if the data had been previously recorded on the cassette tape with the correct parity. On the contrary,
If an odd number of logical "1" bits appear at the input of parity generator 270, output 314 is "O". This is used to detect valid data and address words) 250,
Enable 262.

Satellite Puppet Address Detection Gate 262 has as its inputs the start/stop bits, A/D bits, parity and load enable signals and AO to A5
It has address bits up to. Only if each of these inputs is a ``0'' will gate 262 produce a ``1'' output, which, when inverted by inverter 316 and applied to latch 266, transfers the data at the D input of this latch. Clock to its Q output. As pointed out above, a valid word requires both the start and stop bits to be '0'. Additionally, the input to gate 262 from parity generator 270 is a ``0'' when parity is correct. Additionally, the load enable signal is also ``0'' at one time during each cycle of encoded input data bits. The A/D bit is also '0' if an address error is present in the shift register. In the diagram shown, the AO shift register bits are provided to the valid AO decoder 248 through an inverter 318;
On the other hand, each of the data bits Al through A5 are provided directly from shift register 246 to gate 262. , so start, stop, A to gate 262
/D, parity and load enable inputs are each “0”
The remaining gate inputs are if address bits AO to A5 are rl'', ro'', and ro'', respectively.
・rO”・1o”・If it is “0”, it will be “0”. In the format of FIG. 9 of the present invention, addresses rl'', rO
”, rO”.

rOJ, rOJ, “0” is assigned to satellite puppet 210. Therefore, whenever this address occurs, decoder 168 determines that the satellite puppet is being addressed. gate 2
Additional gates similar to 62 may be used to detect the addresses of other puppets if one or more satellite puppets are used.

Data word detection gate 250 also receives the start and stop bits from shift register 246 along with the load enable and parity signals. Additionally, the A/D bits from the shift register are provided through impark 320 to data word detection gate 250. Therefore, as long as the A/D bit is ``0'', a ``1'' is applied from inverter 320 to gate 250 in response to the address word. This controls gate 250 to prevent clocking of data to data launch 256. Additionally, gate 250 receives input from the Q output of channel enable flip-flop 267 of status latch 266. Based on the valid puppet address and the loading of a logic "1" channel enable bit to the Q output of flip-flop 267, "l" is transferred from this flip-flop to gate 250.
is applied to This actually blocks the operation of the master character's drive, while the satellite puppet's drive operates in response to the data word.

Assume that all inputs to gate 250 are "0". In this case, the “1” output of this gate is the inverter 3
22 and the inverter output is applied as a "0" to one input of NOR gate 324. Output 252 from significant word decoder circuit 248 is taken from the output of NOR gate 324. The signal from oscillator 284 is inverted by inverter 326 and applied to the other input of gate 324. Whenever both inputs to gate 324 are "0", output 252 is "1". Output 2
52 is inverted by inverter 328 and latch 25
6 clock input. When the output of inverter 328 falls to ``0'', data bits DO through D3 of shift register 246 are clocked to the output of the flip-flop comprising launch 256. This controls the master character's drive mechanism. Although not shown, other latches similar to latch 256 may be used and data output D provided to provide two additional channels for controlling additional drive motors and movable torso portions of the character.
4 to D7.

The error detection circuit 272 and power-on reset circuit will now be described. When power is turned on to the device, for example by inserting a cassette tape, a "0" signal is applied to the FOR input of the circuit. This signal is transmitted to the inverter 34
2 and applies a logic "1" signal to one input of the NOR game) 346. "1" from gate 346
The output is inverted by inverter 348 and latch 25
6, 266 is applied to these latches to reset them. When CHol and C)l,2 are reset, outputs 170 to 176 are rl'', ro'', rl'', respectively.
ro", and therefore the main character's drive mechanism does not operate. Additionally, flip-flop 267 of latch 266
, 268 are both set equal to "0". FOR, (since the i is driven from a Schmitt trigger input (not shown) with a pull-up resistor, FO
The R signal rises to the "l" state. When this happens,
Input to gate 346 from inverter 342 is "0"
fall into. The output of gate 346 becomes "1". This is because from the Q output of set-reset flip-flop 350 in error detection circuit 272, its other input (to gate 346) is "0". The "1" output from gate 346 is inverted by inverter 348 and applied as a "0" to the reset inputs of latches 256, 266. Additionally, the reset input to flip-flop 350 will also be a "0".

Error detection circuit 272 is designed to detect the occurrence of two consecutive high frequency input pulses at input 166. The occurrence of such a pulse would indicate that voice information is being erroneously provided to the data channel. When this happens, data is not clocked into latches 256, 266.

Signal error detection circuit 272 includes first and second D-type flip-flops 354 and 356. Flip-flop 354 is set to its initial state by the FOR signal. The 0 input to flip-flop 354 is taken from the Q output of set-reset flip-flop 306, while the 0 input to flip-flop 356 is taken from the Q output of flip-flop 354. The Q output of flip-flops 354 and 356 is a three-person gate 35.
Also fed to two inputs of 8. The other input to NOR gate 358 is the sign detect disable (CDS) input 36.
taken from 0. Flip-flop 354, 356
is clocked by a clock signal on line 236.

During normal operation, CDS input 360 is "0";
On the other hand, the other inputs to gate 358 are never both "0".
” is not. Therefore, the output of gate 358 and the S input to flip-flop 350 remain at "0" and the Q output of the flip-flop does not change. When the reset signal to the counter 302 becomes "0", the third
The Q output is also "0" because the counter does not count high enough for this Q output to be "1". logic"
When either a ``1'' or a logic ``0'' data pulse is processed, the third Q output of counter 302 is output on line 236.
It will become ``1'' prior to the occurrence of the above CLK signal. When this happens, the S input to flip-flop 306 becomes ``1'' and the Q output of this flip-flop also becomes ``1''.
1”. When the CLK pulse occurs, the Q output from flip-flop 354 is "1" and therefore gate 3
The output of 58 remains unchanged. However, if two consecutive high frequency pulses occur, the Q of flip-flop 306
The “0” at the output is S to flip-flop 306.
The input is clocked through both flip-flops 354 and 356 before being switched to "1". In this case, each of the inputs to gate 358 is a "0". Therefore, the S input to flip-flop 350 changes to "1". Therefore, the Q output of the flip-flop 350 is "
1", and the output of the gate 346 becomes "0" and 1. When the inverter 348 (thus inverts), the reset signal is then applied to the latches 256, 266 and the character drive mechanism is therefore inoperative. In this way,
A signal error detection circuit monitors the data communicated to input 166 for the purpose of detecting high frequency audio signals.

As explained above, the operation of the decoder of FIG.
This will become clearer with reference to an example data format. In the first example, the FOR signal is "0" and the CDS signal is also "0". In this case, error detection circuit 272 is examining data for two consecutive high frequency pulses. Moreover, the L output of CH,1 and the output of CH,2 are "1".
”. Further, the R output of CH,1 and the R output of CH12 are "0". In this case, motor 40.40
None of a works.

Table 1 In Examples 2 and 3, the A/D bit is "0", so there is an address word in each case. Besides, CH,O
Since the N bit is '0', the satellite puppet drive channel is enabled in each case. Moreover, in the second example, the mute bit and 'l', so the main character is muted. In the third example, the mute bit is '0', so the main character is not muted. In each of these examples, address bit A
O to A5 are rl'', rQ'', and ``0'', respectively.

"OJ, 'OJ, ro," and thus satellite puppet 210 is addressed appropriately. On top of that,
In each of these cases, the number of logic ``1''s evaluated by parity generator circuit 270 is odd, so games 250, 262 are not disabled by the parity generator.

In the fourth to eighth examples, the A/D bit is a logic "1" in each case. This indicates that a data word exists instead of an address word. In the fourth example, C
The R output of 11,1 and the R output of CH,2 are "1",
Motors 40 and 40a are therefore driven in the desired direction. Furthermore, the L output of CH,1 and the output of C)I,2 are "1", so the transistors associated with these outputs are turned off.

On the contrary, in the fifth example, the L output of CH,1 and the L output of CH92
The L output of is "1". Therefore motors 40 and 40
a is driven in the opposite direction to the example of FIG. Besides, C
The R output of H,1 and the R output of CH,2 are "0", so the transistors associated with these outputs are not conductive. In the sixth example, the stop bit is ``1'' if it must be ``0'' for a valid word. Therefore, a logic "1" stop bit is the input of data word detection gate 250,
and is applied to the input of address word detection gate 262. Therefore, these gates do not indicate the presence of either a valid address word or a valid data word. In the seventh example, the parity is incorrect. Therefore, a logic "1" signal is applied from parity generator 270 to the inputs of gates 250 and 262. Therefore, the gate does not indicate the presence of either a valid address word or a valid data word. In the eighth example, all outputs are turned off. Finally, the ninth example comprises an address word as indicated by the fact that the A/D bit is '0'. Moreover, since the mute bit is "1", mute is turned on,
The main character is then muted. The sound is emitted from satellite puppet 210.

While the principles of the invention have been illustrated and explained with reference to several preferred embodiments, it will be obvious to those skilled in the art that the invention may be modified in arrangement and detail without departing from its principles. can.

(Summary) The present invention includes a mechanism for synchronizing the movement of a character part of a bird or pond toy with a sound source.

In one form, the tape deck is contained within the bird's body. Tape decks play prerecorded cassettes with audio on one channel and data on other channels. The sound is amplified and transmitted to a speaker inside the bird, so the bird can talk and sing as needed. Typically, birds include one or more moving parts. The data is decoded and, in response to the data, the drive mechanism is operated to move the desired portion of the bird. The data channel also carries address information if one or more selectable satellite characters are used. The movement of the satellite character is synchronized with the voice and master character.

[Brief explanation of the drawing]

FIG. 1 shows the head of a toy character according to the invention, along with parts of the drive mechanism for moving the eyelids, lower lip or beak of this particular character, and FIG. 2 shows the drive of the lower beak of the character of FIG. 3 illustrates the eyelid drive mechanism of FIG. 1, and FIG. 4 shows the head of a character according to the invention, together with the parts of the drive mechanism that move the eyes and upper lip or beak of this particular character. , FIG. 5 illustrates the driving mechanism of the upper beak of the character in FIG. 4, FIG. 6 illustrates the driving mechanism of the eye of the character in FIG. 4, and FIG. 4 shows a drive mechanism for moving another body part, especially the tail, of the character of FIG. 4; FIG. 8 shows a drive mechanism for moving another body part, especially the head, of the character of FIGS. 1 and 4; Figure 10 is an electrical diagram of the circuit used in the toy of the present invention, Figure 10 is an electrical diagram of the decoder portion of the circuit in Figure 9, and Figure 11 is the electrical diagram of the circuit used in the toy of the present invention. 1 is an illustration of a typical data format for a cassette tape containing audio and data. 10...Head 12...Upper fixed beak 14...Lower movable beak 16...Pivot 18...Lever portion 20...Toothed rack 22.24...Arrow 26. ... One of a pair of eyes 28 ... Cup-shaped eyelid 30 ... Pivot (position) 32 ... Lever 34 ... Rack 36.38 ... Arrow 4Qa-e ... (DC) Motor 42...shaft 44a-e...pulleys 46a-e...belt 48a-e...(drive) pulley 50 a-e...
・Shaft 52 a-e...Gears 54a-e, 55a-e...Lower stop 60...
・Intermediate point or pivot 62... Internal lever part 64... Rack 66
, 68...arrow 70...pivot 72
... Lever 74 ... Rack 76, 7
8...Arrow 84...Tail 86...Arrow 88...L-shaped arm 90...Pivot 92...Internal coil spring 94.96...End 98...Sector-shaped lever 100. ...End 102...Rack 1
04...Arrow 106...Mounting flock 108...Shaft 110...Pivot 112...Lever 114...Rack 1
40...Multi-channel tape deck 142...(Audio) channel 144...(Data) channel 144'...Amplifier 146...Motor regulator circuit 146'...Dual preamplifier circuit 148... ...Motor 148'...Amplifier 150...Main switch 150'...Resistance-capacitance feedback circuit 152...
...Battery pack ゛152'...Resistance-capacitance feedback circuit 154.
...DC blocking capacitor 156...Volume control potentiometer 158...(audio) amplifier D6
0...Capacitor 162...Speaker 1
64...Capacitor 166...Data input or decoder input or line 168...Decoder circuit 170...L output of channel 1 172...R output of channel 1 174...L of channel 2 Output 176...R output 178...(PNP) of channel 2 Transistor 180...One end of beak drive motor or line 182...Other end of beak drive motor 184...
Battery puncture terminal 186...Diode 188...(NPN) I-ransistor 190...
Diode 196... (PNP) ) Transistor 198... One end of eyelid drive motor 200... Other end of eyelid drive motor 202... Diode 204... (NPN)) Transistor 206... Diode 210... ...Satellite puppet 212...Line 214...Satellite puppet audio input 216
... Line 218 ... Satellite puppet data input 22
0...Decoder output or status ra/sochi output 230...Schmitt trigger 232...Input or demodulated output 234...
Synchronous generator 236.238... line 240
... (synchronous generator) output 242 ... digital retriggerable monostable circuit (Dmo
no) 244...data output or data line 2
46...Shift register 248...Valid word decoder circuit 250...Data word detection NOR gate 252...Valid word decoder output 256...Data latch 260...Short circuit protection circuit 262... Address word detection gate or NOR gate 264...Line 266...Status latch 267...Channel enable flip-flop 26
8... Muting control flip-flop 270.
... Parity check circuit or parity generator 272 ... Signal error detection circuit 280, 282 ... D-type flip-flop 284 ...
・Oscillator 286...Amplifier 288...
Line 290... Noah Gate 292...
・Load enable control NOR gate 294...Inverter 296...NOR gate 298, 300
... Inverter 302 ... 4-bit binary counter 304, 306 ... Set-reset flip-flop 308 ... NOR gate 310 ... Impark 314 ... Output 316, 318.320.322 ... Inverter 3
24... Noah game) 326.328...
Inverter 340...POR input 342...
...Inverter 346...Noah Gate 348
... Inverter 350 ... Set-reset flip-flop 354, 356 ... D-type flip-flop 358 ... Three-person gate 360 ... Code detection disable (CDS) input Patent applicant View-Master Ideal group incorporate

Claims (1)

[Claims] 1. A toy that generates sound in response to an audio signal recorded on a cassette tape and moves in response to a data signal on the cassette tape, comprising: a body; mounted on the body; and an audio channel; a cassette tape player having a data channel, the tape player means comprising means for reproducing an audio signal on an audio channel from a cassette tape and means for reproducing a data signal on a data channel from a cassette tape; a first fuselage portion movable relative to the rest of the fuselage; speaker circuit means coupled to the audio channel for receiving an audio signal and for producing a sound in response to the audio signal; , and decoder circuit means coupled to the data channel for producing an output of a drive signal in response to a data signal, the data signal comprising a frequency modulated data word previously recorded on a cassette tape; the circuit means includes data word detection means for detecting a data word in the data signal and generating a drive signal in response to the detected data word; and an input coupled to the decoder circuit means for receiving the drive signal. 1. A toy comprising: a first drive means having a first drive means, the first drive means comprising means for moving the first body portion in response to a drive signal. 2. A toy that generates sound in response to an audio signal recorded on a sound source and moves in response to a data signal of the sound source, comprising: a body; a player means mounted on the body; and having an audio channel and a data channel; , the player means comprising means for reproducing an audio signal from a sound source on an audio channel and for reproducing a data signal from a sound source on a data channel; being in the fuselage and receiving an audio signal; a speaker circuit coupled to an audio channel for producing sound in response to a first fuselage portion, a first fuselage portion movable relative to the rest of the fuselage; receiving a data signal and outputting a drive signal in response to the data signal; a decoder circuit coupled to the generating data channel; a first drive means having an input coupled to the decoder circuit means for receiving a drive signal, the first drive means responsive to the drive signal; equipped with means for moving the body part,
and wherein the decoder circuit means includes means for detecting an audio signal on the data channel and means for blocking operation of the first drive means based on detection of such audio signal. . 3. The cassette tape includes prerecorded address signals, and the tape player means includes means for reproducing the addresses on the data channel and a mute for selectively muting sound from the speaker circuit means in response to a muting control signal. a toy including at least one satellite character having an address specified by an address signal; decoder circuit means including means for receiving the address signal; 2. A toy as claimed in claim 1, further comprising means including muting control means coupled to the muting means for selectively communicating muting control signals to the muting means. 4. at least one satellite body, wherein the cassette tape includes a prerecorded satellite data signal, the tape player comprises means for reproducing the satellite data signal on the data channel, and the satellite character is movable with respect to the satellite body; the satellite character has satellite decoder circuit means coupled to the data channel for detecting its addressing, and the satellite character receives the satellite data signal from the data channel when it is addressed. a first satellite drive means having an input coupled to the satellite decoder circuit means for receiving a signal, the first satellite drive means comprising means for moving the first satellite body portion in response to the satellite drive signal. A toy according to claim 1. 5. The data signal comprises a frequency modulated data word previously recorded on the cassette tape, and the decoder circuit means detects the data word in the data signal and generates a drive signal in response to the detected data word. A toy according to claim 1, comprising word detection means. 6. The decoder circuit means includes synchronization signal generator means for synchronizing the data signal, retriggerable digital monostable circuit means for converting the data signal into an output of word bits, and storing data words therein. shift register means coupled to the word bit output for clocking the word bit, synchronizing signal generator means including clock means for clocking the word bit into the shift register means; shift register means having;
data word detector circuit means coupled to the shift register for determining from such output the presence of a data word in the shift register; and data word detector circuit means controlled by the data word detector means and corresponding to the data word in the shift register; 2. A toy as claimed in claim 1, including data latch means coupled to the shift register output for generating a drive signal. 7. a decoder in which the data signal has a frequency modulated address word previously recorded on the cassette tape and address word detector circuit means coupled to the shift register output for determining the presence of the address word in the shift register; speaker circuit means including status latch means controlled by the address word detector means and coupled to a shift register output for producing first and second status latch output signals corresponding to address words in the shift register; the status latch means includes a muting means for selectively muting sound from the speaker circuit means in response to a muting control signal; the status latch means includes a muting means for transmitting a first status latch output signal to the muting means as a muting control signal; the status latch means is coupled to data word detector circuit means for communicating a second status latch output signal to data word detector means, the data word detector circuit means responsive to the second status latch output signal. 7. The toy according to claim 6, further comprising means for selectively blocking transmission of the drive signal from the data latch means. 8. The parity of a word of the previously recorded data signal is a first value, the toy including parity circuit means having an input coupled to a shift register, the parity circuit means having an input coupled to a data word detector circuit means and an address. having an output coupled to a detector circuit means, the parity circuit means evaluating the parity of the shift register output received therein;
and the evaluated parity differs from the first value,
8. The toy of claim 7, further comprising means for generating an output signal for blocking said data word detector circuit means and said address detector circuit means from detected data and address words. 9. the torso has a second torso portion movable relative to the rest of the toy, the toy including second drive means having an input coupled to decoder circuit means for receiving a drive signal; 2. The toy of claim 1, wherein the means comprises means for moving the second body portion in response to a drive signal. 10. The first fuselage portion is pivoted to the fuselage pivoting about a first pivot axis, the first drive means including lever means projecting from the pivot and into the fuselage, the lever means being pivotable about the first pivot axis. a rack positioned to move the first fuselage portion relative to the fuselage; the drive mechanism includes a motor having a pivotable motor shaft; a first pulley is mounted on the motor shaft, the drive shaft is pivoted on the fuselage, a second pulley is mounted on the drive shaft, the second pulley and the drive A drive belt drivingly interconnects the first and second pulleys such that the shaft pivots as a motor shaft pivot, and a drive gear is mounted on the drive shaft and positioned to mate with the rack. 2. The toy of claim 1, wherein said drive gear rack and said first body portion move as a drive shaft pivot. 11. The rack includes first and second stops positioned to engage the drive gear to limit travel of the lever portion and thereby limit movement of the first fuselage portion. Toys listed in section. 12. In a moving toy that generates sound in response to audio and data signals on each of the audio and data channels from a signal source, the toy is within the torso, receives the audio signal, and is responsive to the received audio signal. audio circuit means coupled to an audio channel for producing sound in response; a fuselage having at least one fuselage portion movable relative to the rest of the fuselage; receiving a data signal and outputting a digital drive signal in response to the data signal; a first drive means having an input coupled to the data channel for generating a digital drive signal, and an input coupled to the decoder circuit means for receiving a digital drive signal, the first drive means having a digital drive signal; A toy comprising means for moving the first body portion in response to a signal. 13. A toy cassette tape that generates movement and sound in response to audio and data signals on an audio channel and a data channel of the tape, respectively, where the data signal is a frequency modulated signal. 14. The cassette tape of claim 13, wherein the data signal is recorded in data words on the data channel, and blank words are recorded between each data word.