JPS62276927A - Differential pulse modulation system - Google Patents

Abstract

PURPOSE:To obtain a differential pulse modulation system with excellent coding efficiency by adding the polarity to a threshold value based on the polarity decision of a differential signal between a forecast error signal and a threshold value and applying the correction to the difference signal based on the polar threshold value so as to apply quantization. CONSTITUTION:A subtracter 1 calculates a forecast error signal S2 being a difference between an input signal S1 and a forecast signal S9, and a change detection circuit 2 outputs a change detection signal S3 and a difference signal S4 based on the signal S2 and a threshold value T from a threshold value generating circuit 9. A threshold value generating circuit 18 outputs a polar threshold value T1 and a correction difference signal S15 from the signals S3, S4. The signal S15 goes to a quantized signal S5 by a quantization circuit 3 and the signal S5 is outputted to a variable length coding circuit 4 and a local decoding circuit 6. With the signal S3 effective, the circuit 4 fetches the threshold value T, the signal S3 is subject to run length coding, a short code is assigned to a numeral close to '0' where the frequency of the signal S5 is high, the code is stored in a transmission buffer circuit 5 to send a coded signal to a transmission line. The circuit 9 supervises the data storage of the circuit 5, generates a proper threshold value T thereby controlling the generation amount of the coded data.

Description

[Detailed Description of the Invention] 3. Detailed Description of the Invention [Field of Application for Chestnut Pressing] This invention relates to a differential pulse modulation method for transmitting a digital human input signal such as the first signal of the squadron after performing band compression.

[Conventional technology]

Fig. 5 is a block diagram of the transmitting side of the conventional differential pulse modulation method (hereinafter referred to as DPCM method), Fig. -6 is a block diagram of the change detection circuit in Fig. 5, and Fig. -7 is the conventional DPCM system 1;
FIG.

In the figure, 1 is a subtracter that takes the difference between an input signal SI such as an image signal and a predicted signal S9 and outputs a pre-61III error signal S2, and 2 is a subtracter that takes the difference between an input signal SI such as an image signal and a predicted signal S9, and outputs a pre-61III error signal S2. A change detection circuit 3 performs a comparison to detect a change, generates and outputs a change detection signal S3 and a difference signal S4, and outputs a change detection signal S3 and a difference signal S3. 4 is a variable length encoding circuit that performs variable length encoding on the encoded signal S5 to generate and output the encoded signal Sak; 5 is a transmission circuit that temporarily stores the encoded signal S6 and outputs it to the transmitting side; An IB buffer circuit 6 receives a reproduction signal St'l from the quantized signal S5 output from the quantization circuit 3.
7 is an adder that adds the reproduced difference 4 signal S7 and the predicted first signal S9 and outputs the reproduced input signal S8; 8 is a predicted signal based on the reproduced input signal Set 2; A prediction circuit 9 outputs a signal S9'l, and a threshold generation circuit 9 monitors the amount of encoded signal S6 stored in the transmission buffer circuit 5 and generates an appropriate threshold value T.

Further, in Figure 6, 10 is an absolute value circuit that takes the absolute value of the prediction error signal S2, 11 is a comparison circuit that compares the absolute value of the prediction error signal S2 with a threshold value T, and outputs a change detection signal S3; is a zero assignment circuit which assigns 0 and outputs it as a difference signal S4 when no change is detected as a result of the comparison of the comparison circuit "l".

Further, in FIG. 7, 13 is a receiving buffer circuit which receives the encoded signal 86 outputted from the sending buffer circuit 5 on the transmitting side and temporarily stores it, and 14 is a receiving buffer circuit 1.
Coded signal 5675I stored in 3: variable length decoding circuit that decodes and outputs the Niyu electronic code Sll;
15 is a local decoding circuit that outputs a reproduced difference signal S12 'a' based on the reproduced quantized signal 5ill-; 16 is an addition circuit that calculates the difference between the Niu difference signal S12 and the reproduced prediction signal S13 and adds the input signal S1χ to the transmitting side; The circuit 17 is a reproduction prediction circuit which outputs the entire reproduction prediction signal Sls.

Next, the operation of the transmitting side will be explained in FIGS. 5 and 6.

First, the invalidation error Yd in the change detection circuit 2, the prediction coefficient A which is applied to the reproduction amount coefficient S8 in the prediction circuit 8,
If the delay of time t is 2, a long relationship is established between each signal.

S2 fables, -89 S4 x 82 + d 87! S4+Q S6tsuS7+S, engineering Sl+Q1d s, xA-ss, Z-' Here, the trial calculator 1 calculates the prediction error signal S2 which is the difference between the input signal S1 and the prediction signal S9, and the change detection circuit 2 is a subtracter. A change detection signal S3 and a difference signal S4 are all output from the prediction error signal S2 calculated by l.

To explain the operation of this change detection circuit 2 in more detail with reference to FIG.
The absolute value of 2 and the threshold value T generated from the threshold generation circuit 9 are compared.

Then, a change detection signal S3 is output according to the following conditions.

53=O (invalid)...182+<TS3=1
(Valid)...l521≧T Also, if the change 1 is not detected, that is, when sa=mo, the ¥F allocation circuit 12
outputs the differential signal S4 as O.

- The variable-length encoding circuit 3 converts the input difference signal S4 into an arbitrary characteristic (2-dimensional transformation signal 55 (=). When the change detection signal S3 is valid, that is, the
Only in the case of O, the change detection signal S3 is encoded by run-length encoding, and the code S5 is converted into a numerical value around 0, which occurs frequently, with a short code length. A code is assigned and stored in the NI5 for transmission buffer times. The transmission buffer circuit J65 outputs the accumulated data to the transmission path as an encoded signal S6. The threshold generation circuit 9 monitors the transmission buffer circuit 5 and generates an appropriate threshold value T while controlling the generation of encoded data i. This will be explained in the figure.

The encoded signal S6 subjected to variable length encoding in the transmission phase 1 is received by the reception buffer circuit 13, and the encoded signal S6 is variable length encoded in the variable length encoding circuit i14.
Only when the change detection signal S3 decoded in is valid (-) is outputted as the reproduced quantized signal SIX, and when the change detection signal S3 indicates no @, 0 is outputted.

Furthermore, the local decoding circuit 15 decodes the reproduced quantized signal Sll and outputs the Funoya signal StZ to the adder 16.

The adder 16 receives the reproduction prediction signal S1 from the prediction circuit 17.
3 and the reproduced correct signal 812, the human power on the transmitting side (
Go issue SL￥play.

[Problems that Tsu and Akira are trying to solve]

In the conventional D P CM method as described above, in order to use the data found to be valid at the variable length encoding stage as is for variable length encoding, the threshold <"0 as c becomes higher". A problem has arisen in which codes with short code lengths assigned in the vicinity of ζ2 no longer occur, resulting in a rapid increase in coding efficiency.

This invention has been made in order to solve the above-mentioned difficulties: It is possible to generate a code with a short code length and obtain a DPCM system with high coding efficiency. The purpose is to

[Means for solving problems]

Therefore, in the differential pulse variation L14 method according to this invention, the polarity of the differential signal S4 is determined twice, and based on this determination, the threshold value TI: polarity is added, and based on the polarized threshold value T1 to which this polarity is added. Correcting the difference signal S4,
Quantizing and transmitting and receiving this corrected difference signal StS is designated as 'Vfm.

[Effect]

What is the difference between this invention and the polarity of the differential signal S4? A threshold Tl polarity is added based on this determination.

Then, the difference signal S4 is corrected based on the polarity threshold value Tll with 7JO added to the polarity, and the corrected difference signal S15 that has been corrected is quantized and transmitted and received.

〔Example〕

Hereinafter, four examples of the present invention will be explained with reference to two figures.

' Fig. 1 is a block diagram of the transmitter 1 of the differential pulse modulation method of the present invention, Fig. 2 is a block diagram of the threshold correction circuit in Fig. 1 (=), and Fig. 3 is a block diagram of the differential pulse modulation method of the present invention. FIG. 4 is a block diagram of the threshold correction and restoration circuit in FIG. 3.

In FIG. 1, reference numeral 18 denotes a threshold value T outputted from the threshold generation circuit 9 according to the difference signal S4 outputted from the change detection circuit 2 (a polarized threshold value T1 with a bipolar value added, and a polarized threshold value T1 with this polarity added). A corrected difference signal 81 is obtained by subtracting the difference signal S4.
This is a threshold correction circuit that generates and outputs 5.

In FIG. 2, 19 determines the polarity of the difference signal S4 and determines the polarity signal SLg! 20 is a polarity adding circuit that adds polarity to the threshold value T output from the threshold generation circuit 9 according to the polarity signal 816 and outputs a polar threshold value 'r1; 21 is a polarity determining circuit for outputting polarity; Threshold T1 and difference signal S4
This is a subtracter that performs subtraction with and outputs a corrected difference signal SIS.

In FIG. 3, 22 is a detected word S17. which is output from the variable length decoding circuit 14. L/threshold T.

This is a threshold correction restoration circuit that generates and outputs a reproduction difference signal Szx t' from the reproduction correction difference signal 820 outputted from the local decoding circuit 15.

Further, in FIG. 4, 23 is a polarity determination circuit that determines the polarity of the reproduction correction difference signal 82G and outputs a polarity signal 823;
24 is a polarity determination circuit that adds polarity to the threshold value T according to the polarity signal 823 and outputs the polarized threshold value T; 25 is a polarity determination circuit that adds the polarized threshold value T1 and the reproduction correction difference g, and reproduces it. This is an adder that outputs a difference signal 821.

Next, the operation on the sending side of the present invention will be explained based on FIGS. 1 and 2.

First, the invalidation error in the change detection circuit 2 is d, the reproduction input signal S is set in the prediction circuit 8 (2), and the prediction coefficient multiplied by l2 is A.
, the delay of time t is 2-1, the following relationship holds true for the darkness of each signal.

s2=Sl−s.

34 m S2 + dS, s=S, -T 87 = 87 + Q S6=Sg+S]+T=S1+Q 10dS, -A,
Sa, z-1 Here, the calculator 1 calculates the prediction error signal S2 which is a combination of the human input signal S1 and the prediction signal S9, and the change detection circuit 2 calculates the prediction error -=sign S2 which is calculated by the subtractor l. A change detection signal S3 and a difference signal S4 are output from 7.

The operation of the change detection circuit 2 at this time is the same as that of the horsefly.

On the other hand, the threshold value correction circuit 18 generates a polarized threshold value T and a pressure difference signal S15 from the change detection signal S3 and the difference signal S4.
Outputs .

The operation of the threshold t+& correction circuit 18 at this time will be explained in Section 40 with reference to Figure 2.

The chronicity determining circuit 19 determines the polarity of the difference signal s4, and outputs the polarity signal Sza 'a' to the polarity addition circuit 2. The polarity addition circuit 20, which receives this polarity signal S16, The polarity is applied to the threshold value Tl2 from the threshold generation circuit 9 and output as a polarized threshold value T1.

However, if the change detection signal S3 indicates invalidity, '
Let the fWffl threshold be O. At this time, there is also a method in which the reluctance determination circuit 19 makes an ot+ determination and the polarity addition circuit 20 thereby sets the polarity threshold value to 01. The threshold value is corrected by applying this polar threshold value T to the subtracter 21 and subtracting it from the difference signal S4, and the corrected difference signal S15
Output. The corrected difference signal S15 is turned into a quantized signal S5 by the quantization circuit 3, and is output to the variable length encoding circuit 4 and the local decoding circuit 6. The variable length encoding circuit 4 stores the quantized signal S5 and the threshold value T when the change detection constant signal S3 is enabled, and converts it into a change detection signal S, for example.
3 is run-length encoded, and the quantized signal s5 is assigned a code with a short code length to a frequently occurring value near 0, stored in the transmission buffer circuit 5, and output to the transmission path as an encoded signal S6. . Further, the threshold generation circuit 9 monitors the data # product 1 of the transmission buffer circuit 5, generates an appropriate threshold T, and controls the amount of encoded data generated. -1 The local decoding circuit 6 converts the quantized signal SS into a reproduction correction difference signal S.
7, and the adder 7 (=outputs). The adder 7 adds the threshold value T, the prediction signal Ss, and the reproduction correction difference signal S7 to obtain the reproduction human input signal Ss'a'. The prediction circuit 8 delaying the input signal S8 by a preset time t;
Furthermore, it is multiplied by a second coefficient A and output as a prediction signal S9.

Note that when the input signal sl is an image signal, the time t is set to one frame time.
If set to field time, it becomes an inter-field DPCM transmission device.

Furthermore, in the above embodiments, the generation of shishai.

Even if the threshold value to be transmitted is reduced by controlling the update to be performed once at any given time, the effect of 1 yen swimming can be achieved.

Next (explaining the operation of the second receiving side according to the third factor,
The encoded signal S6, which has been variable length encoded on the transmitting side, is received by the reception buffer circuit 13. Then, the variable length decoding circuit 14 outputs the threshold (direct T) and the reproduced quantized signal St9 only when the decoded change detection signal S17 is valid, and outputs O when it is invalid.

The local decoding circuit 15 outputs the reproduction correction difference No. 1 ste to the reproduction correction difference 1st signal 820, and further outputs the reproduction correction difference No. 1 ste to the initial threshold correction restoration circuit v & 2 to reproduce the reproduction rational signal SZt. To explain with reference to FIG. 4, the reproduction correction difference signal 8
The total polarity determination circuit 23 of 20 adds polarity to the threshold value T using a polarity signal S23 representing its positive and negative values, and outputs it as a hard threshold value T1. However, the change detection circuit 817 is disabled! If so, set O. Furthermore, the adder 25 adds the reproduction correction difference signal 820 and the polarized threshold value T1 to obtain a reproduction difference signal S21. The adder 16 adds the predicted signal S22 from the predicted date wr17 and the reproduced difference signal S21, and reproduces the transmission side input signal St to be obtained.

〔Effect of the invention〕

As explained above, this invention determines the polarity of the difference signal, adds the polarity to the threshold value based on this determination, and corrects the difference signal based on the polarized threshold value obtained by adding this polarity. Since the corrected difference signal is quantized and transmitted/received, the meandering of codes with short code lengths assigned to the 0 side is suppressed, and the transmission efficiency is improved.

[Brief explanation of drawings]

Figure 2 is a block diagram of the feeding side of Akira Hongen's DPCM modification system, Figure 2 is a diagram of the threshold correction circuit in Figure 1, and Figure 3 is a diagram of the differential pulse modulation system of the present invention. (Figure 4 is a configuration diagram of the threshold value correction restoration circuit in the third section, and Figure 5 is a configuration diagram of the transmission side of the conventional DPCM system.)
(Figure 6 is a block diagram of the change detection circuit in Figure 5, and Figure 7 is a block diagram of the receiving side in the conventional DPCM system. 2... Change detection circuit, 3... Quantization circuit, 4...
Variable length encoding circuit, 5... Transmission buffer circuit, etc.
- Local decoding circuit, 8... Prediction circuit, 9... Threshold generation circuit, 18... Threshold correction circuit, 19...
Polarity determination circuit, 20... Polarity addition circuit, 22... Threshold 1 direct correction restoration circuit, 23... Reproduction polarity determination circuit,
24... Regenerative resistance addition circuit.

Claims (2)

[Claims] (1) In a differential pulse modulation method in which a prediction error signal and a threshold are compared to generate a change detection signal and a difference signal, and the change detection signal and the difference signal are quantized and transmitted/received, the polarity of the difference signal is Based on this determination, polarity is added to the threshold value, the difference signal is corrected based on the polarized threshold value obtained by adding this polarity, and this corrected difference signal is quantized. A differential pulse modulation method that is characterized by transmitting and receiving signals. (2) The differential pulse modulation method according to claim 1, wherein the corrected differential signal is generated by subtracting a polarized threshold from the differential signal.