JPS62276850A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To realize a high degree of integration and characteristic stability, by forming single-crystal silicon inside an opening part by an epitaxial method. CONSTITUTION:A P type silicon substrate 1 is covered with a mask 4, and an opening part 3 is formed by RIE. The mask 4 is then removed to form a SiO2 film 6 and pile a Si3 N4 film 7 by a reduced-pressure CVD method. Thereafter both insulating films 6 and 7 on the bottom surface of the opening part 3 is removed by RIE method and the exposed bottom surface is sacrificially oxidized to perform impurity ion implantation. The sacrificial oxidization film is then removed to pile an intermediate film 8 made of amorphous silicon by the reduced-pressure CVD method and to leave intermediate films 9 only on the insulating film 7 inside the opening part 3 by an RIE method. The intermediate films 9 are then changed into semiconductor films 10 made of single-crystal silicon by a solid phase epitaxial method, and selective epitaxial growth of single-crystal silicon is performed inside the opening part 3 to form a semiconductor layer 11 there. Phosphor self-diffusion occurs in this epitaxial process so that a n type semiconductor if formed.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention (a) Industrial Field of Application The present invention relates to a method for manufacturing a semiconductor device suitable for high integration, in which adjacent semiconductor regions of different conductivity types are separated. The present invention aims to provide a manufacturing method that reduces the exclusive area of an element isolation region and prevents the element region surrounded by the element isolation region from exhibiting crystallinity near the interface with the element isolation region. be.

<Ron Conventional technology '18. In order to achieve high integration of conductor devices, many new element isolation methods have been developed and reported to replace selective oxidation methods. In CMOS devices, simply reducing the element isolation region poses problems such as impurity diffusion and launch-up during well formation. Taking these points into account, there is a strong demand for the development of a dividing technique %ir for forming deep element isolation regions, and one method to improve the selective isolation method is Kasai et al.'s 'Kllllll width element isolation technology in CMO8'.
<iK Academic Report vO! .

85 No.303 P1-P6). In this method, an opening is provided in the semiconductor substrate, an insulating R film is provided on one surface of the internal bond that defines this opening, and a single-crystal R film is selected from the semiconductor substrate within the opening, including on the insulating film. Epitaki: I'm trying to help Noya grow. In this method, there is a risk that crystal defects may occur near the interface of the insulating film in the single crystal silicon that is formed.

(c) Problems to be Solved by the Invention When crystal defects occur in the single-crystal silicon that has been formed inside the opening near the interface with the insulating film, it is necessary to It is necessary to prevent the portion from becoming an element region. This results in the formation of an invalid region within the semiconductor substrate, which poses a problem in terms of realizing high integration.

The present invention has been made with this point in mind, and it is an object of the present invention to provide a manufacturing method that can improve the crystallinity of the single crystal silicon formed in the opening adjacent to the insulating film. be.

(d) Means for Solving the Problems The present invention provides a step of selectively providing an opening on a semiconductor substrate exhibiting a first conductivity type, and providing a land portion and the opening on the semiconductor substrate; a step of attaching an insulating film to the outer surface of the land portion, a step of implanting impurity ions into the N2 semiconductor substrate facing the opening, and a step of implanting an intermediate layer made of amorphous silicon on a portion of the insulating film facing the opening. a step of forming a film, a step of transforming the intermediate film into a semiconductor film made of single-crystal silicon by a solid phase growth method, and then forming a single film exhibiting a second conductivity type different from the first conductivity type in the opening. This is a method of manufacturing a semiconductor device including a step of forming a semiconductor layer made of crystalline silicon by an epitaxial growth method.

(E) Function As described above, the present invention forms a semiconductor film made of amorphous silicon on the insulating film facing the opening, transforms this into a semiconductor film made of single crystal silicon by the in-phase growth method, and then, Since a semiconductor layer made of single-crystal silicon is formed within the opening by epitaxial growth, the crystallinity of the single-crystal silicon in the portion adjacent to the insulating film is not impaired by the use of the in-phase growth method. Furthermore, the semiconductor layer formed in the opening by the epitaxial growth method in the subsequent step can also be made of high-quality single crystal silicon oriented to the substrate and the metamorphosed semiconductor film.

(f) Example Next, one example of the method of the present invention will be described using illustrated process charts. 1 to 6 show cross sections of one CMO3 portion of a semiconductor device manufactured by the method of the present invention in the order of steps.

The semiconductor substrate (1) is a P-type Noricon single crystal substrate with a low resistance of 1 Ω·C, and the surface (2) of this substrate is a (100) plane. In order to form an opening (3) in this substrate, a mask (4) consisting of three films, an SiO2 film, a Si3N+ film, and a 5iOz film, is attached to the part other than this opening, and using this mask, the silicon substrate ( 1), an opening (3) is selectively formed by RIE. Due to the formation of this opening (3), the portion (5) left under the mask (4)
is called the land part. FIG. 1 shows a partial sectional view of a substrate provided with openings (3) and lands (5) in this manner.

Next, the mask (4) is removed and the substrate (1) is thermally oxidized.
) A 5i02 film (6) with a thickness of 01 is formed on the surface, and then a 5ixN+ film (7) with a thickness of 0.15- is deposited by low pressure CVD. Thereafter, both the edge films (6)<7) attached to the bottom of the opening (3) are removed by RIE to expose the substrate surface at the bottom of the opening. 27
The surface of the substrate at the bottom of the opening exposed by the etching is subjected to sacrificial oxidation, and then phosphorus ions (P9), which is an impurity, are applied to the entire surface of the wafer at I x 10 in order to form an n-well in the opening.
” Only ClTl-2 is ion-implanted (Figure 2).

Next, after removing the sacrificial oxide film, S
By thermally decomposing iH+, it is possible to deposit approximately 0.61 Jrn of an intermediate film (8) made of amorphous silicon over the entire surface of the substrate. In addition, the deposition conditions are the substrate temperature! g550°C1S I H4/
The amount of Ii was 50 cc for 1 minute, the degree of vacuum was 500 Kritol, and the deposition time was 30 minutes (see Figure 3).

Next, by RIE technology, etching is performed only in the vertical direction, and as shown in FIG. leave.

Next, this intermediate film is transformed into a semiconductor film (10) made of i-crystal silicon by solid phase growth. The metamorphism conditions for this solid phase growth method are: substrate temperature 600° C., Ar gas flow rate 200 cc/min, vacuum degree 150 mTorr, and metamorphosis time approximately 50 hours. In this way, an opening (3) surrounded by a semiconductor film (10) made of single-crystalline silicon is obtained (FIG. 5).

Next, selective epitaxial growth of single crystal silicon is performed in the opening (3), and a semiconductor layer (11) is grown in the opening.
) will be established. The growth conditions at this time were a substrate temperature of 950°C.
, vacuum degree 50 millitorr, gas S i H2C, 12H
CI H2, pattern direction <100>. Since the semiconductor layer (11) has a high concentration of phosphorus injected into the underlying silicon substrate by ion implantation, self-diffusion of phosphorus occurs during growth, resulting in a broken n-type semiconductor. FIG. 6 shows a partial cross-sectional view of the substrate after the epitaxial growth process, in which no is buried under the semiconductor ff1 (11). ! (12)
is formed. In this way, on the substrate (1),
n? P-type semiconductor part (1
3) and an n-type semiconductor part (14) for forming a P-channel FET, and an insulating film (6) constituting a deep element isolation part.
(7) is sandwiched in the middle.

A field region is formed on the outside of each of the pair of semiconductor parts (13) and (14) constituting the CMO3 using the LOCO5 method, and then an nf channel FET and a P channel FET are formed in each semiconductor part according to a general manufacturing method. form each,
Produce CMO3.

(G) Effects of the Invention The present invention provides an insulating film on the wall surface facing the opening of a semiconductor substrate exhibiting one conductivity type, attaches an intermediate film made of amorphous silicon on the insulating film, and deposits this intermediate film using the in-phase growth method. After that, the single crystal silicon is grown in the opening by an epitaxial growth method, so that the single crystal silicon grown in this way grows near the interface with the insulating film. Also, it is possible to obtain crystallinity with the precision obtained during solid-phase growth, and the entire area of the device region can be effectively utilized, contributing to high integration and stabilization of characteristics.

[Brief explanation of the drawing]

1 to 6 are process explanatory diagrams of one embodiment of the method of the present invention. (1)...Semiconductor substrate, (3)...Opening, <5)
...Land part, (6>(7)...Insulating film, (9).
...Intermediate film, <10)...Semiconductor film, (11)...
semiconductor layer.

Claims (1)

[Claims] (1) Selectively providing an opening on a semiconductor substrate exhibiting a first conductivity type to provide a land portion and the opening on the semiconductor substrate, and attaching an insulating film to the outer surface of the land portion. a step of implanting impurity ions into the semiconductor substrate facing the opening, a step of forming an intermediate film made of amorphous silicon on a portion of the insulating film facing the opening, and a solid phase growth method. A step of transforming the intermediate film into a semiconductor film made of single crystal silicon, and then forming a semiconductor layer made of single crystal silicon exhibiting a second conductivity type different from the first conductivity type in the opening by an epitaxial growth method. A method for manufacturing a semiconductor device including a process.