JPS622743B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a composite transmission system for data and audio, and more specifically, an audio signal from an audio terminal is digitized and further configured into frames, and a data signal is configured into frames. This invention relates to a combined data and voice transmission system that mixes and transmits both frames.

The above transmission method has the advantage that it is possible to use the transmission path efficiently by transmitting a data frame instead of a silent audio frame, but the transmission control method includes an HDLC procedure, If a procedure having an error control function, such as a basic procedure, is adopted, the error control function makes it difficult to ensure relative time transparency of audio. In other words, if there is an error in the transmitted frame, executing the error recovery procedure and retransmitting the frame in accordance with the frame retransmission request from the receiving side makes it possible to transmit accurate data without any problems with the data frame. However, for audio frames, it increases the audio time difference between the sending and receiving sides, making it impossible to transmit in real time.
This results in the drawback that transparency of the relative time of audio cannot be ensured.

The present invention prevents the above-mentioned drawbacks that occur when a transmission control method having an error control function is adopted as a composite transmission method of data and voice, and makes it possible to perform an error recovery procedure for data frames so that errors can be prevented. The received frames are retransmitted to ensure their accuracy, and for voice frames, error recovery control is blocked and transmission is performed in accordance with real time to prevent voice time lag and to maintain the relative time of voice. The purpose is to ensure transparency.

According to the present invention, in a transmission system in which digitized audio signals and data signals are configured into frames and mixedly transmitted, the transmitting section has the ability to identify whether the frame is audio or data in the frame to be sent. means for adding an indication to the transmitted frame, means for adding a sequence number to the transmitted frame, and means for adding a sequence number to the transmitted frame. The receiver is equipped with a means for retransmitting only data frames and preventing retransmission of voice frames, and the receiving section checks whether or not the received frame has been received normally. This is achieved by providing means for returning a sequence number of a received frame that is determined to have been received.

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of a transmitter in an embodiment of the present invention, and FIG. 2 is a block diagram of a receiver as well.
via a transmission path controlled by HDLC procedures.
It is assumed that the receiver is connected to the receiver (FIG. 2).

First, the transmitter will be explained with reference to FIG. An audio signal from an audio terminal (not shown) is digitized, further configured into frames, and input to the audio signal input terminal S as frames. In the input section, a means not shown detects whether the input frame has audio information, that is, is a sound, or does not have audio information, that is, is silent, and obtains a sound/silence display signal, and inputs the signal. are added to the received frame and stored in the audio buffer SB in the order of their addresses. On the other hand, a data signal from a data terminal (not shown) is configured into a frame, inputted to the data signal input terminal D, and sent to the data buffer DB.
is stored as a frame. Voice buffer SB
The frames with the sound/silence display added are once stored in the frame and are read out after a certain period of time in the order in which they were stored, and the frames with the sound display are selected in the write information judgment circuit SEL and read out in real time. , sent to the transmission buffer SEB and temporarily stored. On this occasion,
The written information determining circuit SEL determines whether the written information is audio information or data information, and if it is audio information, audio display information is sent, added to the frame, and stored in the transmission buffer SEB.

In the write information determination circuit SEL described above, if the frame read from the audio buffer is silent, this frame is not sent to the transmission buffer SEB, but the data frame is read from the data buffer DB instead, and together with the data display information. When there is no data frame in the data buffer DB stored in the transmission buffer SEB, a silent audio frame is stored in the transmission buffer SEB along with audio display information.

The frames accumulated in the transmission buffer SEB were read in the order in which they were accumulated, sent to the receiving section as will be detailed later, and separated into voice frames and data frames, and data frames were sent instead of silent voice frames. A silent voice frame is inserted for the position, and transmission is performed in real time to ensure relative time transparency, and error recovery control is performed for data information to ensure reliable transmission.

FIG. 3 is a diagram showing the configuration of the transmission buffer SEB, with addresses 0 to p (0 to g, g+1 to n-1,
n to p), and when the buffer is empty, the frames input from the write information determination circuit SEL are sequentially written from address 0 to p, and the written frames are written from address 0 to p. are read sequentially toward This buffer SEB is configured in a circular manner so that when the last address p is written or read, it returns to the first address 0.

Now, for example, write the input frames sequentially starting from the first address 0, and
The receiving unit (Figure 2) reads frames sequentially from
and completes transmission up to the frame written to address n-1, while the input frame is written to address p, and is further circulated to address 0.
Assume that the state has returned to the state in which up to address g has been written (the state shown in the figure). The shaded area R _A
Frames to be sent are stored in , and new frames to be input can be written in the area W _A that is not shaded. If a new frame is input here, it is possible to write from address g+1 to address n-1 (area W _A ), but address n
Since there are still necessary frames remaining that have not been transmitted, it is not possible to write beyond this address n. The address that cannot be exceeded during writing is called a write address limit value (n in this case). In this case, the area W _A is the write address corresponding part, and the area R _A (addresses 0 to g and n
~p) is the transmission address correspondence part. These write address limit values, write and send address correspondence sections constantly change during a send operation. Sending buffer
Writing frames to SEB is managed by write addresses and write address limit values. In addition, the write address limit value is determined by the write address limit value sending circuit according to the sequence number in the normal response signal or retransmission request signal from the receiver as described later.
Change LWA settings.

When a frame is sent from the write information judgment circuit SEL, it is input to the transmission buffer SEB, which detects the input of the frame at its input terminal and sends it to the comparison circuit.
Start CW. The comparator circuit CW compares the write address sent from the write address sending circuit WA (including a circuit that increases by +1 for each address sending) with the write address limit value sent from the write address limit value sending circuit LWA, and performs the above-mentioned write operation. If the address does not exceed the above write address limit value, the above write address will be sent to the buffer.
Send it to SEB and write the input frame to the address. At this time, the audio/data display information sent from the write information determination circuit SEL is added to the frame and written.

The frame written in the transmission buffer SEB in this way is transmitted to the receiving section as follows.

S _A is a sending address sending circuit, which includes a +1 circuit, and prepares to send an address by adding 1 to the previous address every time one frame is sent, and the sending address is also set to a sequence number counter.
Also controlled by SQC.

The information on the sending buffer SEB written in the sending address sent out from the sending address sending circuit S _A passes through the audio skip circuit SKC at the time of a retransmission request (which has no effect when the request is not a retransmission request, as described later), and then the sequence The number addition circuit SNA adds the transmission address as a sequence number to the information and transmits it to the receiving section.

The transmission sequence number is given to the sequence number addition circuit SNA from the sequence number counter circuit SQC. Also, sequence number addition circuit SNA
sends a frame with a sequence number added, sends a sequence number update permission signal to the sequence number counter circuit SQC, the sequence number counter circuit SQC updates the sequence number, and sends the updated sequence number to the sequence number addition circuit SNA.
give to

When this information (frame) is normally received by the receiving section, the receiving section returns a normal response signal. When the transmitter receives this signal, it sends the sequence number included in this signal to the write address limit value sending circuit _LWA to update the write address limit value.

On the other hand, if the information cannot be received by the receiving section, the receiving section returns a retransmission request signal. In the transmitter, the retransmission request signal and the sequence number included in this signal are received by the sequence number counter circuit SQC, and the retransmission process starts from the information corresponding to this sequence number to the information that has already been transmitted.

That is, the sequence number included in the retransmission request signal is transferred from the sequence number counter circuit SQC to the transmission address transmission circuit S _A , and from the corresponding transmission address to the address that is minus 1 from the transmission address that has completed transmission by that time. The information is sent out via the audio skip circuit SKC in the same manner as above. However, in this case, the audio skip circuit
The SKC receives an instruction from the sequence number counter circuit SQC to retransmit, and skips the audio frame and retransmits only the data frame. During this retransmission, writing to the transmission buffer SEB is prohibited, and the voice frame generated at the voice frame input terminal S is discarded without being stored in the voice buffer SB. By skipping and discarding the audio frames described above, relative time transparency of audio is ensured.

The sequence number added to the information to be retransmitted at this time is counted sequentially from the retransmission request sequence number, and after all reproduction processing is completed, the sequence number added to the information to be retransmitted at this time is counted sequentially from the retransmission request sequence number. It is assumed that the information corresponding to n to p to g in the figure is shifted so that the beginning of the information corresponds to the sequence number + 1 address at the time of completion of retransmission, and the sending address and sequence number are made to match. .

After the above processing is completed, the sending processing starts normally. In addition to the above procedure, it is also possible to take a different procedure from the above to ensure relative time transparency of audio and at the same time retransmit data information. In this case, the audio skip circuit SKC No longer needed. In other words, if there is a retransmission request, all data information except the voice information within address 1 of the write address from the retransmission request sequence number is saved from the buffer SEB to the data buffer DB, and the frame indicated by the sending address of the sending buffer SEB is saved. Then, a retransmission sequence number is assigned and normal transmission processing is started. As a result, the relative time transparency of the audio is ensured, and the data information saved in the data buffer DB is again sent to the receiving section via the sending buffer SEB by the above-described normal sending process.

FIG. 4 shows the format of the signal frame sent out from the transmitter. A sequence number is assigned to area _A1 , a display for identifying voice or data (voice/data display information) is assigned to area _A2 , and voice or data information is assigned to area _A3 .

Next, the receiving section will be explained. FIG. 2 is a block diagram of a receiving section according to an embodiment of the present invention, and this receiving section corresponds to the transmitting section of FIG.

The information sent from the transmitter is sequentially stored in the addresses of the receiving buffer RB frame by frame as frames in the format shown in FIG. For the stored information, the sequence number of its area _A1 is read and given to the sequence number check circuit SNC.

Additionally, the fact that the frame has been stored in the reception buffer RB is also notified to the expected sequence number generation circuit ESN, and the expected sequence number generation circuit ESN checks the expected sequence number as a sequence number check circuit.
Send to SNC.

In the sequence number check circuit SNC,
Expected sequence number sent from expected sequence number generation circuit ESN (sequence number expected to be added to the received frame when received normally) and sequence number information _A1 added to the received data frame. If they match, it is determined that the reception was normal, and the normal information and the sequence number are sent to the normal terminal C.

This normal information is received together with the audio data display information A ₂ in the audio data distribution circuit DIS,
As a result, when the display information is audio, the input frame is read from the reception buffer RB and sent to the audio reception buffer SBR for storage. When the display information is data, the input frame is read from the reception buffer RB and stored in the data reception buffer DBR, and the silent frame generation circuit NSG is activated to store a silent frame as audio frame information in the audio reception buffer SBR. do.

By doing this, silent voice frames discarded on the transmitting side and voice frames discarded during data frame retransmission are played back as silent voice frames on the receiving side, ensuring relative time transparency of the voice. Ru.

The normality information and sequence number from the normality terminal C of the sequence number check circuit SNC are sent to the normal response signal sending circuit NR, which is activated and returns the sequence number together with the normal response signal to the transmitter. The transmitter receives the signal and performs the operations described above to complete the transmission of one frame.

In the above process, the sequence number sent from the normal terminal C of the sequence number check circuit SNC is also received by the expected sequence number sending circuit ESN, and in this circuit, for example, by adding 1, etc., the expected sequence number of the next received data frame is determined. Prepare numbers.

The audio frames written to the audio reception buffer SBR in this way are sequentially read, distributed to audio terminals, and decoded into analog audio signals, but the audio frames written to the audio reception buffer SBR are digitized. Since the data is written in real time, including sound and non-sound, and read out sequentially, the relative time transparency of the sound to be played back is ensured.

If, for example, the received sequence number and the expected sequence number sent from the expected sequence number generation circuit ESN do not match due to a transmission error in the data frame reception process described above, the sequence number check circuit SNC compares them as described above. , it is determined that there is an abnormality (reception error), and the abnormality information and expected sequence number are sent from the abnormality terminal N. This information is received by the retransmission request circuit RR and the silent frame generation circuit NSG, and the circuit RR is activated, adds the above sequence number to the retransmission request signal, and sends it back to the transmitter. Also, the circuit NSG is
Write silent frame information to the audio reception buffer SBR. In this way, error recovery control is executed. At this time, since the sequence number check circuit SNC does not send out a normal signal, the audio data distribution circuit DIS does not operate, and therefore the information in the reception buffer RB is not transferred to the audio reception buffer SBR and data reception buffer DBR.

Note that means (not shown) is provided at the received frame input terminal RI, and generates a signal when the end of frame reception is detected. This signal is given as a reset signal to the timing circuit TIM waiting for frame reception. When this reset signal is received, the timing circuit TIM is reset, starts a new operation, generates a signal after a certain timing, activates the silent frame generation circuit NSG by this signal, and transfers the silent frame information to the audio reception buffer SBR. Write. In this way, when a frame is not received, silent frame information is written in the audio reception buffer SBR in response. Therefore, when no information is received, silence information is sent from the audio buffer SBR, and no information is sent from the data buffer DBR.

At the time of starting communication (for example, when the power is turned on) prior to the above-mentioned communication, an initial setting request is given to the transmission initial setting circuit INTS shown in FIG. , the write address sending circuit _WA , the write address limit value sending circuit _LWA , and the sequence number counter circuit SQN, and sends an initial setting signal. Voice buffer SB and data buffer receive initial setting instructions
The DB discards the information in the buffer and prepares to store voice information or data information.

The write address sending circuit _WA and the write address limit value sending circuit LWA, which have received the initial setting instruction, initialize the write address and the write address limit value. The sequence number counter circuit SQC receives the initial setting instruction and initializes the transmission sequence number.

In addition, the transmission initial setting circuit INTS, which has received the initial setting response signal, starts normal operation by sending the audio buffer SB, data buffer DB, write address sending circuit _WA ,
Provided to write address limit value sending circuit LW _A and sequence number counter circuit SQC. Each section given the normal operation start starts the above-mentioned operation.

On the other hand, when receiving the initial setting signal, the receiving initial setting circuit INTR shown in FIG. Send a signal. Upon receiving the initial setting instruction, the timing circuit TIM resets, the reception buffer RB discards the stored frame, and the expected sequence number generation circuit
The ESNs each initialize their expected sequence numbers and begin normal reception operations.

Although one embodiment of the present invention has been described above, it goes without saying that the present invention is not limited to the above embodiment. For example, in the above example, the correctness is determined by identifying the sequence number of the information frame, but it is also possible to detect other elements of the information in the information frame and send a normal response signal or a retransmission request signal.

Since the present invention is configured as described above, when a voice frame is silent, an error control function is executed for the data frame in a data and voice composite transmission method that transmits a data frame in place of the voice frame. In order to ensure accurate transmission, audio frames are transmitted in real time, thereby preventing audio time lag and ensuring relative time transparency of audio.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a transmitter according to an embodiment of the present invention, FIG. 2 is a block diagram of a receiver according to the above embodiment,
FIG. 3 is an explanatory diagram of an example of the structure of the data buffer shown in FIG. 1, and FIG. 4 is a diagram showing the structure of a frame transmitted from the transmitter to the receiver. S...Audio frame input terminal, D...Data frame input terminal, SB...Audio buffer, DB...Data buffer, CW...Comparison circuit, SA...Send address sending circuit, W _A ...Write address sending circuit, LW _A ...Write address control value Sending circuit, SEB...Transmission buffer, RI...Receiving frame input terminal, RB...Receiving buffer, RR...Retransmission request signal sending circuit, ESN...Expected sequence number generation circuit, TIM...Timing circuit, NR...Normal response signal sending circuit, SNC …Sequence number check circuit, DIS…Audio data distribution circuit, NSG…Silent frame generation circuit, SBR…Audio reception buffer, DBR…Data reception buffer, 0
~g, g+1~n-1, n~p...Address (n...
(Example of write address limit value), RA...Sending address correspondence section, W _A ...Write address correspondence section, _A1 ...Sequence number information area, _A2 ...Audio/data display information area, _A3 ...Information area, SQC...Sequence Number counter, INTS...transmission initial setting circuit, INTR
...Reception initial setting circuit.

Claims (1)

[Claims] 1. In a transmission system in which digitized audio signals and data signals are configured into frames and transmitted in a mixed manner, the transmitter includes means for adding an indication to the frame to be transmitted to identify whether the frame is audio or data; When a retransmission request signal is received from a receiving unit, it retransmits only the data frames from the frame corresponding to the sequence number included in the signal to the frames that have already been transmitted. The receiver is equipped with a means for preventing frame retransmission, and the receiver checks whether or not the received frame has been received normally, and if it is determined that the received frame has been received in error, it is determined that the frame has been received in error together with a retransmission request signal. What is claimed is: 1. A composite transmission system for data and voice, comprising means for returning a sequence number of a received frame.