JPS62266470A - Peak value detection circuit - Google Patents

Abstract

PURPOSE:To eliminate the dependence on temperature of a peak value detection output voltage, by connecting a peak value detection diode and a temperature compensation diode of the same type in series to an output terminal of a peak value detection circuit in the polarity opposite to each other. CONSTITUTION:Diodes D1 and D2 for detecting peak values and diodes D3 and D4 for compensating temperature of the same type are connected in series to an output terminal of a peak value detection circuit which applies a fixed DC bias current to the diodes D1 and D2 for detecting peak values to detect a peak value of an input signal and an output terminal 2 is set on the non- connection side of the diodes D3 and D4 for compensating temperature. When a DC bias current is applied to the diodes D3 and D4 for compensating temperature with the amount thereof the same as that of the diodes D1 and D2 for detecting peak values, the forward voltages of these diodes will be equal as these diodes are the same in the type. When the forward voltage of these diodes come equal, they cancel one another since the diodes D1 and D2 and the diodes D3 and D4 are connected in series in the polarity opposite to each other. Thus, the forward voltages of the diodes having dependence on temperature are removed from a voltage developing at an output terminal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a peak value detection circuit, and particularly to a peak value detection diode with improved temperature characteristics.

[Prior Art] FIG. 4 shows a well-known conventional clamp type peak value detection circuit. The peak detection output voltage 0 obtained from this circuit is Vo = VinDD - (VrDI + VFO2). However, VinDD is the peak-to-peak voltage of the input signal,
VFDl, VFD2 are peak value detection diodes D
+ is the forward voltage of D2.

Mata, VFDI, VFD2, It can be expressed as

Here, : Boltzmann constant (1,38xlo-'J
/K) q: Electron charge (1, f3x10 C) T: Temperature (K> IO = diode D+, reverse saturation current of D2 (A)
(Temperature dependence) 11: Current flowing through diodes D+ and D2 (A> As can be seen from the above equation, VFDI and VFD2 have temperature dependence. Therefore, the output voltage VO is V FDI+
It has the same temperature dependence as VFD2.

If the peak value output voltage VO has temperature dependence in this way, an error due to temperature change will occur when detecting the input signal amplitude. Therefore, when performing automatic gain adjustment (AGC) using a conventional peak value detection circuit,
GC is not possible.

[Problem to be Solved by the Invention 1] As mentioned above, in the conventional peak value detection circuit in which the forward voltage of the peak value detection diode, which has temperature dependence, is an element of the output voltage, errors occur due to temperature changes. Therefore, there was a problem that the correct input signal amplitude could not be detected.

Therefore, an object of the present invention is to provide a peak value detection circuit in which the peak 1M detection output voltage does not depend on humidity.

[Means for Solving the Problems] The peak value detection circuit of the present invention detects the peak value of an input signal by applying a constant DC bias current to a peak value detection diode. A temperature compensation diode of the same type as the peak value detection diode is connected in series with the polarity reversed. The non-connected side of the temperature compensation diode is used as the output terminal of the circuit, and the same amount of UW bias current as that of the peak value detection diode is applied to the temperature compensation diode.

[Function 1] When the same direct current bias current flows through the peak value detection diode and the dehydration auxiliary injection diode, the forward voltages of these diodes become equal because each diode is of the same type. Also, since the peak value detection diode and the temperature compensation diode are connected in series with opposite polarities, when the forward voltages become equal, they are canceled out and the output voltage appearing at the output terminal becomes The forward voltage of the diode, which is temperature dependent, is eliminated.

[Example] An example of the present invention will be described below based on FIGS. 1 to 3.

FIG. 1 shows a principle diagram of the peak value detection circuit of the present invention.

The preceding stage of the peak value detection circuit is a type of 18-voltage rectifier circuit with exactly the same configuration as the conventional one, with a pair of peak value detection diodes D+ connected in series with the same polarity and applying a constant DC bias current.

The input signal input to the signal input terminal 1 is supplied to the series connection point of D2 via the DC component cutting capacitor C1,
A voltage doubler is generated from the non-connection side output terminal (cathode) of one peak value detection diode D2, and is held in the peak holding capacitor C2.

The above-mentioned 1! diode D+ for detecting the peak value of l.

In order to cancel the forward voltage of D2, a set of temperature compensation diodes D3 and D are added that apply a constant DC bias current.
A post-stage circuit consisting of 4 is connected.

One piece of temperature compensation diode D that constitutes this latter stage circuit
J, D4 is 11] peak value detection diode D+,
It is the same type as D2, that is, it has the same characteristics and the polarity is in the same direction.''
°[This is connected in series with the peak value detection diodes D+ and D2 of 111 with the polarity reversed (6 R). In other words, each set of electrodes (cathode in this case) of the same polarity is They face each other and are commonly connected.

Therefore, the non-connection side terminals (anodes of the temperature compensation diodes D4) of a set of temperature compensation diodes that serve as the output of the subsequent stage circuit are set as the peak 1M detection output voltage 2 of the circuit.

In addition, by connecting the DC current source 4 to this peak 1st correction detection output terminal 2, a set of temperature compensation diodes D:
Adding the above-mentioned constant DC bias current to l and Da,
By connecting another DC current source 3 to the series connection point of the peak value detection diodes D+, D2 of 1 [1] and the temperature compensation diodes D3, D4, the above-mentioned one-phase temperature compensation injection diodes D3, D4 are connected. A constant DC bias current is applied.

Here, each current value I+, I of the two DC current sources 3.4
2, 11=2I2
[1] The relationship is set as follows. With this setting, the currents flowing through the diodes [)+, D2, D3, and D4 are all equal to I2. When the currents flowing through each diode are all equal, the forward voltage of each diode is also equal, and Vr = VFD1 = VF[12-VF[]3 = VF
It becomes D4. This relationship holds true regardless of temperature.

Therefore, when formula (1) holds true, the output voltage VO of the peak value detection output terminal 2 is Vo = Vinl) (1-(VFDl + VFD2)
+VFD3+VFD4=V1npp
(31, and the forward voltages of each set of diodes 01 to o4 cancel each other out, resulting in an output voltage that does not depend on temperature. As a result, when performing AGC using this, for example, the AGC amplifier (optical receiver) It is possible to eliminate the temperature dependence of the △GC voltage that controls the GC voltage, making it possible to significantly improve its accuracy.

FIG. 2 shows a first embodiment embodying the principle of FIG. 1, in which the DC current sources 3 and 4 of FIG. 1 are replaced by a resistor R1 and a DC voltage source 5. In this case, the resistor R2 and the DC voltage source 6 of voltage 2 are each replaced.

Here, the currents flowing through the resistors R+ and R2 are 1+-12, and the currents flowing through the diodes D3 and D4 are as follows, so the following relational expression is obtained.

Tatashi, VFDI = VFD2, VFD3 = VF
It is D4.

Here, V+, V2 > VFDI, VF port 2.
If VFD3゜■ is set to 04, then 1 can be obtained from equation (4).

By the way, VFDl = VFD2 = VF port 3 = VFD
In order to obtain 4, it is necessary to use equation (5).

If the resistance and DC voltage are set so as to satisfy the conditions of the equation [F]), the principle shown in FIG. 1 is established, and a clamp type peak value detection circuit without temperature dependence can be obtained.

FIG. 3 shows a modification of FIG. 2, in which diodes D5 and Da are connected in series to the resistor R2 in FIG.

Here, the currents flowing through the resistors R+ and R2 are expressed as follows: VFDl = VFD2, VFD3 = V'D4
=V"05-VrD6, so Equation (7) is obtained.

By the way, V[Dl = VFD3 Tosultameniha, +
It is sufficient to use formula 81, and since this is the case, if VI=V2 aa, R2=2R1on can be calculated by 1q from formula (9).

Resist so that the conditions of this QG and iID formula are satisfied.

If the DC voltage is set, yQ=vinpp, and an output voltage with no temperature dependence can be obtained from this circuit. Moreover, compared to the case of FIG. 2, V+, V2>VFDI,
VrD2, VFD3, VFD4 They do not require fancy approximations, so they are more accurate.

[Effects of the Invention] To summarize, according to the present invention, a temperature compensation diode of the same scale is connected in series with the peak value detection diode in the opposite direction, and the same DC bias current is applied to these diodes. With this configuration, the forward voltages of each diode are compensated for by each other, and the peak value detection output voltage is free from temperature dependence caused by the diodes. Therefore, the accurate peak 1 shift without causing errors due to temperature changes can be made in 1q. It will be done.

[Brief explanation of the drawing]

FIG. 1 is a principle diagram of a peak value detection circuit according to the present invention, FIG. 2 is a configuration diagram of a peak value detection circuit according to an embodiment of the present invention, and FIG. 3 is a peak value detection circuit according to an embodiment of the present invention. FIG. 4 is a circuit diagram showing a conventional example. In the figure, 1 is a signal input terminal, 2 is a peak 1 direct detection output terminal, 3.4 is a DC bias power supply, D+ and D2 are peak value detection diodes, and D:l and D4 are temperature compensation diodes.

Claims (1)

[Claims] A temperature compensation diode of the same type as the above peak value detection diode is connected in series in the opposite direction to the output terminal of the peak value detection circuit that detects the peak value of the input signal by applying a constant DC bias current to the peak value detection diode. peak value detection characterized in that the non-connected side of the temperature compensation diode is configured as an output terminal and the same amount of DC bias current as the peak value detection diode is applied to the temperature compensation diode. circuit.