[go: up one dir, main page]

JPS62264342A - Measuring equipment for computer load - Google Patents

Measuring equipment for computer load

Info

Publication number
JPS62264342A
JPS62264342A JP61108961A JP10896186A JPS62264342A JP S62264342 A JPS62264342 A JP S62264342A JP 61108961 A JP61108961 A JP 61108961A JP 10896186 A JP10896186 A JP 10896186A JP S62264342 A JPS62264342 A JP S62264342A
Authority
JP
Japan
Prior art keywords
counter
time
signal
stop
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61108961A
Other languages
Japanese (ja)
Inventor
Ryusuke Shishido
宍戸 隆介
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP61108961A priority Critical patent/JPS62264342A/en
Publication of JPS62264342A publication Critical patent/JPS62264342A/en
Pending legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To measure the load of a computer system with use of an external timer mechanism by supplying a microinstruction to a microinstruction part to control the start/stop of measurement of time for said timer mechanism. CONSTITUTION:A start micropart 3 is started by the interruption waiting instruction contained in an execution control program and the start signal is supplied to a timer mechanism 7 and a counter 8. The counter 8 counts up by 1 for each input of the start signal. When an interruption occurs, a CPU 1 is set under an interruption processing state and a stop micropart 4 is actuated. Thus the operation of the mechanism 7 is stopped and the time is measured up to the stop time point from the start time point of the mechanism 7. This measured time value is integrated by an integration mechanism 9. A read micropart 5 delivers the read signal and calculates the load of the CPU 1 from the contents of the mechanism 9 and the count value of the counter 8 of that time point.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、計算機のプログタム実行時の負荷測定に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to load measurement during execution of a computer program.

〔従来の技術〕[Conventional technology]

従来の装置では計算機の負荷、CPUの空き時間等を測
定する場合には、測定用のプログラムを組込み、この組
込んだダミープログラム内でのダミーロジック命令、た
とえば浮動小数点演算繰り退し等、を常に実行させるこ
とにより無負荷時の時間積算をおこない、この積算時間
と実時間とから計算機の負荷を算出していた。
In conventional devices, when measuring computer load, CPU idle time, etc., a measurement program is installed, and dummy logic instructions, such as floating-point operation carry-back, are executed in this installed dummy program. By constantly running the program, the time when there is no load is accumulated, and the load on the computer is calculated from this accumulated time and the actual time.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の装置は以上のように構成されているので、ダミー
プログラムの命令実行時間を実時間に対応して正規化し
なければならず、この為に事前の予備測定を行うことが
必要であり、また応用プログラム(applicati
on program 、すなわち負荷測定の対象とな
るプログラム)と負荷測定のためのグミイブログラムと
の実行を管理する実行管理プログラムの制御下で測定が
行われるので、実行管理プログラムのためのオーバヘッ
ド時間が誤差とし−C含まれるなどの問題点があった。
Since the conventional device is configured as described above, it is necessary to normalize the instruction execution time of the dummy program according to the real time, and for this purpose, it is necessary to perform preliminary measurements in advance. application program
Since the measurement is performed under the control of the execution management program that manages the execution of the on program (that is, the program that is the target of load measurement) and the gummy program for load measurement, the overhead time for the execution management program may cause an error. There were problems such as the inclusion of Toshi-C.

この発明は上記のような問題点を解決するためシニなさ
れたもので、実行管理プログラムの制御とは無関係ζ:
測定できると共C:、従来は測定困難であった実行宜理
プログラム自体の負荷測定をすることもできる測定装置
を得ることを目的とする。
This invention was made to solve the above-mentioned problems, and has nothing to do with the control of the execution management programζ:
The object of the present invention is to obtain a measuring device which can also measure the load of the execution program itself, which has been difficult to measure in the past.

〔問題点を解決するための手段〕[Means for solving problems]

この発明の装置では中央演算処理装置(以下CPUと略
記する)の外部にタイマ機構、カウンタ及び積算機構を
設け、CPU内にマイクロ命令部を設けて、そのマイク
ロ命令部の中(ニジステム初期化の時点において上記カ
ウンタと積算機構とをリセットするリセット信号を出力
するリセットマイクロ部、負荷測定に関連してあらかじ
め定めた事象の発生時点(:おいて上記タイマを起動す
る開始信号を出力する開始マイクロ部、轟該事象の終了
時点において上記タイマを停止する停止信号を出力する
停止マイクロ部、及びプログラム制御によりて定められ
る時点で読取り信号を出力する読取マイクロ部を設け、
開始信号から停止信号までの経過時間を積算機構で積算
し、開始信号の発生回数をカウンタで計数し、読取り信
号によって積算機構とカウンタとの内容を読取るように
した。
In the device of this invention, a timer mechanism, a counter, and an integration mechanism are provided outside the central processing unit (hereinafter abbreviated as CPU), and a microinstruction section is provided within the CPU. a reset micro section that outputs a reset signal that resets the counter and the integration mechanism at a time point; a start micro section that outputs a start signal that starts the timer at the time of occurrence of a predetermined event related to load measurement; , a stop micro section for outputting a stop signal to stop the timer at the end of the event, and a read micro section for outputting a read signal at a time determined by program control;
The elapsed time from the start signal to the stop signal is integrated by an integration mechanism, the number of occurrences of the start signal is counted by a counter, and the contents of the integration mechanism and the counter are read by a read signal.

〔作用〕[Effect]

マイクロ命令部C;設けられた開始マイクロ部、停止マ
イクロ部、読取マイクロ部、リセットマイクロ部の動作
によって必要な測定が行われるので、測定プログラムを
実行する必要はない。
Microinstruction part C: Since the necessary measurements are performed by the operations of the provided start micro part, stop micro part, reading micro part, and reset micro part, there is no need to execute a measurement program.

〔実施例〕〔Example〕

以下この発明の実施例を図面について説明する。 Embodiments of the present invention will be described below with reference to the drawings.

図面はこの発明の一実施例を示すブロック図で、計算機
システムの構成のうちから、この発明に関連する部分だ
けをぬき出して示しである。図において(1)はCPU
、(21はCPU l:含まれるマイクロ命令部、+3
1 、 +4) 、、 +51 、16)はマイクロ命
令部(1)内に負荷測定のために用意されたマイクロ命
令で(3)はタイマ開始マイクロ部、(4)はタイマ停
止マイクロ部、(5)は外部機構のレジスタ読取マイク
ロ部、(6)はレジスタリセットマイクロ部である。ま
た、負荷測定の為にCPUは)外(−設けられる機構と
して(7)はタイマ機構、(8)はカウンタ機構、(9
)は積算機構である。
The drawing is a block diagram showing one embodiment of the present invention, and shows only the portions related to the present invention extracted from the configuration of the computer system. In the figure, (1) is the CPU
, (21 is CPU l: included microinstruction section, +3
1, +4),, +51, 16) are microinstructions prepared for load measurement in the microinstruction part (1), (3) is the timer start micro part, (4) is the timer stop micro part, (5) ) is the register reading micro section of the external mechanism, and (6) is the register reset micro section. In addition, for load measurement, the CPU is equipped with external mechanisms (7), a counter mechanism (8), and (9) a timer mechanism.
) is an accumulation mechanism.

次に、CPUIIIが無負荷状態にある時間の積算値を
測定する場合について、第1図に示す装置の動作を説明
する。実行管理プログラム内の割込待ち命令、たとえば
聞(エンタウエイト)命令の実行によってCPU fi
+の無負荷状態が開始されるのでδり命令によって開始
マイクロ部(3)が起動され、開始信号が出力されてタ
イマ機構(7)、カウンタ(8)に人力される。これよ
りさき、システム初期化の時点、すなわちIPL (イ
ニシアループログラム・ローディング)動作にともなっ
て、リセットマイクロ部(6)がリセット信号を出力し
、カウンタ(8)と積算機構(91をリセットしておく
。開始信号が入力されるごとにカウンタ(81の計数値
は数値lだけ増加する。
Next, the operation of the apparatus shown in FIG. 1 will be described in the case where the integrated value of the time during which the CPU III is in a no-load state is measured. The CPU fi
Since the positive no-load state is started, the start micro section (3) is activated by the δ-reduction command, and a start signal is outputted to the timer mechanism (7) and counter (8). From this point on, at the time of system initialization, that is, with the IPL (initial program loading) operation, the reset micro section (6) outputs a reset signal, and resets the counter (8) and the totalizing mechanism (91). Each time the start signal is input, the count value of the counter (81) increases by the value l.

次に、割込みが発生するとCPU 111は割込み待ち
状態から割込み処理状態に入りCPU [11の無負荷
状態が終了するので、CPU [1)の割込処理機構の
動作に付随して停止マイクロ部(41が動作し停止信号
が出力されてタイマ機構(7)を伶止し、タイマ機構(
7)の開始時点から、この開始時点ζ:対応する停止時
点までの時間を計測しこの計測値を積算機構で積算する
Next, when an interrupt occurs, the CPU 111 enters the interrupt processing state from the interrupt waiting state, and the no-load state of the CPU [11] ends, so the stop micro section ( 41 operates, a stop signal is output, and the timer mechanism (7) is stopped.
7) The time from the start point ζ to the corresponding stop point is measured, and this measured value is integrated by the integrating mechanism.

読取マイクロ@ +51はCPU tl)からのプログ
ラム制御で読取り信号を出力し、その時点のカウンタ(
8)の計数1直と、iAx機構19)の内容とをバッフ
ァレジスタ(図示せず)に格納する。カウンタ(8)の
計数値は所定の時間内でCPU filが何回無負荷状
態になったかという回数を表し、積算機構(9)の内容
はCPU 111が無負荷状態にあった時間の累計を示
す。
The reading micro@+51 outputs a reading signal under program control from the CPU (tl), and the counter (
8) and the contents of the iAx mechanism 19) are stored in a buffer register (not shown). The count value of the counter (8) represents the number of times the CPU fil has been in the no-load state within a predetermined time, and the content of the integrating mechanism (9) represents the cumulative amount of time that the CPU 111 has been in the no-load state. show.

これらの測定値からCPU il+の負荷を算出するこ
とができる。
The load on the CPU il+ can be calculated from these measured values.

次に、たとえば実行管理プログラムの負荷を測定するに
は、割込処理機構とモニタコール命令(たとえばSvC
命令)によって開始マイクロ部(3)を起動させ、実行
管理プログラムから応用プログラムへ制御を移すロジッ
ク命令によって停止マイクロ部(4)を起動させればよ
い。
Next, to measure the load on the execution management program, for example, the interrupt handling mechanism and monitor call instructions (for example, SvC
The start micro unit (3) may be started by a command), and the stop micro unit (4) may be started by a logic command that transfers control from the execution management program to the application program.

このように、一般的には、負荷測定に関連して測定しよ
うとする事象の発生時点において開始マイクロ部(3)
を起動し、当該事象の終了時点において停止マイクロ部
(4)を起動するようにすれば、当該事象(=関連した
負荷測定ができる。
In this way, in general, the starting micro section (3) is set at the time of occurrence of the event to be measured in connection with load measurement.
By activating the stop micro section (4) at the end of the event, it is possible to measure the load associated with the event.

更に、一定時間内に終了すべき重要処理プログラムにつ
いて、白眼プログラムの開始時点において開始マイクロ
部(3)を起動し、当該プログラムの終了時点において
停止マイクロ部(4)を起動するように設定しておき、
タイマ機構(7)に開始信号が入力された後上記一定時
間内に停止信号が入力されぬときは異常検出割込みを送
出してシステム監視機構(たとえばウォ・ツチドグタイ
マ機構)と同様な動作をさせることもできる。
Furthermore, for important processing programs that should be completed within a certain period of time, the start micro unit (3) is set to start at the start of the Byakugan program, and the stop micro unit (4) is set to start at the end of the program. Ok,
When the stop signal is not input within the above-mentioned fixed time after the start signal is input to the timer mechanism (7), an abnormality detection interrupt is sent to cause the system monitoring mechanism (for example, a timer mechanism) to perform the same operation. You can also do it.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれは、負荷測定をダミイプロ
ダラムの実行によってではなく、外部タイマ機構により
測定するようにし、この外部タイマ機構の時間計測の開
始と停止とを制御するマイクロ命令をマイクロ命令部に
入れたので、測定が計n機システムに及ぼす影響が無視
でき、精度の高い測定結果を得ることができる。
As described above, according to the present invention, load measurement is performed not by executing a dummy programm, but by an external timer mechanism, and a microinstruction section that controls the start and stop of time measurement by this external timer mechanism is provided. Therefore, the influence of measurement on the multimeter system can be ignored, and highly accurate measurement results can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

図面はこの発明の一実施例を示すブロック図である。 (1)はCPU、 [21はマイクロ命令部、(3)は
開始マイクロ部、(4Jは停止マイクロ部、(5)は読
取マイクロ部、(6)はリセットマイクロ部、(7)は
タイマ機構、異常検出割込与 手続補正書 (自発)
The drawing is a block diagram showing an embodiment of the present invention. (1) is the CPU, [21 is the micro instruction section, (3) is the start micro section, (4J is the stop micro section, (5) is the read micro section, (6) is the reset micro section, and (7) is the timer mechanism. , Abnormality Detection Interruption Procedure Amendment (Voluntary)

Claims (1)

【特許請求の範囲】 負荷測定の対象となる計算機の中央演算処理装置(CP
U)の外部に設けたタイマ機構、カウンタ、及び積算機
構、 上記負荷測定に関連して測定しようとする事象の発生時
点において開始信号を出力する開始マイクロ部、上記事
象の終了時点において停止信号を出力する停止マイクロ
部、上記中央演算処理装置が実行するプログラムによっ
て定められる時点で上記カウンタの内容及び上記積算機
構の内容を読取るべき読取信号を出力する読取マイクロ
部、及び上記中央演算処理装置が実行するプログラムに
よって定められる初期化時点において上記カウンタと上
記積算機構の内容をリセットするリセット信号を出力す
るリセットマイクロ部を含んで、上記中央演算処理装置
内に設けられるマイクロ命令部、 上記リセット信号によって上記カウンタと上記積算機構
をリセットし、上記開始信号によって上記カウンタの計
数値を数値1だけ増加する手段、上記タイマ機構により
上記開始信号からその開始信号に対応する停止信号まで
の時間を計測し、この計測した時間を上記積算機構の内
容に加算する手段、 上記読取り信号により読取ったデータを用いて上記計算
機の負荷に関連する数値を算出する手段、を備えた計算
機負荷測定装置。
[Claims] A central processing unit (CP) of a computer subject to load measurement.
U) A timer mechanism, counter, and integration mechanism provided externally, a start micro section that outputs a start signal at the time of occurrence of the event to be measured in connection with the load measurement, and a stop signal at the end of the above event. a stop micro section that outputs an output; a reading micro section that outputs a read signal to read the contents of the counter and the content of the integration mechanism at a time determined by a program executed by the central processing unit; and a reading micro section that is executed by the central processing unit. a microinstruction unit provided in the central processing unit, including a reset micro unit that outputs a reset signal that resets the contents of the counter and the integration mechanism at an initialization time determined by a program; Means for resetting a counter and the integration mechanism and increasing the counted value of the counter by 1 in response to the start signal; and measuring the time from the start signal to the stop signal corresponding to the start signal by the timer mechanism; A computer load measuring device comprising: means for adding the measured time to the content of the integration mechanism; and means for calculating a numerical value related to the load of the computer using data read by the read signal.
JP61108961A 1986-05-13 1986-05-13 Measuring equipment for computer load Pending JPS62264342A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61108961A JPS62264342A (en) 1986-05-13 1986-05-13 Measuring equipment for computer load

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61108961A JPS62264342A (en) 1986-05-13 1986-05-13 Measuring equipment for computer load

Publications (1)

Publication Number Publication Date
JPS62264342A true JPS62264342A (en) 1987-11-17

Family

ID=14498046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61108961A Pending JPS62264342A (en) 1986-05-13 1986-05-13 Measuring equipment for computer load

Country Status (1)

Country Link
JP (1) JPS62264342A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5608866A (en) * 1994-04-08 1997-03-04 Nec Corporation System for measuring and analyzing operation of information processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5608866A (en) * 1994-04-08 1997-03-04 Nec Corporation System for measuring and analyzing operation of information processor

Similar Documents

Publication Publication Date Title
JPS62264342A (en) Measuring equipment for computer load
JPS59208661A (en) How to measure computer load
US5500809A (en) Microcomputer system provided with mechanism for controlling operation of program
JPH0149975B2 (en)
JPS6118045A (en) Program runaway detection method
JPS5937880Y2 (en) Abnormality monitoring device
JPS6259814B2 (en)
JPS5822463A (en) Computer load measuring instrument
JPH02130646A (en) Abnormality detecting system for cpu
JPS6211745B2 (en)
JPH03246638A (en) Program runaway detection method
JP2697695B2 (en) Adapter device
JPS60129849A (en) Arithmetic processing unit
JPH0314148A (en) Program breakdown detecting device
US20060020926A1 (en) Detecting and accounting for unknown external interruptions in a computer program environment
JPS63188244A (en) Measurement system for emerging frequency of instruction
JPH0333939A (en) Microprocessor
JPH01321811A (en) Digital protective relay
JPS6072040A (en) Monitoring system for executing time of program
JPH0566974A (en) Cpu load factor measuring circuit
JPH01243140A (en) controller
JPS62109140A (en) Tracing circuit for program processor
JPS6298435A (en) Defecting method for abnormality of computer
JPS60144840A (en) Measurement system for program cycle
JPS6362773B2 (en)