JPS62263660A - Package and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain a package having excellent electrical insulating properties, thermal conductivity, reliability, etc. and high profit ability and difficult to be peeled by specifying the constitution of a base and a cap. CONSTITUTION:A base 10 has a metallic base body 11 with an indentation for loading a chip 40, a ceramic layer 13 formed onto the metallic base body 11 and having electrical insulating properties, a metallic layer 15 patterned and shaped to a predetermined circuit extending over an outer circumferential section from a peripheral section on the ceramic layer 13, and mixed layers 12, 14 each formed near respective interface of the metallic base body 11, the ceramic layer 13 and the metallic layer 15 and including a constituent on both sides of the interfaces. On the other hand, a cap 20 has a box-shaped metallic base body 21, a ceramic layer 23 shaped to a peripheral section on the side opposite to the base 10 of the metallic base body 21 and having electrical insulating properties, and a mixed layer 22 formed near the interface of the metallic base body 21 and the ceramic layer 23 and including both constituents.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a package for mounting chips such as RC and semiconductor devices, and a method for manufacturing the same.

[Conventional technology]

As chips such as IC1 semiconductor devices become larger and more highly integrated, heat dissipation from the chips has become a problem, and as an alternative to the conventional alumina (A1203) package, ■Be01AIN , 7 cages made of ceramics with good thermal conductivity such as SiC, ■ Enamel pan cages made of enameled iron plates, ■ Pan cages made of 8I material bonded to metal bases with adhesive, ■ Ceramic powder sprayed on metal bases. Puff cage, ■P on metal base
Proposals and studies have been made such as a pan cage in which a ceramic thin film is formed by a VD method, a CVD method, etc., and a package in which an insulating layer of an organic polymer is formed on the surface of a metal substrate.

[Problems with the Prior Art] However, each of the above-mentioned packages has the following problems, and it is difficult to say that any of them are satisfactory.

■ Ceramic packages such as Be05AIN and SiC have a thermal conductivity of 5 to 2 compared to alumina packages.
Although it is 0 times more expensive, it is suitable for refining raw material powder, controlling particle size of powder, molding,
The process is complicated because it is manufactured through processes such as sintering. Furthermore, sintering must be performed at high temperatures (1,500 to 2,000°C), making it difficult to manufacture large packages, causing thermal distortion, and increasing costs. In particular, BeO has high thermal conductivity, but it is a toxic substance and is expensive, so it can only be used in very limited fields.

■ Since the enamel frit of the porcelain pancage is melted at a high temperature of 650 to 800°C, the enamel layer as an insulating layer is as thick as 0.5 mm or more, resulting in poor thermal conductivity. If the floating layer is made thinner (less than 0.1+++ m), the dielectric strength voltage decreases due to the presence of pinholes, resulting in a disadvantage that it cannot be put to practical use.

■ Packages in which an insulating material such as alumina is bonded to a metal base have drawbacks such as increased thermal resistance in the adhesive layer and variations in adhesive strength, and have not been put into practical use.

■ Packages in which ceramic powder is thermally sprayed onto a metal substrate have drawbacks such as a large number of pinholes in the thermally sprayed insulating layer and a lack of dielectric strength and smoothness of the surface of the insulating layer.

■ Pancages in which a ceramic thin film is deposited on a metal substrate by PVD, CVD, etc. require high-temperature treatment of 500°C or higher to form the ceramic thin film, which leaves a lot of room for choice in the metal substrate and reduces strength due to rounding of the substrate. There's a problem. Further, there are drawbacks such as poor adhesion between the thin film and the metal substrate and large variations in film quality.

■ Packages with organic polymer thin film layers have drawbacks such as the polymer's poor heat resistance and low thermal conductivity, making it impossible to provide high heat dissipation.

On the other hand, on the insulators (layers) of the various packages mentioned above, a metal layer is usually formed for bonding with chips and for use in wiring circuits, but conventionally this has been done using adhesives,
It is formed using technologies such as thick film method, PVD method, and CVD method, and a common problem with these methods is poor adhesion of the metal layer to the insulator layer, such as thermal stress when soldering leads. There is a problem that it is easy to peel off. Furthermore, in order to improve the adhesion of the metal layer, precise control of the process is required, resulting in an increase in cost.

[Purpose of the invention]

Therefore, the purpose of this invention is to provide a package that has excellent electrical insulation properties, thermal conductivity, reliability, etc., has a high adhesion of the metal layer and is difficult to peel off, and is highly economical, as well as a method for manufacturing the same. shall be.

〔Example〕

FIG. 1 is a sectional view showing an example of a package according to the present invention. This package is of the CerDTP type and includes a base 0 for mounting a chip 40 such as an IC1 semiconductor element, a cap 20 for covering the base 10 to seal the inside, and a lead frame 60. are arranged on both sides of the package.

Specifically, the base 10 includes a metal base 11 having a recess for mounting the chip 40, a ceramic layer 13 having electrical insulation properties formed on the metal base 11, and a ceramic layer 1.
A metal layer 15 is patterned into a predetermined circuit from the periphery to the outer periphery on 3, and is formed near each interface between the metal base 11, the ceramic layer 13, and the metal layer 15, and on both sides of the metal layer 15. and a mixed layer 12,14 comprising constituent materials.

In this example, the chip 4 is placed in the recessed part of the base 10.
0 is bonded, for example, brazed, with a bonding material 30, and the electrodes of the chip 40 and the patterned metal layer 15 are connected to A.
They are each bonded with wires 50 such as ll% A1, and lead frames 60 are electrically bonded, for example brazed, to the metal layers 15 led out on both sides of the package.

On the other hand, the cap 20 includes a box-shaped metal base 21, an electrically insulating ceramic layer 23 formed on the periphery of the metal base 21 on the side facing the base 10, and a ceramic layer 23 formed between the metal base 21 and the ceramic layer 23. The mixed layer 22 is formed near the interface and includes the constituent materials of both.

In this example, the cap 20 is placed over the base 10 on which the chip 40 as described above is mounted and wired,
The space between the two is hermetically sealed with a sealing material 70 such as low melting point glass.

As the material of the metal base 11.21, it is preferable to select a material that has high thermal conductivity and a coefficient of thermal expansion close to that of the chip 40, such as AI, A1 alloy, CuS, etc.
Selected from Cu alloy, stainless steel, Fe-42Ni, Kovar, etc. In this case, the materials of both the gold 5 substrates 11 and 21 may be the same or different. Further, the metal base 11.21 may have various shapes other than those shown in the drawings depending on the purpose and the like.

As for the type of ceramic layer 13.23, it is preferable to select one that has excellent thermal conductivity and electrical insulation, has a small dielectric constant, and has a coefficient of thermal expansion close to that of the mounted chip 40.
For example, cubic boron nitride (C-BN), boron nitride (BN) containing cubic BN, aluminum nitride <AIN)
, boron phosphide (BP), diamond, diamond-like carbon, silicon nitride (Si3N4), etc.

In this case, the types of both ceramic layers 13 and 23 may be the same or different. Further, in this example, on the cap 20 side, the ceramic layer 23 and the mixed layer 22 are formed only on the peripheral part of the metal base 21, but if necessary, the entire surface of the metal base 21 facing the base 10 may be formed. You can also form them.

As for the 150 kinds of metal layers, it is preferable to select those having excellent tetraelectricity, such as W, Mo, NiXCu, etc.
Selected from AI, Au, Ag, various alloys, etc. Further, although the metal layer 15 is not formed near the joint of the chip 40 on the ceramic layer 13 in this example, the metal layer 15 may be formed there as well, if necessary.

In this example, the lead frame 60 extends the end of the metal layer 15 to the outer periphery of the base 10 and joins there; however, the end of the lead frame 60 is It may be bent and joined to the metal layer 15 at the upper surface of the base 10. Furthermore, although the CerDIP type package is illustrated above, the present invention is not limited thereto, and can also be applied to other types of packages, such as SIP type, flat (FP) type, chimp carrier type, plug-in type, etc. Of course you can.

The features of the above packages are listed below.

■ The base 10 has excellent electrical insulation and thermal conductivity because it is made by closely forming a ceramic layer 13 with excellent thermal conductivity and electrical insulation on a metal base 11 with excellent thermal conductivity. . The same applies to the cap 20. Therefore,
There is little deterioration or malfunction of the chip 40 due to heat, and high integration and high speed are possible.

(2) Moreover, in the base 10, no adhesive is used between the metal base 11 and the 13 ceramic layers and between the ceramic layer 13 and the metal layer 15, and the presence of the mixed layer 12. Since the composition of the interface between the ceramic layer 13 and the metal layer 15 changes continuously, the composition of the interface between the ceramic layer 13 and the metal layer 15 changes continuously.
The heat conduction between the ceramic layer 13 and the ceramic layer 113, and further between the ceramic layer 13 and the metal layer 15 is very good. The same applies to the cap 20.

Furthermore, in the base 10, the mixed layers 12 and 14 act like a barrier, so that the adhesion between the metal base 11 and the 13 ceramic layers and between the ceramic layer 13 and the metal layer 15 is high, and therefore the ceramic layer 13, metal layer 15
is difficult to peel off. In addition, the metal base 11 and the ceramic layer 13
Since the difference in coefficient of thermal expansion between the ceramic layer 13 and the metal layer 15 can be absorbed by the mixed layers 12 and 14 whose compositions are continuously changing, cracks do not occur.

Therefore, it has high reliability. The same applies to camp 20.

■ The ceramic layer 13 on the metal substrate 11 in the base 10 can be made sufficiently thin, so that the chip 40 placed on the base 10 and the metal substrate 1 can be made thin enough.
It is possible to further improve heat conduction with 1.

(2) Both the base 10 and the cap 20 can be made with a larger area easily and at a lower cost than when a ceramic substrate is used alone.

Next, an example of a method for manufacturing the package as described above will be explained with reference to FIG. FIG. 2 is a schematic diagram showing an example of an apparatus for carrying out the manufacturing method according to the present invention.

First, the method of manufacturing the base 10 side will be described. The metal base 11 as described above is attached to the holder 80 and housed in a vacuum container (not shown), and an evaporation source 81 and ion are directed toward the metal base 11. A source 84 is located. It is preferable that the surface of the metal base 11 be polished and cleaned in advance. The evaporation source 81 is, for example, an electron beam evaporation source, and can heat and vaporize the evaporation material 82 to deposit the evaporation substance 83 onto the metal substrate 11 .

Ion #84 is preferably a bucket type ion source, for example.
According to this, it is possible to ionize the supplied gas G, accelerate uniform ions 85 over a large area, and irradiate the metal substrate 11 with the ions 85, thereby making it possible to process a large area at one time. Note that 86 is a film thickness monitor for a thin film formed on the metal substrate 11.

When forming the ceramic layer 13 on the metal substrate 11 (or the ceramic layer 23 on the metal substrate 21 as described later), the types of the vapor deposition substance 83 and the ions 85 may be selected depending on the types, for example, the following combinations. shall be.

(2) When the ceramic layer is cubic BN or BH containing cubic BN, boron (B) is used as the vapor deposition substance 83. Nitrogen (N) ion as ion 85.

■ When the ceramic layer is AIN, the vapor deposition material 83 is aluminum (A1). ion 85
as nitrogen ions. However, in this case, if the metal base 11 is made of AI, it is sufficient to simply irradiate and implant N ions onto the metal base 11 in the initial stage. The injection amount at that time is
For example, it is preferably about 1×10 16 to 1×10 I 11 ions/cm 2 .

In this way, spatter can be suppressed and AIN with high resistivity can be formed.

■ When the ceramic layer is BP, boron is used as the vapor deposited substance 83. Phosphorus (P) as ion 85
)ion. Or vice versa.

■ If the ceramic layer is diamond or diamond-like carbon, carbon (C) is used as the deposited substance 83. The ion 85 is one or more of carbon ions, hydrogen ions, inert gas ions such as argon, or a small amount of silicon ions added thereto to promote diamond formation.

■ When the ceramic layer is 5i3Nn, silicon is used as the vapor deposited substance 83. Nitrogen ion as ion 85.

During the treatment, the inside of the vacuum container may be heated to 10-5~], o
After evacuation to about -7 Torr, first, in order to form the ceramic layer 13, the above-mentioned vapor deposition substance 83 is vapor-deposited from the evaporation source 81 onto the metal substrate 11, and at the same time or alternately, Ions 85 as described above from the ion source 84 are irradiated toward the metal substrate 11 . As a result, the ions 85 are pushed (
Due to the knock-on) action, a mixed layer 12 as described above is formed at the initial stage of film deposition, and subsequently a ceramic layer 13 as described above is formed, resulting in the formation of, for example, the first
Ceramic 7i with base 10 as shown in the figure! 131
A portion below N is obtained.

In the above case, the particle ratio (composition ratio) of vapor deposition substance/irradiation ion
shall be selected as appropriate values depending on the type of ceramic layer 13.

Further, the acceleration energy of the ions 85 is preferably about 50 KeV or less. This is because if the energy exceeds this level, there is a risk that a smooth film surface cannot be obtained due to the sputtering action of the ions 85, and the ceramic layer 1
This is because there is a possibility that a high quality ceramic layer 13 cannot be obtained due to an increase in the number of damaged parts such as defects inside the ceramic layer 3 .

Furthermore, the film may be formed while heating the surface of the metal substrate 11 to, for example, several hundred to 500 degrees Celsius using a heating means (not shown). In this way, the volume caused by the damaged portions and implanted ions can be reduced. In some cases, it is possible to reduce the amount of damage and also to promote the film-forming reaction.

After forming the ceramic I'i13 as described above, for example, the evaporation source 81 and the ions [8
4, the ceramic layer 13 is deposited with metal vapor, and then alternately or simultaneously irradiated with accelerated inert gas ions. In this case, examples of the vapor deposition substance 83 include W, Mo, Ni, Cu, AI,
Au, Ag, various alloys, etc. are used. Further, as the ions 85, for example, inert gas ions such as argon, xenon, nitrogen, etc. are used. Through the above steps, the metal layer 15 is formed on the ceramic layer 13, and the mixed layer 14 is formed near the interface thereof.

As a method for patterning the metal layer 15 into a predetermined circuit, the vapor deposition and ion irradiation may be performed through a mask with a predetermined pattern. A metal layer 15 patterned as an electrical circuit can be formed on a portion of the ceramic layer 13.

However, as a method for obtaining a predetermined electric circuit pattern, it is also possible to form the metal layer 15 as described above and then pattern it using a conventional etching method or the like. As a result of the above, for example, base 1 as shown in Figure 1
0 is obtained.

In the above case, it is preferable that the thickness of the metal layer 15 is approximately equal to the range (average projected range) of the irradiated ions 85.

This is because by doing so, the mixed layer 14 can be effectively formed just near the interface between the metal layer 15 and the ceramic layer 13.

Incidentally, after forming the mixed layer 14, vapor deposition may be performed to further increase the thickness of the metal layer 15.

Further, the acceleration energy of the ions 85 is preferably about 50 Ke■ or less. This is because if the energy exceeds this level, there is a possibility that a smooth film surface cannot be obtained due to the sputtering action of the ions 85.

Further, in the above treatment, the surface of the ceramic layer 13 is heated by heating means (
(not shown) may be carried out while heating to about several hundred to 400'C. In this way, the metal layer 15 and the ceramic layer 13 can be made to fit well and the mixed layer 14 can be formed efficiently. can.

Next, a method for manufacturing the cap 20 will be described. For example, the metal base 21 as described above is attached to the holder 80 in FIG. 2, and as in the case of manufacturing the base 10 described above,
By performing vapor deposition of the vapor deposition substance 83 and irradiation of accelerated ions 85 on the metal substrate 21 as described above, a ceramic layer 23 is formed on the metal substrate 21 and a mixed layer 22 is formed near the interface between the two. Form. In this way, the cap 20 is manufactured. In this case, if the ceramic layer 23 and the like are to be formed only on the periphery of the metal base 21, a mask or the like may be used. The details of the pond are in Base 1 mentioned above.
Since this is the same as the case of forming the ceramic layer 13 and mixed layer 12 of No. 0, the explanation thereof will be omitted here.

Note that the formation of the ceramic layer 23 and the like on the metal base 21 can be performed simultaneously with the formation of the ceramic layer 13 and the like on the metal base 11 described above, or can be performed in a separate process.

Then, the base 10 and the cap 20 are assembled as described above.
After forming, the metal layer 15 of the base 10 and the lead frame 60 are bonded together using the known means as described above, the chip 40 is mounted on the base 10, and the chip 40 and the metal layer are bonded together. 15, and cap 2.
0 and sealing with the sealing material 70, a device as shown in FIG. 1 can be obtained.

The characteristics of the above manufacturing method are listed below.

■ Since it can be processed at relatively low temperatures (for example, below several hundred degrees Celsius), there is no distortion or cranking caused by heat, and high-quality packages can be obtained.

(2) Since a ceramic layer 13.23 with few impurities and uniform film quality and thickness can be obtained, a package with excellent electrical insulation and thermal conductivity can be obtained.

(2) It is possible to form a thin ceramic layer 13, 23, and therefore a package with high thermal conductivity can be obtained from this point as well.

■ Since the ceramic layer 13.23 and metal layer 15 with high adhesion can be obtained by the mixed layer weight 2.14.22,
Each layer peels off easily, resulting in a highly reliable package.

(2) Since the ceramic layer 13 with good surface smoothness is obtained, a package with good adhesion to the chip 40 and good thermal conductivity can be obtained.

■ It is possible to process a large area at one time, and the process is simple, so it is possible to reduce the cost of the package.

■ If the metal layer 15 is patterned using MAKS,
Fine patterning is possible, and as a result, it is easy to increase the number of pins, making it possible to mount IC chips with a higher degree of integration.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to obtain a package which is excellent in electrical insulation, thermal conductivity, reliability, etc., has a high adhesion of the metal layer and is difficult to peel off, and is highly economical.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing an example of a package according to the present invention. FIG. 2 is a schematic diagram showing an example of an apparatus for carrying out the manufacturing method according to the present invention. 10...Base, 20...Cap, 11.21.
...Metal base, 12.14.22...Mixed layer, 13.
23...Ceramic layer, 15...Metal layer, 40...
- Chip, 83... Vapor deposition substance, 85. ··ion.

Claims (2)

[Claims] (1) A package including a base for mounting a chip and a cap to be placed over the base, wherein the base includes a metal base, a ceramic layer having electrical insulation properties formed on the metal base, and a predetermined area on the ceramic layer. and a mixed layer formed in the vicinity of each interface between the metal substrate, the ceramic layer, and the metal layer and containing constituent materials on both sides thereof, the cap comprising: , a metal substrate, a ceramic layer having an electrically insulating property formed at least on the peripheral portion of the metal substrate on the side facing the base, and a ceramic layer formed near the interface between the metal substrate and the ceramic layer and containing constituent materials of both. and a mixed layer comprising: (2) In a method for manufacturing a package comprising a base for mounting a chip and a cap to be placed on the base, the step of manufacturing the base includes the step of depositing a vaporized substance on a metal substrate in a vacuum and accelerating the process. ion irradiation to form an electrically insulating ceramic layer on the metal substrate and a mixed layer containing the constituent materials of both in the vicinity of the interface between the two; By performing vapor deposition of metal vapor and irradiation of accelerated inert gas ions on the ceramic layer, a mixed layer comprising a metal layer on the ceramic layer and constituent materials of both near the interface between the two can be obtained. and patterning the metal layer, and the step of manufacturing the cap includes depositing and accelerating a vaporized substance on at least a peripheral portion of the metal substrate in a vacuum. ion irradiation to form an electrically insulating ceramic layer on at least the peripheral portion of the metal substrate and a mixed layer containing the constituent materials of both in the vicinity of the interface between the two. A method for manufacturing a package characterized by: