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JPS62260769A - Mullite ceramic material - Google Patents

Mullite ceramic material

Info

Publication number
JPS62260769A
JPS62260769A JP61102559A JP10255986A JPS62260769A JP S62260769 A JPS62260769 A JP S62260769A JP 61102559 A JP61102559 A JP 61102559A JP 10255986 A JP10255986 A JP 10255986A JP S62260769 A JPS62260769 A JP S62260769A
Authority
JP
Japan
Prior art keywords
mullite
strength
circuit board
weight
multilayer circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61102559A
Other languages
Japanese (ja)
Inventor
永山 更成
信之 牛房
浩一 篠原
荻原 覚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP61102559A priority Critical patent/JPS62260769A/en
Priority to CN198787103170A priority patent/CN87103170A/en
Priority to KR1019870004190A priority patent/KR900006115B1/en
Publication of JPS62260769A publication Critical patent/JPS62260769A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B35/00Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/01Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics
    • C04B35/16Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics based on silicates other than clay
    • C04B35/18Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics based on silicates other than clay rich in aluminium oxide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Structural Engineering (AREA)
  • Organic Chemistry (AREA)
  • Compositions Of Oxide Ceramics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はムライト系セラミック材料に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to mullite-based ceramic materials.

このムライト系セラミック材料は、Wi気倍信号入力出
用のためのピンを取り付けたり半導体部品を搭載して機
能モジュールを構成するために好適なセラミック絶縁基
板に用いられ、また半導体パッケージの封止部の熱膨張
の緩衝材(スペーサ)にも用いられる。
This mullite ceramic material is used for ceramic insulating substrates suitable for attaching pins for inputting and outputting Wi multiplier signals and for mounting semiconductor components to form functional modules, and is also used for sealing parts of semiconductor packages. It is also used as a buffer material (spacer) for thermal expansion.

〔従来の技術〕[Conventional technology]

近年、LSI等の集積回路の高速化、高密度化に伴って
、放熱や素子の高速化を図るために回路基板上に直接チ
ップを実装する方式が用いられるようになっている。こ
の基板は、従来からアルミナによって構成されていた。
In recent years, as integrated circuits such as LSIs have become faster and more densely packed, a method of mounting chips directly on a circuit board has come into use in order to dissipate heat and increase the speed of elements. This substrate has conventionally been made of alumina.

これは、アルミナが亮い強度をもつため、ピン等を取り
付けるに際し割れ等の問題が生じないことによる。
This is because alumina has high strength, so problems such as cracking do not occur when attaching pins and the like.

しかしながら、上記実゛装方式においては、LSI等の
集積回路のサイズが大きくなるにつれて、LSI等の集
積回路材料と回路基板材料との間で実装時の温度変化に
よって生ずる応力が大きくなるという問題があった。す
なわち、現在のセラミック多層回路基板の主流であるア
ルミナ(AuzOs)は、アルミナ自身の熱膨張係数が
LSI等の集積回路材料であるシリコンの熱膨張係数3
0X10−7/’C(室温から500℃)に比べ、約2
倍以上大きい値を示している。このため。
However, the above mounting method has the problem that as the size of integrated circuits such as LSIs increases, the stress generated between the integrated circuit materials such as LSIs and the circuit board materials due to temperature changes during mounting increases. there were. In other words, alumina (AuzOs), which is the mainstream of current ceramic multilayer circuit boards, has a thermal expansion coefficient of 3 that is lower than that of silicon, which is a material for integrated circuits such as LSI.
Compared to 0X10-7/'C (room temperature to 500℃), approximately 2
It shows a value more than twice as large. For this reason.

アルミナ系多層回路基板へLSI等のシリコン半導体チ
ップを直接ハンフ゛′等で接続する場合、ハンダ接続部
に熱膨張係数差に伴う熱応力が発生し、かかる部分で割
れ等の欠陥が生じ実装の長寿命が得られない問題がある
。特にLSIチップの大型化高密度化によるハンダ接続
部の微細化は、実装寿命をますます悪化させる傾向にあ
る。
When a silicon semiconductor chip such as an LSI is directly connected to an alumina-based multilayer circuit board using a handheld cloth, thermal stress due to the difference in coefficient of thermal expansion occurs at the solder joint, causing cracks and other defects in the solder joint, resulting in long mounting times. There is a problem with not being able to obtain a long life. In particular, the miniaturization of solder joints due to the increase in size and density of LSI chips tends to further worsen the mounting life.

また、アルミナでは誘電率が高く、電気信号の伝播速度
が遅くなるという問題がある。
Furthermore, alumina has a high dielectric constant, which causes the problem that the propagation speed of electrical signals is slow.

これらの問題を解決するためには、多層回路基板の熱膨
張係数をシリコンに近付けるとともに。
In order to solve these problems, the coefficient of thermal expansion of the multilayer circuit board should be brought closer to that of silicon.

多層回路内の電気信号の伝播速度の高速化を図るため、
低比誘電率で高強度の基板材料を開発する必要がある。
In order to increase the propagation speed of electrical signals in multilayer circuits,
There is a need to develop substrate materials with low dielectric constant and high strength.

この要請を満足する材料として、ムライト系セラミック
が考えられる。それはムライトの熱膨張係数が40〜5
5X10コ/”C(室温〜500℃)とシリコンの熱膨
張係数に近く、かつ比誘電率が約6.7  (IMIl
z)と小さいためである。
Mullite ceramics can be considered as a material that satisfies this requirement. It is because the coefficient of thermal expansion of mullite is 40 to 5.
It has a coefficient of thermal expansion of 5X10 C/''C (room temperature to 500℃), which is close to the coefficient of thermal expansion of silicon, and a relative dielectric constant of approximately 6.7 (IMIL
This is because it is small.

しかし、ムライトのみで多層回路基板を作製した場合、
アルミナ系多層回路基板に用いられている焼成温度16
oO℃付近では、焼結が不十分なため多孔質となり、強
度が小さい焼結体しか得られないという問題がある。し
たがって、aSaのムライト焼結体を得るためには、さ
らに高温で焼成しなければならないが、現在の焼成可能
な温度は最大1650℃程度であり、量産上適する炉が
ない等のr#jJM1がある。
However, when making a multilayer circuit board using only mullite,
Firing temperature 16 used for alumina multilayer circuit boards
There is a problem that at temperatures near oO°C, sintering is insufficient and the material becomes porous, resulting in a sintered body with low strength. Therefore, in order to obtain an aSa mullite sintered body, it is necessary to fire it at a higher temperature, but the current firing temperature is about 1650°C at maximum, and r be.

そこで、アルミナ系セラミックと同等の焼成温度で焼結
でき、高い強度を有するムライト系材料の開発が必要で
あった。このようなムライト系材料としてムライトとガ
ラスとからなる複合材料が存在する(特開昭57−11
5895号公報記載)。この従来例は、ガラス組成とし
てたとえばコージェライトC2MgO,2AAxOδ・
5 S i 02)より名7成されている。
Therefore, it was necessary to develop a mullite-based material that can be sintered at the same firing temperature as alumina-based ceramics and has high strength. Composite materials consisting of mullite and glass exist as such mullite-based materials (Japanese Patent Laid-Open No. 57-11
5895). In this conventional example, the glass composition is, for example, cordierite C2MgO, 2AAxOδ.
5 S i 02).

上記従来のムライト系材料はムライト結晶がガラスまた
はガラスから生成する結晶により結合されたものである
。したがって、材料の強度はムライト結晶を結合するガ
ラスまたはガラスから生成される結晶に左右される。
The above-mentioned conventional mullite-based material is one in which mullite crystals are bonded by glass or crystals produced from glass. The strength of the material therefore depends on the glass or crystals produced from the glass that binds the mullite crystals.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、前記従来の材料の強度は最大150M 、P 
a程度ある。つまり、前記の従来技術はムライトを用い
、アルミナの焼成温度と同等の温度で焼結可能にするた
めのガラス組成の開発、ムライト自身の比誘電率が低い
、熱膨張係数がシリコンに近いという点に着目して開発
されたもので、ムライト系材料の高強度は目的ではなく
、その面に対しては検討がなされていない。
However, the strength of the conventional material is up to 150M, P
There are about a. In other words, the above-mentioned conventional technology uses mullite, develops a glass composition that enables sintering at a temperature equivalent to that of alumina, and mullite itself has a low dielectric constant and a coefficient of thermal expansion close to that of silicon. It was developed with a focus on the high strength of mullite-based materials, and no studies have been conducted on that aspect.

したがって、強度の小さいムライト系材料を多層回路基
板に適用すると、多層回路板に電気信号用の入出力用ピ
ンを、ろう付は等で接続した際ろう材料と多層回路板と
の熱膨張係数差により発生する応力により配線板に割れ
等の欠陥が発生し高信頼性の配線板が得られない問題は
そのまま残る。
Therefore, if a mullite-based material with low strength is applied to a multilayer circuit board, the difference in thermal expansion coefficient between the brazing material and the multilayer circuit board when input/output pins for electrical signals are connected to the multilayer circuit board by brazing, etc. The stress generated by this process causes defects such as cracks in the wiring board, and the problem remains that a highly reliable wiring board cannot be obtained.

本発明はかかる問題点を解決するために、高強度のムラ
イト系セラミック材料を提供することを目的とする。
In order to solve these problems, the present invention aims to provide a high-strength mullite-based ceramic material.

〔問題点を解決するための手段〕[Means for solving problems]

従来のムライトにガラス組成を添加している材料につい
てガラスの添加量、ガラス材料の組成等について検討し
たが1強度向上にそれほど大きな影響を与えないという
ことがわかった。次に2種種の酸化物系について検討し
た結果、周期率表ma族の酸化物を添加したムライト系
セラミックの材料は、アルミナ系材料で用いられている
焼成温度1600’Cで焼結が十分なされていることが
Regarding materials in which glass composition is added to conventional mullite, we investigated the amount of glass added, the composition of the glass material, etc., and found that they did not have a significant effect on improving strength. Next, as a result of examining two types of oxide systems, it was found that the mullite-based ceramic material to which oxides belonging to the Ma group of the periodic table were added could be sufficiently sintered at the firing temperature of 1600'C, which is used for alumina-based materials. That's what's happening.

焼結体の収縮率等から判明した。。This was determined from the shrinkage rate of the sintered body. .

本発明はかかる知見によりなされたものであり、その構
成はma族の酸化物の少くとも1種0.1〜10重量%
、残部ムライト(AIlzOs・Sユ02〜2 A Q
 208・5ift)及び不可避不純物からなることを
特徴とするムライト系セラミック材料である。更に、こ
れにマグネシア及びカルシアの1種以上を0.1〜5.
0重量%を含むことを特徴とする。これらの2種の場合
、0.1〜5.0重量%が好ましい。
The present invention was made based on this knowledge, and its composition includes 0.1 to 10% by weight of at least one type of oxide of the Ma group.
, remaining mullite (AIlzOs・Syu02~2 A Q
208.5ift) and unavoidable impurities. Further, one or more of magnesia and calcia is added to this by 0.1 to 5.
It is characterized by containing 0% by weight. In the case of these two types, 0.1 to 5.0% by weight is preferable.

〔作用〕[Effect]

ムライトを主成分とするセラミック材料に添加する周期
率表ma族の酸化物0.1 〜10重量%のムライト系
セラミック材料では、従来のムライト系材料に30重量
%ガラス成分を添加したものに比べ、ムライト粒子を結
合するガラス相がほとんどなく、同相状態で焼結するた
めムライト粒子の粒成長が小さい、また、添加量が0.
1 〜10重量%と少いため、ムライト系との反応によ
り生成される反応生成最も少ない、したがって、ムライ
ト粒子とムライト粒子間に介在する反応生成物は、安定
な結晶相から構成されているため高強度化が図れたもの
と考えられる。
A mullite-based ceramic material containing 0.1 to 10% by weight of an oxide belonging to group MA of the periodic table added to a ceramic material containing mullite as a main component has a higher concentration than a conventional mullite-based material with 30% by weight of a glass component added. , there is almost no glass phase binding the mullite particles, and sintering occurs in the same phase, so the grain growth of the mullite particles is small, and the addition amount is 0.
Since the amount is as small as 1 to 10% by weight, the reaction product generated by the reaction with the mullite system is the least. Therefore, the reaction product interposed between the mullite particles is composed of a stable crystalline phase, so it is highly It is thought that the strength has been improved.

次に、焼結助剤として周期率表111a族の酸化物の添
加量を1種又は2種以上の合計で0.1〜10重量%と
限定した理由について説明する。
Next, the reason why the amount of the oxide of group 111a of the periodic table added as a sintering aid is limited to 0.1 to 10% by weight in total of one or more types will be explained.

酸化物量が0.1重量%未満ではアルミナ系セラミック
材料と同等の焼成温度1600℃では多孔質となり、緻
密な焼結体が得られないため充分な強度が得られないも
のである。なおこの場合焼成温度を上げればm密な焼結
体となることも考えられるが、それでは実用上適するf
がないという問題がある。
If the amount of oxide is less than 0.1% by weight, the material becomes porous at a firing temperature of 1600° C., which is equivalent to that of an alumina ceramic material, and a dense sintered body cannot be obtained, so that sufficient strength cannot be obtained. In this case, it is conceivable that a denser sintered body could be obtained by increasing the firing temperature, but this would result in a practically suitable sintered body.
The problem is that there is no.

次に10重重量以下とした理由は、10重量%を超える
とムライトの粒成長がおこり1強度が逆に低下するため
である。イツトリアは0.1〜3.0重量%が好ましい
Next, the reason why the weight is set to 10% by weight or less is that if it exceeds 10% by weight, grain growth of mullite will occur, and the 1 strength will decrease. The amount of ittria is preferably 0.1 to 3.0% by weight.

〔実施例〕〔Example〕

次に本発明を実施例によりさらに具体的に説明する。な
お、本発明はこれら実施例に限定されるものではない。
Next, the present invention will be explained in more detail with reference to Examples. Note that the present invention is not limited to these Examples.

以下に「部」とあるのは重量部を示し、「%」とあるの
は重量%を示す。
Below, "parts" indicate parts by weight, and "%" indicate weight %.

(実施例1) 第1表の(1) 、 (2)にムライト系セラミック材
料の配合組成を示す。配合組成は重量%で示している。
(Example 1) Table 1 (1) and (2) show the composition of the mullite ceramic material. The composition is shown in weight%.

またアクチュニウム系の酸化物を除いている。これはア
クチュニウム系が放射性元素のためである。
Also, actunium-based oxides are excluded. This is because actunium is a radioactive element.

ムライトはムライト粉(平均粒径2μm)を用いている
Mullite powder (average particle size 2 μm) is used as the mullite.

第1表の配合組成に重合度100oのポリビニルブチラ
ール5.9 部、トリクロロエチレン124部、テトラ
クロロエチレン32部、n−ブチルアルコール44部、
ブチルフタリルグリコール酸ブチル2部を加え、ボール
ミルで20時時間式混合し、スラリーを作る。真空脱気
処理により、スラリーから気泡を除去する0次にそのス
ラリーをドクターブレードを用いてポリエステルフィル
ム上に約0.2m厚さに塗布し、炉を通して乾燥させグ
リーンシート(生の成形体)を作る。グリーンシート5
0角に切断し、30層積層した後熱間プレスにより圧着
した。圧着条件は、温度120℃で10分間保持、圧力
は40kg/dである。圧着後、グリーンシート積層体
の樹脂抜きのため、温度1200℃で1時間保持して脱
脂をおこなった。その後、温度1600℃で1時間保持
して焼成を行い、焼結体を得た。1600℃で焼成した
のは、配線導体材料であるW、Mo等の焼結を同時にお
こなわなければならないためである。
The composition shown in Table 1 includes 5.9 parts of polyvinyl butyral with a degree of polymerization of 100o, 124 parts of trichlorethylene, 32 parts of tetrachlorethylene, 44 parts of n-butyl alcohol,
Add 2 parts of butyl phthalyl glycolate and mix in a ball mill for 20 hours to make a slurry. Air bubbles are removed from the slurry by vacuum degassing. Next, the slurry is coated on a polyester film to a thickness of approximately 0.2 m using a doctor blade, and dried through an oven to form a green sheet (green molded product). make. green sheet 5
After cutting into zero angles and laminating 30 layers, they were bonded by hot pressing. The pressure bonding conditions were a temperature of 120° C., held for 10 minutes, and a pressure of 40 kg/d. After the pressure bonding, the green sheet laminate was held at a temperature of 1200° C. for 1 hour to remove the resin and degrease the green sheet laminate. Thereafter, the temperature was maintained at 1600° C. for 1 hour to perform firing, thereby obtaining a sintered body. The reason for firing at 1600° C. is that the wiring conductor materials such as W and Mo must be sintered at the same time.

次に、焼結体を比誘電率測定及び抗折強度測定用試験片
に切断し、ダイヤモンドトラップ砥石板を用いて研磨し
た。第2表に、第1表の(1) 、 (2)に示す材料
の特性を示す。第2表において、総合評価はI[Ia族
の酸化物が添加されたムライト系セラミック材料が多層
配線基板としての適用性を有するか否かのものであり、
総合評価の0印は比誘電率9.5 (IM& )以下か
つ抗折強度150MPa以上のものを示し、x印のもの
は非?J4電率が9.5 より大きく、また抗折強度が
150MPaより小さいものを示す、なお、スペーサ等
に使用される材料にあっては比、%[率の値に限らず、
抗折強度が150 M 、P a以上にあればよい。
Next, the sintered body was cut into test pieces for measuring dielectric constant and bending strength, and polished using a diamond trap grindstone. Table 2 shows the properties of the materials shown in (1) and (2) in Table 1. In Table 2, the overall evaluation is whether the mullite-based ceramic material to which I[Ia group oxide is added has applicability as a multilayer wiring board,
A mark of 0 in the overall evaluation indicates a dielectric constant of 9.5 (IM& ) or less and a bending strength of 150 MPa or more, and an x mark indicates a non-permittance. J4 Indicates that the electrical constant is greater than 9.5 and the bending strength is less than 150 MPa.For materials used for spacers etc., ratio, % [not limited to ratio value,
It is sufficient if the bending strength is 150 M, P a or more.

また、比較するために一般のムライトにニージェライト
となるガラス成分を30%添加したムライト系セラミッ
クス、及びアルミナ系材料め配合組成及び特性結果を第
3表に示す。
In addition, for comparison, Table 3 shows the composition and properties of mullite-based ceramics made by adding 30% of a glass component to form nigerite to general mullite, and alumina-based materials.

以下第2表及び第3表の特性について説明する。The characteristics shown in Tables 2 and 3 will be explained below.

第1表の尚2のどと<Laz、sが10%を超えて添加
されたものは、抗折強度が120〜140M P aと
低いものとなっている。また第2表のNα20、Nα3
3.&40のように焼結助剤として111a族の酸化物
が添加されていないものは、焼結体が多孔質となり、緻
密化されていない、したがって、比1N電率は6.0〜
6.5 (LM七)と低いが、抗折強度は50〜110
MPaと小さく使用上不適当である。
In Table 1, those in which more than 10% of Laz and s were added had a low bending strength of 120 to 140 MPa. Also, Nα20 and Nα3 in Table 2
3. &40, in which the 111a group oxide is not added as a sintering aid, the sintered body is porous and not densified, so the specific 1N electric rate is 6.0 ~
Although it is low at 6.5 (LM7), the bending strength is 50 to 110.
It is unsuitable for use due to its small MPa.

一方、第1表のその他の材料系では比誘電率9.5 C
LM七)以下、抗折強度150〜280MPaが得られ
て、多層配線基板材料として十分使用されることができ
る。このときの比誘電率は酸化物をlO重重量加えても
最大9.5 である。
On the other hand, the other material systems listed in Table 1 have a dielectric constant of 9.5 C.
LM7) Below, a bending strength of 150 to 280 MPa is obtained, and the material can be sufficiently used as a multilayer wiring board material. At this time, the relative dielectric constant is 9.5 at maximum even if 1O weight of oxide is added.

第1表及び第2表から、比誘電率の小さい材料系を得る
ときには1周期律111a族の酸化物の添加量を少くす
ればよいことがわかり、逆に抗折強度の高いものを得る
ためには、酸化物の添加量を多くすればよいことがわか
る。
From Tables 1 and 2, it can be seen that in order to obtain a material system with a low dielectric constant, it is sufficient to reduce the amount of the oxide of group 111a of the periodic law; conversely, in order to obtain a material system with a high bending strength It can be seen that it is sufficient to increase the amount of oxide added.

次に第3表の結果について説明する。第3表かられかる
ように、比較材料であるアルミナ系では比誘電率が10
(IMHz)で、抗折強度が300MPaとなっており
、ムライト系材料に30%コージュライトが添加された
ものでは、比誘電率5.9 (IMI(z ) 、抗折
強度が150MPaとなっている。したがって、アルミ
ナは強度的には300 M P aと大きな値を示し十
分満足した強度を示しているが、比誘電率が10と大き
いために信号の伝播速度を遅くする原因となっている。
Next, the results in Table 3 will be explained. As can be seen from Table 3, the comparative material, alumina, has a dielectric constant of 10.
(IMHz), the flexural strength is 300 MPa, and a mullite material with 30% cordierite added has a dielectric constant of 5.9 (IMI(z)) and a flexural strength of 150 MPa. Therefore, alumina has a large value of 300 MPa, which is a sufficiently satisfactory strength, but its relative dielectric constant is as large as 10, which causes a slowing of the signal propagation speed. .

一方、ムライト系材料に30%コージュライトが添加さ
れているものにあっては、比誘電率が5.9と低く良好
であるのに対し、抗折強度が100〜150MPaL、
か得られていないために、強度に ゛おいて不十分であ
る。
On the other hand, a mullite-based material with 30% cordierite added has a good dielectric constant as low as 5.9, but a bending strength of 100 to 150 MPaL,
The strength is insufficient because it has not been obtained.

これに対し、第3表の本発明材であるムライト系材料に
イツトリアの酸化物を添加した材料では、比誘電率が7
.5 (IMI(z ”)とムライト系材料に30%ガ
ラスを添加した系よりやや大きな値を示すが、ムライト
系材料に0.1 %イツトリアの酸化物を添加した系で
は、はぼ同様な比JfiWi率を示し、強度においては
抗折強度150 M P aが得られている。したがっ
て、ムライト系材料に30%ガラスを添加した系より抗
折強度が50%以上の向上を示している。特に強度に関
しては、ムライト系材料に3.0  %イツトリア酸化
物を添加したときに250 M P aが得られ、アル
ミナの強度300 M P aの8割以上にも達し、低
比誘電率でかつ高強度のムライト系セラミック材料であ
ることが確認された。
On the other hand, in the material of the present invention in Table 3, which is a mullite-based material to which yttria oxide is added, the dielectric constant is 7.
.. 5 (IMI (z '')) shows a slightly larger value than the system in which 30% glass is added to the mullite-based material, but the ratio is almost the same in the system in which 0.1% yttria oxide is added to the mullite-based material. In terms of strength, a transverse strength of 150 MPa was obtained.Therefore, the transverse strength is improved by more than 50% compared to a system in which 30% glass is added to a mullite-based material.Especially Regarding strength, when 3.0% yttrioxide is added to mullite-based material, 250 MPa is obtained, which is more than 80% of alumina's strength of 300 MPa, and has a low dielectric constant and high strength. It was confirmed that it is a strong mullite ceramic material.

(、、人イifa) 第  2  表 次に焼結体のX線解析結果について説明する。(,, people ifa) Table 2 Next, the results of X-ray analysis of the sintered body will be explained.

第1表のNα8に示す焼結体のX線解析結果では。In the X-ray analysis results of the sintered body shown in Nα8 in Table 1.

ムライト以外にイツトリウムシリケイト(YzSiOs
)とアルミニウムイツトリウムオキサイド(A n z
Y40e)との安定な単結晶からなりほとんど非晶質は
認められなかった。
In addition to mullite, yztrium silicate (YzSiOs
) and aluminum yttrium oxide (A n z
It consisted of a stable single crystal with Y40e), and almost no amorphous material was observed.

これに対し表3のムライト系材料に30%ガラス(コー
ジェライト)を含有した焼結体のX線解析結果ではムラ
イト以外にA Q z○a、5iOz。
On the other hand, the X-ray analysis results of the sintered body containing 30% glass (cordierite) in the mullite-based material shown in Table 3 show A Q z○a, 5iOz in addition to mullite.

MgOの少くとも2種以上の結晶層であるスピネル(A
 Q 2M g O4)、サファリン(MggA Q 
asiz、502o) +コージェライト(M gzA
 Q 4S i 2+016)、シリマナイト(A Q
 zs i Oa)等数多くの複雑な相からなっている
。これは、ムライト系材料を焼成するために含有したガ
ラス成分がムライトの界面で反応生成したためである。
Spinel (A
Q 2M g O4), Safarin (MggA Q
asiz, 502o) + cordierite (M gzA
Q 4S i 2+016), sillimanite (A Q
It consists of many complex phases such as zs i Oa). This is because the glass component contained for firing the mullite-based material reacts and generates at the mullite interface.

したがって、強度が十分得られない原因となっている。Therefore, this causes insufficient strength.

以上本実施例から、ムライ1−系材料に焼結助剤として
周期律表111 a族酸化物を0.1〜10重景重量加
して焼結体を製造することにより、低比誘電でかつ高強
度の多層回路基板材料が得られる。
From the above examples, it was found that by manufacturing a sintered body by adding 0.1 to 10 gb of oxide of Group A of Periodic Table 111 as a sintering aid to Murai 1-based material, it has a low dielectric constant. Moreover, a high-strength multilayer circuit board material can be obtained.

なお、スペーサ材として本発明材を使用する場合は、比
誘電率を無視することができる。
Note that when the material of the present invention is used as a spacer material, the dielectric constant can be ignored.

次に、上記ムライト−martA酸化物系セラミックを
用いて、多層回路板を製造した。この多層回路板の縦断
面図を第1図に示す、第1図において、1は本発明材料
で構成された表面層を示し、2はライン配線に近接した
絶a層(中間層のことであリシリカ系で構成されたもの
)を示し、3は本発明材料系で構成された裏面層を示す
、この裏面層3には金−ゲルマニウムろう接部8を介し
て外部接続用ピン4がろう接されている。また、表面層
1にはハンダ接続部5を介してSiチップ6が接続され
ている。7は導体配線を示す。
Next, a multilayer circuit board was manufactured using the mullite-martA oxide ceramic. A vertical cross-sectional view of this multilayer circuit board is shown in FIG. 3 indicates a back layer made of the material of the present invention. External connection pins 4 are connected to this back layer 3 via gold-germanium solder joints 8. being touched. Furthermore, a Si chip 6 is connected to the surface layer 1 via a solder connection portion 5 . 7 indicates conductor wiring.

次に上記第1図の多層回路板の製法について説明する。Next, a method for manufacturing the multilayer circuit board shown in FIG. 1 will be explained.

実施例1により作製したムライト−ma族酸化物系セラ
ミックグリーンシート及び比H電率が約6以下(IMH
z)のシリカ系材料のグリーンシートにパンチ機で直径
100μmの孔を設け、タングステンペーストを埋め込
み、タングステンペーストで導体配線をスクリーン印刷
法により形成した。第1図の表面層1と裏面層3は本発
明材とし、2のライン配線に近接した絶縁層(中間層)
にシリカ系のものを用いた。導体配線後、積層プレス機
により積層板を作製した。この積層板を外形切断した後
、炉内にセットした。まず、槓脂抜きのために水蒸気を
含んだNzガス+H2ガス8囲気で昇温速度50’C/
hで1200℃まで昇温した。
The mullite-ma group oxide ceramic green sheet produced in Example 1 and its specific H electric rate of about 6 or less (IMH
Holes with a diameter of 100 μm were formed in the green sheet of the silica-based material of z) using a punching machine, tungsten paste was filled in, and conductor wiring was formed using the tungsten paste by screen printing. The surface layer 1 and the back layer 3 in FIG.
A silica-based material was used. After conductor wiring, a laminate was produced using a laminate press machine. After cutting this laminate into an external shape, it was set in a furnace. First, in order to remove fat from the oil, the temperature was increased at a heating rate of 50'C/8 in an atmosphere of Nz gas + H2 gas containing water vapor.
The temperature was raised to 1200°C in h.

次いで、N2ガス十H2ガス雰囲気で昇温速度100℃
/hで昇温し、最高温度1600’cで1時間保持し、
セラミック多層回路板を作製した。
Next, the temperature was increased at a rate of 100°C in an atmosphere of N2 gas and H2 gas.
/h and held at a maximum temperature of 1600'c for 1 hour,
A ceramic multilayer circuit board was fabricated.

このようにして作製したセラミック多層回路板に無電解
ニッケルメッキ及び金メッキをほどこした後、カーボン
の治具を用いた通常の方法でコバールピン4を金−ゲル
マニウム炉8にて接続した。
After electroless nickel plating and gold plating were applied to the ceramic multilayer circuit board thus produced, Kovar pins 4 were connected in a gold-germanium furnace 8 using a conventional method using a carbon jig.

またハンダ5でSiチップ6を直接搭載した。In addition, the Si chip 6 was directly mounted using solder 5.

このようにして得られた多層回路板では、表面層1及び
裏面層3は炉材料との熱膨張係数差により発生する応力
による割れは認められず、健全でかつ高信頼性の多層回
路板が得られた。このような表面)?j1及び裏面層3
に電気信号出力用ピンをろう付は等で接続した場合でも
、ろう材料と多層回路基板との膨張差による多層回路基
板内に発生する割れが防止でき、かつ高寿命の多層回路
基板となるものである。
In the multilayer circuit board obtained in this way, no cracks due to stress caused by the difference in thermal expansion coefficient with the furnace material were observed in the front layer 1 and back layer 3, and a healthy and highly reliable multilayer circuit board was obtained. Obtained. surface like this)? j1 and back layer 3
A multilayer circuit board that can prevent cracks that occur in the multilayer circuit board due to the expansion difference between the brazing material and the multilayer circuit board even when electrical signal output pins are connected by brazing, etc., and that the multilayer circuit board has a long life. It is.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明にかかるムライト系セラミッ
ク材料によれば、ma族酸化物を0.1〜10重量%添
加して焼結することにより、同相反応状態で焼結がおこ
なわれるため、ムライト粒子の粒成長も小さくムライト
粒界にガラス相がほとんどない焼結体となる。したがっ
て、安定な結晶相より構成されることになり、高強度化
を図ることができる。
As explained above, according to the mullite-based ceramic material according to the present invention, sintering is performed in an in-phase reaction state by adding 0.1 to 10% by weight of a Ma group oxide, so mullite The grain growth of the particles is also small, resulting in a sintered body with almost no glass phase at the mullite grain boundaries. Therefore, it is composed of a stable crystalline phase, and high strength can be achieved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係るムライト系セラミック材料を用い
てfIS成された多層配線回路板の縦断面構成図を示す
。 1・・・表面層、2・・・絶縁層、3・・・裏面層、4
・・・外部接続用ピン、5・・・ハンダ接続部、6・・
・Siチップ、7・・・導体配線、8・・・金−ゲルマ
ニウムろう接続部。
FIG. 1 shows a vertical cross-sectional configuration diagram of a multilayer wiring circuit board formed by fIS using a mullite ceramic material according to the present invention. 1... Surface layer, 2... Insulating layer, 3... Back layer, 4
...External connection pin, 5...Solder connection part, 6...
- Si chip, 7... Conductor wiring, 8... Gold-germanium brazing connection part.

Claims (1)

【特許請求の範囲】 1、IIIa族の酸化物の少くとも1種0.1〜10重
量%、残部ムライト及び不可避不純物からなることを特
徴とするムライト系セラミック材料。 2、IIIa族の酸化物の少なくとも1種0.1〜10
重量%、マグネシア0.1〜5.0重量%及びカルシア
0.1〜5.0重量の少なくとも1種、残部ムライト及
び不可避系鈍物からなることを特徴とするムライト系セ
ラミック材料。
[Scope of Claims] 1. A mullite-based ceramic material comprising 0.1 to 10% by weight of at least one group IIIa oxide, the balance being mullite and unavoidable impurities. 2. At least one group IIIa oxide 0.1 to 10
1. A mullite-based ceramic material comprising at least one of 0.1-5.0% by weight of magnesia and 0.1-5.0% by weight of calcia, and the balance being mullite and unavoidable dull material.
JP61102559A 1986-05-02 1986-05-02 Mullite ceramic material Pending JPS62260769A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP61102559A JPS62260769A (en) 1986-05-02 1986-05-02 Mullite ceramic material
CN198787103170A CN87103170A (en) 1986-05-02 1987-04-29 Mullite-based ceramic materials
KR1019870004190A KR900006115B1 (en) 1986-05-02 1987-04-30 Mullite - based ceramics material

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61102559A JPS62260769A (en) 1986-05-02 1986-05-02 Mullite ceramic material

Publications (1)

Publication Number Publication Date
JPS62260769A true JPS62260769A (en) 1987-11-13

Family

ID=14330589

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61102559A Pending JPS62260769A (en) 1986-05-02 1986-05-02 Mullite ceramic material

Country Status (3)

Country Link
JP (1) JPS62260769A (en)
KR (1) KR900006115B1 (en)
CN (1) CN87103170A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1134380C (en) * 1997-01-30 2004-01-14 淄博工业陶瓷厂 The preparation method of sintered zirconium mullite bricks
US9054502B1 (en) * 2014-08-06 2015-06-09 Federal-Mogul Ignition Company Ceramic for ignition device insulator with low relative permittivity
CN106977207A (en) * 2015-04-15 2017-07-25 张琴 medical zirconium silicide based composite ceramic material and preparation method thereof
JP6650804B2 (en) * 2016-03-23 2020-02-19 日本碍子株式会社 Mullite-containing sintered body, its production method and composite substrate

Also Published As

Publication number Publication date
KR900006115B1 (en) 1990-08-22
KR870011820A (en) 1987-12-26
CN87103170A (en) 1987-11-25

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