JPS6225509A - Output circuit - Google Patents

Abstract

PURPOSE:To prevent mis-discrimination as short-circuit of load by using an output of a comparator as a monitor signal as it is when an output of an overvoltage detection circuit is a normal value and inverting the output of a buffer as the monitor signal if the said output is abnormal. CONSTITUTION:If a power supply VCC rises abnormally, a Zener diode ZD is conducted, a transistor (TR) Q2 is turned on and a TR Q3 is turned off. Thus, an output of a NOR gate G1 is brought into L, an output of an inverter I1 goes to H and the TR Q1 is turned off. A buffer 2 consists of a comparator 21, a reference voltage source 22 and an inverter I3, the output of the inverter I3 is in-phase with an input IN and an output (a) of the comparator 21 is in opposite phase thereto. A control circuit 7 consists of an inverter I2 and NOR gates G2-G5 and produces an output MON of logic as a.b+a.(-c)+(-b).(-c) to three inputs a, b, c. As a result, even when an overload is detected at the normal value of VCC, the level of IN=L and MON=H is caused and mis- discrimination of short circuit detection is precluded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement of an output circuit having an overvoltage detection function and an output monitor signal sending function.

[Conventional technology]

Conventionally, the output circuit that controls on/off the output current flowing to the load according to the H (high) or L (low) of the input signal has a third
As shown in the figure, an overvoltage detection circuit 1 may be provided to prevent the circuit from being destroyed when the power supply Vcc rises abnormally. To explain the operation without this circuit 1, the input signal IN is amplified by the buffer 2 and drives the transistor Q1. Since the transistor Q1 is a pnp type, IN=H
Turns it off when it is turned on, turns it on when it is set to IN=L. When transistor Q+ is turned on, current flows from power supply Vcc to load 3.

Conversely, if transistor Q1 is off, no current flows through load 3. OUT is an output voltage applied to the load 3 and is compared with a reference voltage 5 by a comparator 4. The output of the comparator 4 becomes the monitor signal MON, and by comparing this with the signal IN at that time, the state of the load 3 can be determined. Theoretical Table 1 Load 3 has a normal state and a short-circuit or open fault state. In the short-circuit state, no voltage is generated in the load 3, so the monitor signal MON is L regardless of the HIL of the input IN. On the other hand, no current flows through the load 3 in the oven state. Therefore, a small current (several 100 μA) is generated from the constant current source 6.
) is allowed to flow, and when this flows into the comparator 4 without flowing into the load 3, the monitor signal MON becomes H. In this case as well, it does not depend on the input H or L. Therefore, input IN is H2L
The monitor signal MON is in reverse phase when changing to .

If it changes to H, it can be determined that the load is normal, and if the monitor signal MON similar to the input IN is obtained, it can be determined that the load has failed.

[Problem that the invention seeks to solve]

However, if the overvoltage detection circuit 1 is provided, the transistor Q1 is turned off regardless of the H or L level of the input IN when Vcc rises abnormally. Therefore, the monitor signal MON is L.
Therefore, when the input IN is L, the same condition as a load short circuit is established. When the system receiving the monitor signal MON detects a load short circuit, it memorizes this, fixes the signal IN to H, and locks the transistor Q+ so that it cannot be turned on. Therefore, if this occurs when overvoltage is detected, there is a drawback that the output circuit will not operate even if VCC returns to normal thereafter. The present invention attempts to improve this point.

[Means for solving problems]

The present invention relates to a transistor that controls on/off a current flowing through a load according to an input signal, and an overvoltage that monitors the power supply voltage of the transistor and forcibly turns the transistor off when it becomes an overvoltage. a detection circuit; a comparator that compares the voltage applied to the load with a reference voltage to create an output monitor signal; and when the overvoltage detection circuit detects an overvoltage, the input signal is used in place of the output monitor signal from the comparator. The present invention is characterized by comprising a control circuit that inverts the signal and outputs it as an output monitor signal. FIG. 1 is a block diagram of its principle, and 7 is a control circuit added according to the present invention.

[Effect]

The control circuit 7 receives the output of the overvoltage detection circuit 1,
If this is a normal value, the output of the comparator 4 is directly output as the monitor signal MON, but if an abnormality occurs, the output (input IN) of the buffer 2 is inverted and used as the monitor signal MON.

〔Example〕

FIG. 2 is a circuit diagram showing one embodiment of the present invention, showing the overvoltage detection circuit 1 and control circuit 7 in detail. Explain the operation. When Vcc rises abnormally, the Zener diode ZD becomes conductive, turning on the transistor Q2 and turning off the transistor Q3.

At this time, the collector voltage of transistor Q3 becomes H level, forcing the output of NOR gate G+ to become L.

As a result, the inverter ■! The output of the transistor Q1 becomes H, and the transistor Q1 is turned off regardless of the level of the input IN. The buffer 2 includes a comparator 21, a reference voltage 22, and an inverter I3. The output of the inverter I3 is in phase with the input IN, and the output a of the comparator 21 is in opposite phase.

Control circuit 7 includes inverter I2 and NOR gate 02
〜 Consisting of G5, for three human forces a, b, and c, a −b+a −c +b −c ・・・
. . . produces a logical output MON of (1). The above formula is b
When = o (when Vcc is normal) a fist c+c=c
. . - Odd bone (2), so the monitor signal MON becomes the inverted value τ of the output C of the comparator 4 (+ and - of this input are reversed as in FIG. 1). On the other hand, when b = 1 (when Vcc is abnormal), a + a - c = a ...... (3
), the monitor signal MON is the inverted value a of the input IN.
=IN.

As a result, even if overvoltage is detected when the load is normal, IN=L, M
Since ON=H, there is no need to misjudge that a short circuit has been detected. Therefore, even if the transistor Q1 is temporarily fixed off due to overvoltage detection, normal operation can be resumed once Vcc returns to normal.

〔Effect of the invention〕

As described above, according to the present invention, there is an advantage that the output circuit having the overvoltage detection function does not need to output a monitor signal that is erroneously determined to be a load short circuit when overvoltage is detected.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a block diagram showing an example of a conventional output circuit. In the figure, 1 is an overvoltage detection circuit, 3 is a load, 4 is a comparator, 5 is a reference voltage, 6 is a constant current source, 7 is a control circuit, 02 to G5 are NOR gates, and I2 is an impark.

Claims (1)

[Claims] A transistor that controls on and off the current flowing to the load according to the input signal, and monitors the power supply voltage of the transistor,
An overvoltage detection circuit that forcibly turns off the transistor when an overvoltage occurs; a comparator that compares the voltage applied to the load with a reference voltage to create an output monitor signal; an output circuit comprising: a control circuit which inverts the input signal and uses it as an output monitor signal instead of the output monitor signal from the comparator when the output monitor signal is detected.