JPS62219766A - Picture processor - Google Patents

Abstract

PURPOSE:To easily perform an area designation, by providing an area discriminating means which discriminates a prescribed area on an original as the object area of a picture process based on a mark identified by a mark identifying means, and a picture processing means which performs a desired picture process for an area discriminated by the above means. CONSTITUTION:A picture signal 18 binary-coded by the first binarization circuit 16 is supplied to a data compression circuit 37, and at the data compression circuit 37, the picture signal 18 is thinned out both in a main scan and a subscan directions. It is because that the recognition of the rough shapes of a start mark 32S and an end mark 32E is enough, and therefore, the capacity of a memory can be reduced, and the constitution of a mark area detecting part 19 can be simplified. At the data compression circuit 37, in the picture signal 18 inputted bit by bit, one bit per two bits is thinned out in the main scan and the subscan directions while making the logical OR of two bits. The reason for the making the logical OR is to utilize the bit of information of the picture signal to be thinned out, and to suppress deterioration in the recognizing efficiency of a processing area at the minimum level. In this way, the area of the processing area at the minimum level. In this way, the area of the picture process can be specified regardless of the color of the mark.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to an image processing apparatus that can perform image processing on a designated area on a document that is different from that on other areas.

``Prior art'' When reproducing a certain area on a document, processing is performed such as erasing image information, trimming only that area, or converting the recorded color to another color. Sometimes. In order to perform such image processing, it is necessary to specify the processing area.

As a method of specifying a processing area, a method using a CRT has been commonly used. In this method, an original is read by a photoelectric conversion element such as a CCD and displayed on a CRT. Then, the user specifies a processing area on the CRT using a cursor, light pen, mouse, or the like.

In addition, there is also a method of specifying a processing area using a digitizer. In this method, first, a document is placed on a digitizer, an area is specified, and coordinates are input. Next, the original is transferred onto a platen of an image processing mechanism such as a copying machine, and desired image processing is performed on the area specified by the above-mentioned coordinates.

``Problems to be solved by the invention'' However, in the former image processing device using a CRT,
Since it is necessary to include a display device such as an RT, the price of the entire device increases. Further, since it requires the work of reading and displaying an image once and the work of specifying an area by moving a cursor or the like, there is a problem that it is complicated and lacks operability.

Furthermore, in devices using the latter digitizer, the original is placed face up on the digitizer, and placed face down on the platen in a copier or the like, so there is a risk of incorrect placement of the original. Furthermore, since the document is transferred, there is a problem in that positional errors occur as a result.

On the other hand, it has been proposed to mark the manuscript in a closed loop with a red or black writing instrument, detect this, and perform special image processing on the enclosed area (Japanese Patent Laid-Open No. 57-185767 Publication No.). However, the proposed image processing apparatus has a problem in that when the document is subsequently transmitted by facsimile or copied, image information in the marked portions is lost.

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide an image processing apparatus that can preserve image information on a document well and that can easily specify areas.

"Means for Solving the Problems" The present invention includes a mark identification means for identifying a mark made of a fluorescent material written directly on a document or on a sheet superimposed on the document, and a An area determining means for determining a predetermined area on a document as an area to be subjected to image processing based on the identified mark, and an image processing means for performing desired image processing on the area determined by the area determining means. Provided in the image processing device.

Here, the locus of the mark made of fluorescent material may form a closed loop. In this case, the region determining means determines the region indicated by this closed loop as a predetermined region to be subjected to image processing.

Marks made of fluorescent material are not limited to those forming such a closed loop. For example, it is made up of a pair of square brackets that individually specify the upper left and lower left points, and the upper right and lower right points of the quadrilateral area where this mark is located, and is used to identify areas. It is also possible for the means to determine, based on these square brackets, an area indicated by a quadrilateral as a predetermined area to be subjected to image processing.

The mark made of fluorescent material may be in a state in which a certain area on the document is filled in as long as the mark is a relatively pale color under normal illumination. In this case, the region determining means determines this filled-in region as a predetermined region to be subjected to image processing.

The mark identification means usually includes an excitation means for exciting a fluorescent material and a fluorescent material detection means for detecting the fluorescent material emitted by the excitation means. However, if the mark itself made of a fluorescent material exhibits a cyan color, for example, the mark may be detected using means for determining cyan color instead of the fluorescent material detecting means.

"Example" The present invention will be described in detail with reference to Examples below. .

"First Embodiment" FIG. 1 shows an outline of an image processing apparatus according to a first embodiment of the present invention. A scanner 2 for scanning and photoelectrically converting image information on a document (not shown) placed on the platen glass 1 is arranged below the platen glass 1 of this apparatus. The scanner 2 is configured to reciprocate in three arrow directions (sub-scanning direction) by a drive mechanism (not shown).

Two fluorescent lamps 4.5 are arranged in the scanner 2 at a position facing the platen glass 1 in a direction perpendicular to the arrow 3 direction (main scanning direction). One of the fluorescent lamps 4 is a light source for exciting the fluorescent material,
It is used to read marks made using fluorescent material on manuscripts.

The other fluorescent lamp 5 is a normal light source and is used when reading normal image information written on a document.

The reflected light from the document irradiated by the fluorescent lamp 4 or 5 is reflected by the first mirror 6 and the second mirror 7, its optical path is changed, and the light is incident on the lens 8. The light passing through the lens 8 is converged, and an optical image is formed on an image sensor 9 made of, for example, a CCD.

A serial analog image signal 11 that is photoelectrically converted and output line by line by the image sensor 9 is A/D converted by the A/D converter 12 and becomes an image with 64 levels (6 bits) of gradation expression. It is output as signal 13.

This image signal 13 exhibits non-uniform characteristics in the main scanning direction due to variations in each element constituting the image sensor 9, unevenness in illuminance of the fluorescent lamp 5, etc., so it is necessary to correct this. The shading correction circuit 14 is a circuit for this purpose.

The shading-corrected image signal 15 is binarized by a first binarization circuit 16 when detecting a mark made of a fluorescent substance, and is binarized by a second binarization circuit 16 when reading normal image information. The data is binarized by the digitization circuit 17. The image signal 18 binarized by the first binarization circuit 16 is input to the mark area detection section 19, where the processing area represented by the mark, that is, the area where special image processing is to be performed is determined. . An area discrimination signal 21 output as a detection result of the mark area detection section 19 is input to an erasure/extraction circuit 22 for performing image processing.

On the other hand, the image signal 23 binarized by the second binarization circuit 17 is temporarily stored in the line buffer 24 and is supplied to the erasure/extraction circuit 22 after being time-aligned with the area discrimination signal 21. be done. A processing content instruction signal 25 for instructing the processing content of the image is also input to the erasure/extraction circuit 22, and special image processing is performed on a desired portion of the image signal 26 as the output of the line buffer 24. will be held. The processed image signal 27 output from the erasure/extraction circuit 22 is supplied to, for example, a recording section (not shown), and an image is recorded.

FIG. 2 shows marks written on the original 30 (or on a transparent overlay superimposed on the original 30) in order to designate a processing area to the image processing apparatus of this embodiment. In this embodiment, a closed loop 31 as shown in FIG. 3 is used. Instead of specifying the area, the area is specified using the hook brackets 32 as shown in FIG. The square brackets used in this example are brackets with an open right side (hereinafter referred to as
It's called a start mark. ) 32S and brackets with an open left side (hereinafter referred to as end marks) 32E are used in pairs. In FIG. 2, two sets of these are used, thereby specifying two areas 33-1 and 33-2.

4 and 5 show the characteristics of two fluorescent lamps 4 and 5 used in this embodiment. It can be seen that the wavelength components of the emitted light are different between the fluorescent lamp 4 used to excite the phosphor and the fluorescent lamp 5 used to read the image.

For example, suppose that two types of fluorescent lamps 4.5 are used to read a manuscript portion as shown in FIG. 6, for example. Here, the characters "A, B" are image information written on the manuscript with black ink, etc., and on both sides of these are the start marks 32S.
and an end mark 32E are marked with fluorescent material. Examples of these fluorescent materials include ZnS:Mn
You can use

By the way, when reading image information, the two types of fluorescent lamps 4.5 are turned on alternately for each rask as shown in FIG. Therefore, in order to prevent the fluorescent information (start mark 32S and end mark 32E) from being mistaken for image information "ASB", it is necessary to use a fluorescent lamp 5 with a short afterglow for reading the image information. be. Furthermore, in this embodiment, a phosphor with a very low optical density is used as the fluorescent material, so that when reading image information by lighting the fluorescent lamp 5, almost no fluorescent information is read. is taken into consideration.

8 shows the analog image signal 11 when the image is read by the fluorescent lamp 5 at the position of the arrow 35 shown in FIG. 6, and FIG. 9 shows the analog image signal 11 when the image is read by the fluorescent lamp 4. This shows the analog image signal 11 when reading is performed. In FIG. 8, there is a strong change in the signal level at the point where the image information "ASB" is read. At this time, the fluorescent material absorbs almost no light, and the start mark 32S and end mark 32E are not read. On the other hand, in FIG. 9, light emission occurs at the start mark 32S and end mark 32E, and it can be seen that there is a strong change in the signal level at these parts.

First, a description will be given of how the processing area is recognized by detecting the start mark 32S and end mark 32E. These marks 32S, 32
Of course, when the detection operation E is performed, the document is irradiated with the fluorescent lamp 4.

FIG. 10 specifically shows the mark area detection section. The first binarization circuit 16 shown in FIG.
The digitized image signal 18 is supplied to a data compression circuit 37. The data compression circuit 37 thins out the image signal 18 in both the main scanning and sub-scanning directions. start mark 32
This is because it is sufficient to recognize the approximate shapes of the S and end marks 32E, and this also makes it possible to reduce the memory capacity and simplify the configuration of the mark area detection section 19. .

In the data compression circuit 37 of this embodiment, the image signal 18 inputted one bit at a time is logically summed for two bits at a time, and one bit is thinned out for every two pits in the main scanning direction and the sub-scanning direction. The reason why we decided to take the logical sum is to make use of the information of the thinned out image signal and thereby minimize the deterioration in the recognition accuracy of the processing area.

The image signal 38 output from the data compression circuit 37 is supplied to both a run length counter 39 and a horizontal line detection circuit 41. Here, the run length counter 39 measures the mark area continuous in the sub-scanning direction, that is, the start mark 32.
It is used to detect each area where the vertical line portion of the S end mark 32E exists, and to detect the non-mark area, that is, the end of the above-mentioned marks 32S and 32E. On the other hand, the horizontal line detection circuit 41 detects each continuous mark area in the main scanning direction, that is, the area where the vertical line portion of the start mark 32S1 and the end mark 32E exists. The types of the start mark 32S and the end mark 32E are determined depending on whether detection occurs first in the main scanning direction or in the sub-scanning direction.

First, the operation of the run length counter 39 will be explained. FIG. 11 specifically shows the run length counter used in this embodiment. A compressed image signal 38 is input from the data compression circuit 37 (FIG. 10) to one input terminal of the exclusive OR circuit 43 shown in the figure. This image signal 38 is a binary signal that has an H (high) level in the mark detection portion (mark area) and an L (low) level in the non-detection portion (non-mark area). The exclusive OR signal 44 output from the exclusive OR circuit 43 serves as the input for one side of the adder 45 and
- Serves as a clear input for the flip-flop circuit 46.

By the way, this D flip-flop circuit 46 is actually five similar flip-flop circuits connected in parallel, and a total of 5 bits of data D is output from its output terminal.
O to D5 are output. 1 bit of data DO
is information indicating whether the image signal of the previous line is a signal obtained by reading a mark area or a signal obtained by reading a non-mark area.

However, in this data DO, the signal that read the marked area is at L level, and the signal that read the non-marked area is at H level, and the logic thereof is inverted from that of the image signal 38.

The other 4-bit data D1 to D5 are counts of the lengths of marked areas or non-marked areas that are continuously read. Since this data D1-D5 has a 4-bit configuration, count values from 1 to 16 can be output.

Data D1 to D5 become the other input of the adder 45 described above. As a result, addition is performed with the exclusive OR signal 44, and if marked or non-marked areas are continuous, the exclusive OR signal 44 becomes H level and the contents of the data Di-D5 are Furthermore, only 1 will be added. An addition result signal 49 representing this added value is supplied to a gate circuit 53 together with an output signal 52 of a logic circuit 51. Here, the output signal 52 of the logic circuit 51 is an addition result signal 4 obtained from the data DO and the exclusive OR signal 44.
This is a signal that determines whether the addition result of 9 relates to a marked area or a non-marked area. If it is a marked area, the output signal 52 will be at L level, and if it is a non-marked area, it will be at H level.

The output signals 52 and 53 of the gate circuit 53 are sequentially written into the line memory 54. The line memory 54 stores an output signal 52 (
1 bit) and the addition result signal 49 (4 bits) are written as a total of 5 bits. The written data is sequentially read out at the main scanning position corresponding to the image signal 38, and the 5-bit data DO to D described above are read out in order.
5 and is output to the D flip-flop circuit 46.

Now, among the 5-bit data Do to D5 obtained from the run length counter 39 in this way, the data DO representing the marked area or the non-marked area becomes the manual input of the start/end mark detection circuit 56. Further, 4-bit data D1-D5 representing the length of a mark or a non-mark in the sub-scanning direction is input to a comparator 57.

The comparator 57 compares the contents of data D1 to D5 with a predetermined vertical line reference value 58, and detects an H level mark/non-mark when marks or non-marks continue for a predetermined length or more in the sub-scanning direction. A valid signal 59 is output. This is to prevent marks or non-marks from being erroneously detected due to noise. As the vertical line reference value 58, for example, a value corresponding to 12 pixels is used. The mark/non-mark detection valid signal 59 is input manually to the start/end mark detection circuit 56.

On the other hand, the horizontal line detection circuit 41 detects marks in the horizontal direction, that is, in the main scanning direction. The horizontal line detection circuit 41 is
For example, it can be configured with a shift register and an AND circuit. The shift register sequentially shifts the image signal 38, and the AND circuit performs the AND of the parallel outputs. In this way, when marks are continuous in the main scanning direction by, for example, eight pixels, this is detected as a horizontal line from which noise components have been removed.

The output signal 61 of the horizontal line detection circuit 41 is sent to the line buffer 62.
is input. The line buffer 62 delays the output signal 61 so as to match the delay of the image signal due to the processing of the run length counter 39 described above.

This will be explained using the reading area shown in FIG. 12 as an example. In this FIG. 12, the upper part of the start mark 323 is shown. The horizontal line detection circuit 41 detects the presence of a horizontal line on the line N shown in the figure, and the run length counter 39 detects the presence of a horizontal line on the line N shown in the figure.
A vertical line is detected for the first time at a line (N+11) that is a predetermined number of lines away from the line (N+11). Since the start/end mark detection circuit 56 can detect marks in conjunction with the vertical line detection results, it is necessary to delay the output signal until this time.

The output of the line buffer 62 is logically summed by an OR circuit 63, and then input as a logical sum output signal 64 to another run length counter 65 to count the number of pixels that continue in the main scanning direction. The OR circuit 63 is used to absorb an error of several lines when detecting vertical lines and horizontal lines.

FIG. 13 shows the wiring state of a run length counter for counting pixels in the main scanning direction. An OR output signal 64 is input to the enable terminal E and the clear terminal CL of the run length counter 65.

In addition, the clock signal input terminal CK has an OR output signal 6.
A clock signal 66 is manually inputted in synchronization with the manual input of step 4. Therefore, if the OR output signal 64 is at H level after mark detection, the run length counter 65
counts the number of consecutive pixels and outputs it as a 4-bit horizontal line count value signal 67. The horizontal line count value signal 67 is
In addition to being supplied as is to the start/end mark detection circuit 56, it is also supplied to a comparator 68 and compared with a predetermined horizontal line reference value 69. As the horizontal line reference value 58, a value corresponding to 166 pixels is used, for example. Comparator 6
The comparison result 71 of No. 8 is supplied to the start/end mark detection circuit 56.

FIG. 14 shows a concrete example of the start/end mark detection circuit. The above four types of signals DO159,6
7 and 71 are RO of the start/end mark detection circuit 56
It is supplied to M (read-only memory) 73 as address information. This ROM73 is the start mark 3
This is an element that discriminates between 2S and end mark 32E.
The determination result is output from the start mark determination output terminal S and the end mark output terminal E in units of pixels. These discrimination result signals 75S and 75E are supplied to a line memory 77 via a gate circuit 76 and stored as data for one line.

The discrimination result signals 753' and 75E' of the previous line read from the line memory 77 are supplied to the D flip-flop circuit 79 via the gate circuit 76. This D
- The output of the flip-flop circuit 79 and the determination result signal 758175E for the pixel one pixel before the pixel to be determined are both fed back to the ROM 73 as address information. That is, the ROM 73 stores these signals DO159, 67, 71, 75S, 75E, 7
5S' and 75E' are used as address information to determine whether a mark exists on the document, and if a mark exists, whether it is a start mark 32S or an end mark 32E. Become.

Here, the start mark 323 and the end mark 32E are determined by identifying whether the vertical line is on the left or right side at a point that has proceeded a certain distance in the main scanning direction from the starting position of the horizontal line in the main scanning direction. be able to.

By the way, FIG. 15a shows a case where two or more sets of start mark 32S and end mark 32E exist at the same sub-scanning position. In such a case, for example, when the horizontal line portion 81 of the first start mark 323 is detected, the horizontal line portion 82 of the first end mark 32E paired therewith will also be detected. In other words, the pixel where the start mark 32S is detected is S, and the end mark 32
Let E be the pixel where E is detected. As shown in the figure, the pixels change in pairs such as (S, E)... (S, E), and from pixel S to the next Each pixel up to pixel E specifies an area for image processing.

However, the start mark 32S is also the end mark 32E.
Usually, the start mark 3 is handwritten on the manuscript, so in reality, as shown in Figure 16a, a set of start marks 3
25 and the horizontal line portion of the end mark 32E often do not match.

In such a case, as shown in the example of FIG. 16, when the horizontal line portion 81 of the first start mark 32S is detected, the horizontal line portion 82 of the paired end mark 32E is not detected. A situation occurs in which the horizontal line portion 83 of the next pair of start marks 323 is detected. In this example, as shown in the figure, after the first set of pixels S is determined, the pixel E is detected in the second set of processing areas, and each processing area is specified. This causes the inconvenience of not being able to do so.

Start/end mark detection circuit 56 shown in FIG.
is provided with a circuit to prevent the above-described inconvenience from occurring. Of these, the flip-flop circuit 85 inputs the 1' discrimination result signal 753 for the start mark 32S to its reset terminal R, and also inputs the discrimination result signal 75E for the end mark 32E to its reset terminal S. Therefore, an H level output signal 86 appears from the output terminal Q of the flip-flop circuit 85 when a pair of pixels S and E is present. That is, when marks are detected in the order of start mark 32S and end mark 32E as shown in FIG. 15, the output signal becomes H level at the stage of detection of the next start mark 323. On the other hand, the 16th
As shown in the figure, when the start mark 32S is continuously detected without detecting the end mark 32E, the output signal 86 remains at the L level.

Output signal 86 is provided to shift register 87. A determination result signal 75S is supplied to the clock input terminal CK of the shift register 87. Therefore, each time the start mark 32S is detected, the output signal 86 becomes 1.
The bits are input to the shift register 87 bit by bit. The counter 88 receives the 1 input to the shift register 87.
Count the number of bits of the output signal per line.

Once the output signal 86 is set in the shift register 87 for one line as described above, at this point the line memory 7
7, one line worth of discrimination result signals 75S and 75E are also set. When these signals set in the line memory 77 are read out, in synchronization with this, the multiplexer 89 outputs a start mark discrimination result signal 91 indicating whether the start mark 32S is valid or invalid.

That is, the first start mark 32 shown in FIG.
S is invalidated until the end mark 32E paired with it is detected on the same rask, and during this time, the start mark discrimination result signal 91 maintains the L level state. On the other hand, when the start mark 32S and end mark 32E are detected as a pair, the start mark discrimination result signal 91 becomes H level.

The start mark discrimination result signal 91 becomes one input of the two-manpower AND circuit 92, and the one-line delayed discrimination result signal 753' read from the line memory 77 becomes the other human power. Therefore, the determination result signal 7 regarding the start mark 32S with which the end mark 32F is not paired.
6S' is blocked from passing by the AND circuit 92.

The determination result signal 758' output from the AND circuit 92 is supplied to the flip-flop circuit 93 together with another determination result signal 75E'. As a result, the output terminal Q of the flip-flop circuit 93 outputs the region discrimination signal 21 which becomes H level for the region surrounded by the start mark 323 and the end mark 32E.

Area discrimination signal 2 indicating the inside and outside of the area where predetermined image processing is performed
1 is supplied to the line memory 96 as a 1-bit signal and stored therein, as shown in FIG. This stored area discrimination signal 21 is read out at a predetermined timing and is manually input to the erasure/extraction circuit 22 shown in FIG.

In the first embodiment described above, the start mark and end mark are marked with a fluorescent material, so there is no risk of deteriorating the image information on the document even if the marks are placed directly on the document. Furthermore, since the start mark and the like are configured with hook brackets, it is possible to easily set a rectangular processing area without using a ruler or the like.

Of course, the area for image processing can be set using means other than square brackets.

For example, it is also possible to draw a closed-loop mark on the boundary between the processing area and the non-processing area, to recognize this mark, and to perform different image processing inside and outside the mark. Further, in the embodiment, the mark is directly placed on the document, but it is also possible to prepare a transparent overlay and write the mark on it.

"Second Embodiment" FIG. 17 shows an outline of an image processing apparatus according to a second embodiment of the present invention. A scanner 102 for scanning and photoelectrically converting image information on a document (not shown) placed on the platen glass 101 is arranged below the platen glass 101 of this apparatus. The scanner 102 is configured to reciprocate in the direction of an arrow 103 (sub-scanning direction) by a drive mechanism (not shown).

Two fluorescent lamps 104 and 105 are arranged in the scanner 102 at positions facing the platen glass 101 in a direction perpendicular to the arrow 103 direction (main scanning direction). One of the fluorescent lamps 104 is filled with a red phosphor with a long afterglow, and the other fluorescent lamp 105 is filled with a blue phosphor with a short afterglow.

In this second embodiment, a mark is written on the document using a fluorescent material exhibiting a cyan color, and the mark is identified using these two types of fluorescent lamps 104 and 105, and the area to be image processed is determined. It specifies the By marking in cyan in this manner, not only does the mark itself not become an obstruction, but there is also no risk that the area will be mistakenly recognized due to red underlining or the like. Of course, as long as the cyan color does not contain fluorescent material, it can also be used as a mark for area discrimination.

Now, the two types of fluorescent lamps 104 and 105 are both turned on and off at high speed. As a result, when the switch is on, the original is illuminated with light that is an additive mixture of red and blue, and when it is off, the original is illuminated with red light.

With the emission spectral characteristics being alternately changed in this manner, the scanner 102 performs sub-scanning, and the image of the same line is read twice with different characteristics.

The reflected light from the document illuminated by the fluorescent lamps 104 and 105 is reflected by the first mirror 106 and the second mirror 1.
07, the optical path is changed, and the lens 1
It is incident on 08. The light passing through the lens 108 is converged, and an optical image is formed on an image sensor 109 made of, for example, a CCD.

A serial analog image signal 111 that is photoelectrically converted and output line by line by the image sensor 109 is an A/
A/D conversion is performed by the D converter 112, and 64 steps (6
The image signal 113 is output as an image signal 113 that has been expressed in gradation (bits). This image signal 113 is caused by variations in each element constituting the image sensor 109 and the fluorescent lamps 104 and 10.
Since the characteristic exhibits non-uniformity in the main scanning direction due to the unevenness of illuminance etc. in No. 5, it is necessary to correct this. The shading correction circuit 114 is a circuit for this purpose.

The shading-corrected image signal 115 is supplied to a line buffer 116 and a color separation circuit 117. The line buffer 116 is a type of delay circuit that temporarily stores the image signal obtained by the first reading when reading the same line twice. line buffer 11
The output l'18 of 6 is the image signal 11 from the second reading.
5 and is supplied to the color separation circuit 117.

A recording color selection signal 119 is supplied to the color separation circuit 117 from an operation panel (not shown). This recording color selection signal 1
19 has (i) a two-color recording mode in which the image information on the document is read as three colors, white, black, and red, and recorded in two colors, red and black, and (ii) a two-color recording mode in which cyan color is separated from the image information. This signal is used to designate an area, and is used to selectively select a one-color recording mode in which recording is performed in one color.

When the two-color recording mode is selected by the recording color selection signal 119, the image signal 120- separated by the color separation circuit 117 is
1 is immediately supplied to a recording section (not shown), and in this embodiment, recording is performed in two colors, red and black. As the recording section, a thermal transfer printer equipped with two-color ink donor films (thermal transfer recording media), red and black, is suitable.

On the other hand, when the one-color recording mode is designated by the recording color selection signal 119, the image processing for this portion can be different, provided that the document is marked in cyan color. At this time, the color separation circuit 117 separates the cyan color from other colors and supplies the former image signal 121 to the mark area detection section 122. The mark area detection unit 122 detects the marking area and supplies an area discrimination signal 123 as a detection result to the color conversion/erasure/extraction circuit 124.

Further, the image signal 120-2 for a color other than cyan, that is, a color read as an image, is sent to the line buffer 120-2.
25, is read out in time alignment with the area discrimination signal 123, and is color-converted and read out as an image signal 126.
It is supplied to the erasure/extraction circuit 124. A processing content instruction signal 127 for instructing image processing content is also input to the color conversion/erasure/extraction circuit 124, and special image processing is performed on a desired portion of the image signal 126. become. The processed image signal 128 output from the color conversion/erasure/extraction circuit 124 is supplied to the above-described recording section and recorded.

At this time, if the processing content instruction signal 127 instructs color conversion, for example, the processing area specified by the mark is recorded in red, and the other areas are recorded in black. Furthermore, if the processing content instruction signal 127 instructs deletion, the image in the processing area or non-processing area is erased, and if the extraction instruction is issued, the image information of the processing area is extracted. Necessary information processing such as movement and registration of processed images will be performed on the extracted image information according to other instructions.

FIG. 18 shows marks written on the original 130 (or on a transparent overlay superimposed on the original 130) in order to designate a processing area to the image processing apparatus of this embodiment. In this embodiment, the area is specified using the square brackets 132. The hook brackets used in this example are brackets (start mark) 132S with an open right side,
Two types of hook brackets are used in pairs, the left side open bracket (end mark) 132E. In FIG. 18, two sets of these are used, resulting in two areas 133 as shown in FIG.
-1.1a3-:2 will be specified.

FIG. 20 specifically shows the mark area detection section. An image signal 121 output from the color separation circuit 117 shown in FIG. 17 is supplied to a data compression circuit 137.

The data compression circuit 137 thins out the image signal 121 in both the main scanning and sub-scanning directions. Start mark 132 shown in cyan S Oyohi end mark 132E
This is because it is sufficient to recognize its general shape. Furthermore, this allows the memory capacity to be reduced, and the configuration of the mark area detection section 122 to be simplified.

In the data compression circuit 137 of this embodiment, the image signal 121 inputted one bit at a time is logically summed for two bits at a time, and thinned out by one bit out of every two bits in the main scanning direction and the sub-scanning direction. The reason why we decided to take the logical sum is to make use of the information of the thinned out image signal and thereby minimize the deterioration in the recognition accuracy of the processing area.

The image signal 138 output from the data compression circuit 137 is
It is supplied to both the run length counter 139 and the horizontal line detection circuit 141. Here, the run length counter 139
is for detecting continuous mark areas in the sub-scanning direction, that is, areas where vertical line portions of the start mark 132S and end mark 132E exist, respectively, and for detecting non-mark areas, that is, the end of the above-mentioned marks 1325 and 132E. used for. On the other hand, the horizontal line detection circuit 1
41 is a mark area continuous in the main scanning direction, that is, a start mark 1323. Each region in which the vertical line portion of the end mark 132E exists is detected. The types of the start mark 132S and the end mark 132E are determined depending on whether detection occurs first in the main scanning direction or in the sub-scanning direction.

First, the operation of the run length counter 139 will be explained. FIG. 21 specifically shows the run length counter used in this embodiment. One input terminal of the exclusive OR circuit 143 shown in the same figure receives a compressed image signal 1 from the data compression circuit 137 (FIG. 20).
38 will be done manually. This image signal 138 is a binary signal that has an H (high) level in the mark detection portion (mark area) and an L (low) level in the non-detection portion (non-mark area). The exclusive OR signal 144 outputted from the exclusive OR circuit 143 serves as one input of the adder 145 and also serves as a clear input for the D flip-flop circuit 146.

Incidentally, this D flip-flop circuit 146 is actually five similar flip-flop circuits connected in parallel, and a total of five bits of data DO to D5 are output from its output terminal.

Of these, 1-bit data DO is information representing whether the first stroke number of the previous line is a signal that has read a marked area or a signal that has read a non-marked area. However, this data DO
In this case, the signal that read the mark area is at L level,
The signal read from the non-marked area is at H level, and its logic is inverted from that of the image signal 138.

The other 4-bit data D1 to D5 are counts of the lengths of marked areas or non-marked areas that are continuously read. Since this data D1-D5 has a 4-bit configuration, count values from 1 to 16 can be output.

Data D1 to D5 become the other input of the adder 145 described above. As a result, addition is performed with the exclusive OR signal 144, and if marked or non-marked areas are continuous, the exclusive OR signal 144 becomes H level, and the contents of data D1 to D5 are Furthermore, only 1 will be added. An addition result signal 149 representing this addition value is supplied to a gate circuit 153 together with an output signal 152 of a logic circuit 151. Here, the output signal 152 of the logic circuit 151 is the data DO and the exclusive OR signal 144.
This is a signal that determines whether the addition result of the addition result signal 149 is related to a marked area or a non-marked area. If it is a mark area, output signal 15
2 becomes L level, and if it is a non-marked area, it becomes H level.

Output signals 52 and 53 of the gate circuit 153 are sequentially written into the line memory 154. The line memory 154 is
Output signal 152 (1 bit) and addition result signal 149 (4 bits) for each line of image signal after compression
This is a memory element in which data is written as a total of 5-bit signals. The written data is sequentially read out at the main scanning position corresponding to the image signal 138, and is sent to the D flip-flop circuit 146 as the 5-bit data DO to D5.
will be output to .

Of the 5-bit data DO to D5 asked by the run length counter 139 in this way, the data DO representing the mark area or non-mark area becomes an input to the start/end mark detection circuit 156. In addition, the 4-bit, horizontal f-t DI to D5 representing the length of marks or non-marks in the sub-scanning direction is input to the comparator 15.
7 is input. The comparator 157 outputs data D1 to
The contents of D5 are compared with a predetermined vertical line reference value 158, and when marks or non-marks continue for a predetermined length or more in the sub-scanning direction, an H level mark/non-mark detection valid signal 159 is output. This is to prevent marks or non-marks from being erroneously detected due to noise. As the vertical line reference value 158, for example, a value corresponding to 12 pixels is used. The mark/non-mark detection valid signal 159 is input to the start/end mark detection circuit 156.

On the other hand, the horizontal line detection circuit 141 detects marks in the horizontal direction, that is, in the main scanning direction. Horizontal line detection circuit 141
can be configured by, for example, a shift register and an AND circuit. The shift register sequentially shifts the image signal 138, and the AND circuit performs the AND of the parallel outputs. In this way, when marks are continuous in the main scanning direction by, for example, eight pixels, this is detected as a horizontal line from which noise components have been removed.

The output signal 61 of the horizontal line detection circuit 141 is sent to the line buffer 1.
62. The line buffer 162 delays the output signal 161 so as to match the delay of the image signal due to the processing of the run length counter 139 described above.

This will be explained using the reading area shown in FIG. 22 as an example. FIG. 22 shows the upper part of the start mark 132S. The horizontal line detection circuit 141 detects the presence of a horizontal line at line N shown in the figure, and the run length counter 139 detects the presence of a horizontal line at line N (N+
11> Detects vertical lines for the first time. Since the start/end mark detection circuit 156 can detect marks in conjunction with the vertical line detection results, it is necessary to delay the output signal until this time.

The output of the line buffer 162 is logically summed by an OR circuit 163, and then input as a logical sum output signal 164 to another run length counter 165 to count the number of pixels that continue in the main scanning direction. The OR circuit 63 operates when an error of several lines occurs in the detection of vertical lines and horizontal lines.
It is used to absorb this.

FIG. 23 shows the wiring state of a run length counter for counting pixels in the main scanning direction. An OR output signal 164 is input to the enable terminal E and the clear terminal CL of the run length counter 165. Further, a clock signal 166 is input to the clock signal input terminal CK in synchronization with the input of the OR output signal 164.

Therefore, if the OR output signal 164 is at H level after detecting a mark, the run length counter 165 counts the number of consecutive pixels and outputs it as a 4-bit horizontal line count value signal 167. .

The horizontal line count value signal 167 is supplied as is to the start/end mark detection circuit 156, and also to the comparator 16.
8 and is compared with a predetermined horizontal line reference value 169. For example, a value corresponding to 16 pixels is used as the horizontal line reference value 169.

A comparison result 171 of the comparator 168 is supplied to the start/end mark detection circuit 156.

FIG. 24 shows a concrete example of the start/end mark detection circuit. The above four types of signals DO159,6
7 and 71 are R of the start/end mark detection circuit 156
It is supplied to the OM (Read Only Memo IJ) 173 as address information.

This ROM 173 is an element that discriminates between the start mark 132S and the end mark 132E, and outputs the discrimination result from the start mark discrimination output terminal S and the end mark output terminal E in units of pixels.

These discrimination result signals 1753S to 175E are supplied to the line memory 177 via the gate circuit 176 and are stored as data for one line.

The discrimination result signals 175S' and 175E' of the previous line read from the line memory 177 are sent to the gate circuit 17.
6 to the D flip-flop circuit 179. The output of this D flip-flop circuit 179 and the discrimination result signal 1755.175E for the pixel one pixel before the pixel to be discriminated are both stored in the ROM 17.
3 as address information. That is, ROM l 73 receives these signals DO1159,1
67,171,175S, 175E, 1755', 17
Using 5E' as address information, it is determined whether a mark exists on the document, and if a mark exists, whether it is a start mark 132S or an end mark 132E. Here, the start mark 1325 and the end mark 132E are
This can be determined by identifying whether the vertical line is on the left or right side at a point that has proceeded a certain distance in the main scanning direction from the start position of the horizontal line in the main scanning direction.

By the way, FIG. 25a shows a case where two or more sets of start marks 132S and end marks 132E drawn in cyan on a document or an overlay exist at the same sub-scanning position. In such a case, for example, when the horizontal line portion 181 of the first start mark 132S is detected, the first end mark 132 paired with it is detected.
A horizontal line portion 182 of E will also be detected. In other words,
Assuming that the pixel where the start mark 132S is detected is S and the pixel where the end mark 132E is detected is E, the pixels are arranged in pairs such as (SSE)... (S, E) as shown in the figure. The following changes are made, and the image processing area is specified for each pixel S to the next pixel E.

However, the start mark 132S is also the end mark 13.
21': is also usually handwritten on the document, so in reality, as shown in FIG. 26a, the sub-scanning positions of the horizontal line portions of the paired start mark 132S and end mark 132E do not match. There are many. In such a case, as shown in the example of FIG. 26, when the horizontal line portion 181 of the first start mark 1323 is detected, the horizontal line portion 182 of the paired end mark 132E is not detected. Horizontal line part 1 of the next pair of start marks 132s
A situation occurs where 83 is detected.

In this example, as shown in the figure, the first set of pixels S
After the pixel E is determined, the pixel E is detected in the second set of processing areas, causing the inconvenience that each processing area is not specified.

Start/end mark detection circuit 15 shown in FIG.
6 is provided with a circuit for preventing the above-described inconvenience from occurring. Of these, flip-flop circuit 18
5, the determination result signal 175s for the start mark 132S is input to its reset terminal R, and the determination result signal 175E for the end mark 132E is input to its reset terminal S. Therefore, an output signal 186 at an H level appears from the output terminal Q of the flip-flop circuit 185 when a pair of the pixel S and the pixel E exists. That is, when marks are detected in the order of start mark 1325 and end mark 132E as shown in FIG. 25, the output signal becomes H level at the stage of detection of the next start mark 132s. On the other hand, as shown in FIG.
If the start mark 132S is continuously detected without detection of 2E, the output signal 186 remains at the L level.

Output signal 186 is provided to shift register 187.

A determination result signal 175S is supplied to a clock input terminal CK of the shift register 187. Therefore, each time the start mark 132S is detected, the output signal 186 is input one bit at a time to the shift register 187. Counter 188 is shift register 1
87! :: Counts the number of bits of the output signal per input line.

When the output signal 186 is set in the shift register 187 for one line as described above, at this point, the discrimination result signals 175S and 17 for one line are also stored in the line memory 177.
5E will be set. When these signals set in the line memory 177 are read out, the multiplexer 189 synchronizes with this to read out the start mark 132.
A start mark discrimination result signal 191 indicating whether S is enabled or disabled is output. That is, the first start mark 132S shown in FIG. 26 is invalidated until the paired end mark 132E is detected on the same rask, and during this time, the start mark discrimination result signal 191 is at L level. Retain state. On the other hand, when the start mark 132S and the end mark 132E are detected as a pair, the start mark discrimination result signal 191 becomes H level.

The start mark discrimination result signal 191 becomes one input of the two-manual AND circuit 192, and the discrimination result signal 175S' delayed by one line read from the line memory 177 becomes the other input. Therefore, the determination result signal 176S' regarding the start mark 132s with which the end mark 132E is not paired is prevented from passing by the AND circuit 192.

Discrimination result signal 1755 output from AND circuit 192
' is supplied to the flip-flop circuit 193 along with another determination result signal 175E'. As a result, the start mark 1 is output from the output terminal Q of the flip-flop circuit 193.
The area determination signal 123 at H level is output for the area surrounded by the end mark 132S and the end mark 132E.

Area discrimination signal 1 indicating the inside and outside of the area where predetermined image processing is performed
23 are each supplied as one-bit signals to the line memory 196 and stored therein, as shown in FIG. This stored area discrimination signal 123 is read out at a predetermined timing, and is read out at a predetermined timing and is read out from the color conversion/erasure/extraction circuit 1 shown in FIG.
24 will be input.

In the second embodiment described above, since a cyan fluorescent material is used, the area can be determined even for marks that do not contain a fluorescent material. Furthermore, since the start mark and the like are configured with hook brackets, it is possible to easily set a rectangular processing area without using a ruler or the like.

Of course, setting the area for image processing can also be done by means other than square brackets.

For example, it is also possible to draw a closed-loop mark on the boundary between the processing area and the non-processing area, to recognize this mark, and to perform different image processing inside and outside the mark.

"Third Embodiment" FIG. 27 shows an outline of an image processing apparatus according to a third embodiment of the present invention. A scanner 202 for scanning and photoelectrically converting image information on a document (not shown) placed on the platen glass 201 is arranged below the platen glass 201 of this apparatus. The scanner 202 is configured to reciprocate in the direction of an arrow 203 (sub-scanning direction) by a drive mechanism (not shown).

Two fluorescent lamps 204 and 205 are arranged in the scanner 202 at positions facing the platen glass 201 in a direction perpendicular to the direction of the arrow 203 (main scanning direction). One of the fluorescent lamps 204 is filled with a red phosphor with a long afterglow, and the other fluorescent lamp 105 is filled with a blue phosphor with a short afterglow.

In this third embodiment, a mark exhibiting cyan color is written on the document, and this mark is placed between the two types of fluorescent lamps 204.
．． 205 to identify the area to be subjected to image processing. When marking in cyan like this,
Not only does the mark itself not get in the way, but there is no risk that the area will be mistakenly recognized due to red underlining or the like. Of course, as long as the cyan color does not contain a fluorescent material, it can also be used as a mark for area discrimination.

Now, the two types of fluorescent lamps 204 and 205 are both turned on and off at high speed. As a result, when the switch is on, the original is illuminated with light that is an additive mixture of red and blue, and when it is off, the original is illuminated with red light.

With the emission spectral characteristics being alternately changed in this way, the scanner 202 performs sub-scanning, and the image of the same line is read twice with different characteristics.

The reflected light from the document illuminated by the fluorescent lamps 204 and 205 is reflected by the first mirror 206 and the second mirror 2.
07, the optical path is changed, and the optical path is changed to the lens 2.
It is incident on 08. The light passing through the lens 208 is converged, and an optical image is formed on an image sensor 209 made of, for example, a CCD.

The serial analog image signal 211 photoelectrically converted and output line by line by the image sensor 209 is converted into an A/
A/D conversion is performed by the D converter 212, and 64 steps (6
The image signal 213 is output as an image signal 213 that has been expressed in gradation (bits). This image signal 213 is generated due to variations in each element constituting the image sensor 209 and the fluorescent lamps 204 and 20.
Since the characteristic exhibits non-uniformity in the main scanning direction due to the unevenness of illuminance etc. in No. 5, it is necessary to correct this. The shading correction circuit 214 is a circuit for this purpose.

The shading-corrected image signal 215 is supplied to a line memory 216 and a color separation circuit 217. When the line memory 216 reads the same line twice,
This is a type of delay circuit that temporarily stores the image signal obtained from the first reading. The output 218 of the line memory 216 is supplied to the color separation circuit 217 in synchronization with the image signal 215 obtained by the second reading.

The color separation circuit 218 separates cyan color from the image information. For example, assume that there is a line graph as shown in FIG.
Assume that you want to record in a color different from 22. In this case, in the third embodiment of the present invention, an area 213 including the polygonal line 221 to be specified is filled with a writing instrument made of a cyan fluorescent material. As a result, for example, when other polygonal lines 222 are recorded in black, the specific polygonal line 221 is recorded in red, making it possible to emphasize a specific portion of the graph.

The color separation circuit 217 separates cyan from other colors,
A mark discrimination signal 225 as the former signal is supplied to a noise removal circuit 226. The noise removal circuit 226 removes spatially isolated signals from the mark discrimination signal portion determined to be a cyan mark as noise. This is because, unlike the first and second embodiments, in this embodiment, predetermined image processing is directly performed on the portion specified as cyan.

FIG. 29 shows a specific example of the noise removal circuit. The noise removal circuit 226 includes a D flip-flop circuit 227A that stores the mark discrimination signal 225 for one pixel. The mark discrimination signal stored in the D flip-flop circuit 227A is supplied to the D flip-flop circuit 227B at the timing when the next pixel is input, and is also supplied to the first line memory 228, where 1
Delayed by one line. The mark discrimination signal read from the first line memory 228 is sequentially shifted one pixel by three D flip-flop circuits 227C to 227E, and the output of the D flip-flop circuit 227C is supplied to the second line memory 229. and is further delayed by l lives. The mark discrimination signal read from the second line memory 229 is shifted pixel by pixel by two D flip-flop circuits 227F and 227G.

A ROM (read only memory) 231 includes these D flip-flop circuits 227A to 227G and line memories 228 and 229.
Input the pixel group information for three lines obtained by .

Then, using these as address information, the presence or absence of noise is determined. If noise is present, cyan color detection is invalidated. The mark discrimination signal 232 after noise removal obtained from the noise removal circuit 226 is sent to the area discrimination circuit 233.
supplied to

The area discrimination circuit 233 is a circuit that correctly discriminates the area painted in cyan regardless of its apparent color. The reason for the existence of this circuit will be explained using FIGS. 30 and 31. FIG. 30 shows a pattern of English letters "A-U" drawn on a manuscript. this house,
If special image processing is to be performed on the English character patterns "■-L", markings will be performed on areas including these as shown in the figure.

FIG. 31 shows the pattern of the English letter I and its vicinity. In the figure, pattern 235 is a pattern of the English letter I drawn in black. Marking 236 is performed on this pattern 235 and its surroundings. However, the mark painted on the pattern 235 is black, and the color separation circuit 217 cannot detect the cyan color.

That is, if image processing is performed using the mark discrimination signal 232 obtained from the noise removal circuit 226 as is, it becomes impossible to perform processing such as color conversion on the important image information portion. Therefore, in the area discrimination circuit 233, the pattern 235
The processing area is made to match the actual requirements, assuming that the cyan color also exists in such parts.

FIG. 32 shows an example of the area determination circuit 233. The area discrimination circuit 233 includes an OR circuit 238, a D flip-flop circuit 239 inputting the output thereof, and an AND operation that takes the AND of the area discrimination signal 241 and the image signal 242 output from the D flip-flop circuit 239. It is configured by a circuit 243. Here, the image signal 242 is an image signal (
This is a signal obtained by temporarily storing image information (other than cyan color) 245 in the line memory 246 and adjusting the timing.

This image signal 242 is a binary signal that is at H level in the black image information portion, and is the output signal 24 of the AND circuit 243.
8 is designed to be ORed by the mark discrimination signal 232 and the OR circuit 238.

That is, when the cyan marking 236 is detected before the pattern 235 is detected, the D flip-flop circuit 239 is set and the area discrimination signal 241 becomes H level. While the cyan markings 236 are present,
The area determination signal 241 maintains the H level. When the pattern 235 adjacent to cyan is read, the output signal 248 of the AND circuit changes to H level. As a result, the area determination signal 241 maintains the H level even in the reading area of the pattern 235.

The area discrimination signal 241 thus obtained and the image signal 249 read out from the line memory 246 are input to a color conversion/erasure/extraction circuit 251. Color conversion/erasing/
An image processing instruction signal 252 is supplied to the extraction circuit 251 from a CPU (central processing unit), also not shown, in response to an instruction from an operation panel, not shown.

Depending on the content of this image processing instruction signal 252, the image information of the area designated in cyan color is converted, erased, or extracted. The image signal 253 output from the color conversion/erasure/extraction circuit 251 is supplied to a two-color printer (not shown), and an image is recorded.

In this third embodiment, desired image processing is performed on the cyan region, but specific image processing may be performed on the region coated with fluorescent light. In this case, a fluorescent lamp having the wavelength characteristics used in the first embodiment may be used (see FIGS. 4 and 5). In this case, the color separation circuit 217 shown in FIG. 27 is not required, and instead, a binarization circuit is required. In this modification, since fluorescence is detected, the area discrimination circuit as described in FIG. 32 is not required.

In the third embodiment described above and its modified examples, since the processing area is filled with marks, even complex shapes can be easily identified.

"Effects of the Invention" As described above, according to the present invention, since the area is specified using a fluorescent material, the area for image processing can be specified regardless of the color of the mark.

[Brief explanation of drawings]

1 to 16 are for explaining the first embodiment of the present invention, of which FIG. 1 is a schematic configuration diagram of an image processing device, and FIG. 2 is a plane view of a document with marks. Figure 3 is a plan view showing conventional closed loop marking;
The figure shows the characteristics of the fluorescent lamp used to excite the phosphor, Figure 5 shows the characteristics of the fluorescent lamp used to read the image information, and Figure 6 shows how a part of the manuscript is read. Figure 7 is a timing diagram showing the lighting timing of two types of fluorescent lamps, Figure 8 is a waveform diagram of an analog image signal when using a normal light source, and Figure 9 is a diagram showing the lighting timing of two types of fluorescent lamps. Waveform diagram of analog image signal when using a light source, No. 10
Figure 11 is a block diagram of the mark area detection section, Figure 11 is a block diagram of the run length counter, Figure 12 is an enlarged plan view showing part of the reading area, Figure 13 is a wiring diagram of another run length counter, and Figure 13 is a block diagram of the run length counter. Fig. 14 is a block diagram of the start/end mark detection circuit, Fig. 15 is an explanatory diagram showing the reading state when the mark is accurately written in the main scanning direction, and Fig. 16 is an explanatory diagram showing the reading state when the mark is written with a deviation in the sub-scanning direction. 17 to 26 are for explaining the second embodiment of the present invention.
Figure 7 is a schematic configuration diagram of the image processing device, Figure 18 is a plan view of a document with a mark, Figure 19 is a plan view showing the processing area on the document specified by the mark, and Figure 20 is a diagram of the mark. FIG. 21 is a block diagram of the area detection section, FIG. 21 is a block diagram of the run length counter, FIG. 22 is an enlarged plan view showing a part of the reading area, FIG. 23 is a wiring diagram of another run length counter, and FIG. 24 is a block diagram of the run length counter. A block diagram of the start/end mark detection circuit, FIG. 25 is an explanatory diagram showing the reading state when the mark is accurately written in the main scanning direction, and FIG. 26 is a block diagram of the start/end mark detection circuit.
The figure is an explanatory diagram showing the reading state when the mark is written with a shift in the sub-scanning direction, and FIGS. 27 to 32 are for explaining the third embodiment of the present invention. The figure is a schematic configuration diagram of the image processing device, and FIG. 28 is an explanatory diagram showing the state of marking in the image processing device of this embodiment.
Fig. 29 is a block diagram of the noise removal circuit, Fig. 30 is a plan view showing image information on a document and its marking status, Fig. 31 is a partially enlarged view of the part shown in Fig. 30, and Fig. 32 is a circuit diagram of an area discrimination circuit. 4.5.104.105.204.205...
Fluorescent lamp, 9.109.209... Image sensor, 19
．． 122... mark area detection section, 22...
... Erasing/extracting circuit, 27.128.253... Image signal, 30.13
0...Manuscript, 323.132S...Start mark, 32E
, 132E... End mark, 33...
・Area (designated area), 117.217... Color separation circuit, 124.25
1...Color conversion/erasure/extraction circuit, 233...
... area discrimination circuit, 235 ... pattern, 236 ... marking. Applicant: Fuji Xerox Co., Ltd. Agent

Claims (1)

[Claims] 1. A mark identification means for identifying a mark made of a fluorescent material written on a document or a sheet superimposed on the document, and a mark identified by the mark identification means on the document. An image characterized by comprising an area discriminating means for discriminating a predetermined area as an area to be subjected to image processing, and an image processing means for performing desired image processing on the area discriminated by the area discriminating means. Processing equipment. 2. A patent claim characterized in that the locus drawn by the mark made of fluorescent material forms a closed loop, and the area determining means determines the area indicated by this closed loop as a predetermined area to be subjected to image processing. The image processing device according to item 1. 3. It is composed of two types of pairs of brackets that individually designate the upper left and lower left points, and the upper right and lower right points of the quadrilateral area where the mark made of fluorescent material is located. The image processing according to claim 1, wherein the area determining means determines the area indicated by the quadrilateral as a predetermined area to be subjected to image processing based on these square brackets. Device. 4. A mark made of a fluorescent material fills out a certain area on the document, and the area determining means determines the filled out area as a predetermined area to be subjected to image processing. The image processing device according to scope 1. 5. The mark identification means includes excitation means for exciting a fluorescent substance, and fluorescent material detection means for detecting the fluorescent material emitted by the excitation means, as set forth in claim 1. image processing device. 6. The image processing device according to claim 1, wherein the mark made of a fluorescent material exhibits a cyan color, and the mark identifying means detects the presence of the mark by determining the cyan color.