JPS62208714A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the waveform distortion of a high speed digital signal and the propagation delay time by outputting a signal inputted to a package as it is through a distribution line having a constant characteristic impedance in the package in a semiconductor device comprising plural digital ICs requiring the high speed operation. CONSTITUTION:Two systems are used by using forward/return paths of I/O pins, wirings in the package and bonding wires or the like from a branch point existing as an open stub in connecting high speed ECL elements on a board without fail conventionally. For example, an input signal is subject to feed- through in the packages 12a, 12b while keeping the characteristic impedance Zo constant and the signal is outputted as it is. The outputted signal is inputted again to a next multi-chip package. The signal propagation delay time between the packages connected in cascade is not so much different from a general mounting form where no signal is transmitted in the packages. However, the waveform distortion is less by the length of the open stub decreased extremely and the delay time of the signal is decreased after all.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor device, and particularly to a semiconductor device composed of a plurality of digital ICs that are required to operate at high speed.

[Technical background of the invention and its problems]

E CL (Emitter Coupled Log
ic) To build a circuit board that can mount high-speed logic elements such as devices and transmit pulse signals with short rise times without distortion, a special wiring method is used, unlike ordinary logic ICs. Figure 3 is an example of this, with wiring 0 on the circuit board.
1) can be done with constant impedance wiring such as microstrip lines and strip lines, and each element (
321) and (32b) are connected. The terminating resistor is arranged to reduce the reflected wave at the end of the wiring, and no reflected wave occurs when the value is the same as the characteristic impedance ZO of the wiring. However, because this characteristic impedance has a value of 30 to 100 ohms due to the structure of the line, only 1118 or two terminating resistors can be installed. In other words, the drive capability (load drive capability) of a BCLIC normally has a current supply capability that can drive at most two loads of Ω.

Therefore, one BCL driver IC can be connected to many ICs.
If it is necessary to drive the input terminals (43) in the middle of one transmission line (41) on the board as shown in
a) , (43b), (43c), (43d), (
43e). However, when the distance from the transmission line to the input part of the real IC is long (such as wiring inside the package), this part acts as an open stub l, and when viewed from the driver IC, a capacitive load is applied to each part. This results in distortion of the transmitted waveform and an increase in propagation delay time. This tendency becomes noticeable when mounted in a large package, such as a dual in-line package or a large ceramic package.

Additionally, for higher-speed operating systems, multiple high-speed devices are mounted on a large ceramic substrate or the like. Multi-chip packages are used, but similar failures occur in such cases. However, in this case (microstrip line 61)), the open stub (g) is mainly the fifth
Semiconductor chips (s) such as bonding wires as shown in the figure
This is caused by the length of the connecting portion between 4a) and (ssb) and the board. Although this is not as long as the wiring on the board described above, when the operating frequency is high, even an open stub as large as a bonding wire has a large effect on system performance due to waveform distortion.

[Purpose of the invention]

This invention improves the drawbacks of the conventional device mentioned above.
It is an object of the present invention to provide a semiconductor device with less waveform distortion and reduced propagation delay time in the transmission of high-speed digital signals within a system.

[Summary of the invention]

The present invention is characterized in that a signal feed-through structure is provided within the package or IC chip in order to eliminate the open stub portion that causes waveform distortion and increased propagation delay time.

That is, conventionally, when all high-speed ECL elements on a board are connected, an open stub always exists. The system is constructed with two systems, one connecting and the other connecting the I10 pin, wiring inside the package, bonding wires, etc. from the branch point to the terminal, and substantially eliminates this open stub. What is important in achieving this is that the characteristic impedance Zo of the wiring on the board matches the characteristic impedance of the wiring inside the package.Especially near the I10 bin and the bonding wire, the impedance tends to rise. . Therefore, the second feature of the present invention is that the I10 pin of the package and the bonding pad are always placed adjacent to a reference voltage (for example, a ground line).

〔Effect of the invention〕

According to the present invention, waveform distortion of signal transmission in a high-speed digital system can be minimized and propagation delay time can be reduced. For example, if there is an open stub of 1 (Ml!) on the I10 pin (lead) or the wiring inside the package, the frequency will be around 3 to 4 GHz (with a rise of 9
Although the influence had appeared from 200 to 3001 S) in terms of time, the present invention has made it possible to use up to about twice the frequency (half the start-up time).

[Embodiments of the invention]

Next, embodiments of the present invention will be described with reference to the drawings.

In a semiconductor device that has many multi-chip packages arranged, the distance from the package's I10 bin to the internal IC chip is relatively longer than other chip carriers that mount a single element, so this part should be kept as short as possible. Or, the termination resistor RL can be installed inside the package.
if < L. Therefore, in the present invention, as shown in FIG.
Package (12a).

(12b) (feed through), and the input signal comes out as is. This output signal is input again to the next multi-chip package. The signal propagation delay time between packages connected in series in this way is
This is not much different from the case of a carrier-type implementation in which the signal does not pass through the package, but the length of the oven stub is extremely short, so the waveform distortion is small and the signal delay time is also small. In addition, in FIG. 1, 16 is I10
It's a bottle.

FIG. 2 further shows an embodiment in which signals are distributed to a plurality of ICs on one multi-chip package. The input signal is connected in pairs with a reference voltage line (such as a ground line) to keep impedance low at the bonding section. The wiring on the semiconductor chips (24a) and (24b) is also wired as a microstrip line or a up-planar line in order to control the characteristic impedance Zo, passes through the bonding part as it is, and is connected to the outside of the semiconductor chip. Served. This output signal is the same as the input signal as long as the characteristic impedances of each part are matched well enough.

That is, even when a large number of them are connected in cascade, the signal distortion is reduced.

Naturally, it is also conceivable to realize both FIG. 1 and FIG. 2 at the same time.

[Brief explanation of drawings]

FIG. 1 is a diagram for explaining one embodiment of the present invention, FIG. 2 is a diagram for explaining another embodiment of the present invention, and FIGS. 3 to 5 are diagrams for explaining a conventional example. It is a diagram. 12a, 12k)...Multi package 124a, 2
4b...Semiconductor chip. Agent Patent Attorney Noriyuki Chika Yudo Kikuo Takehana Figure 1 Figure 2 Figure 3 Figure 4

Claims (4)

[Claims] (1) In a semiconductor device consisting of a package containing one or more semiconductor elements and a board on which the package is mounted, a signal input to the package is
A semiconductor device characterized by having a terminal that is output as is through a wiring path with a constant characteristic impedance within a package. (2) The package is a multi-chip package that mounts a plurality of semiconductor elements, and in at least one of the semiconductor chips, a signal input from the wiring on the package is transmitted through a wiring path with a constant characteristic impedance on the semiconductor chip. The semiconductor device according to claim 1, characterized in that the semiconductor device has a terminal that outputs the output as it is. (3) The semiconductor device according to claims 1 and 2, wherein a reference voltage terminal is located next to the input/output terminal. (4) Semiconductor element or chip is made of GaAs or GaAlAs
3. The semiconductor device according to claim 1, wherein the semiconductor device is a digital IC.