JPS6220001A - Sequence controller - Google Patents

Abstract

PURPOSE:To obtain a high-reliability and simple sequence controller by arranging drive control modules corresponding to apparatuses of minimum constituting units of a plant. CONSTITUTION:Drive control modules (DCM) 153a-153n are arranged correspondingly to apparatuses 11a-11n of minimum units constituting a system apparatus unit distributed control system for a power plant 152, and these DCMs are controlled generally by CPU 154 of apparatus group controllers 156a-156n. In these DCMs, the input/output function for the number of input and output points corresponding to apparatuses and the protective interlock and manual operation function for trouble of the CPU are incorporated in one printed circuit. Thus, apparatus group controllers of high reliability are constituted without constituting complicated manual operation circuit and protective circuit with hard wired logics.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a sequence control device, and relates to a drive control module (hereinafter referred to as DCM) most suitable for the configuration of a distributed control system for each system device.
odule).

[Background of the invention]

Conventional sequence control devices were composed of relays or solid-state wire rosics, but
When the system becomes more sophisticated and complex due to wide-ranging automation to enable plant operation by a small number of people, or an increase in the number of plant auxiliary equipment due to the increase in coal-fired power plants due to fuel conversion, etc., the system is configured with wire rosic. The amount of hardware and number of wiring will be enormous. Furthermore, conventional hard-wired ROSIC control devices cannot adequately respond to advanced needs such as displaying sequence progress, displaying traffic jams, and diagnosing abnormalities.

Sequence control devices using digital controllers have become popular.

However, for economical reasons, digital controllers are inevitably configured to process multiple auxiliary machines in a time-sharing manner with one controller, so if the CPU fails, control of multiple auxiliary machines becomes impossible, which is critical to continued plant operation. Failure will occur.

Therefore, multiplexing of controllers is required. In addition, an interlock (hereinafter referred to as an auxiliary equipment protection interlock) is required to forcibly stop the auxiliary equipment to ensure its safety in situations where continued operation of the auxiliary equipment would cause damage to the auxiliary equipment. However, even when using a conventional digital controller, this is configured with hardwired Rosic.

This is because the auxiliary equipment protection logic must always be operating while the auxiliary equipment is operating, regardless of whether the CPU is operating or not, and failure of the auxiliary equipment protection logic will directly lead to serious accidents such as damage to the auxiliary equipment. It is.

FIG. 2 shows the configuration of a control device using a conventional digital controller. 1 is a digital controller, 2 is a CPU, and 3a to 3n are digital input cards (hereinafter referred to as DI).
card), 4a to 4n digital output card (hereinafter referred to as D
(O card) and PI/O bus 7. 8 is an auxiliary protection circuit, an alarm circuit, and a manual operation circuit, which manually control the operating terminal in the event of a digital controller failure, etc., based on commands from the manual operation switch shown in 9 and process status signals from the plant at /O. This system allows the plant to continue operating, and also ensures the safety of the plant by forcibly stopping auxiliary equipment in situations where the plant may be damaged. Reference numeral 11 denotes equipment, and a plurality of pieces constitute a plant.

Here, mainly for economic reasons, one digital controller 1 generally controls a plurality of devices 11.

FIG. 3 shows the control device using the digital controller shown in FIG. 2 in more detail.

20 is a circuit executed by software stored in the memory in the CPU 2 in FIG.

These circuits are described in the macro language shown in 21, 22, and 23. 21 is a logical sum macro, 22 is a logical AND macro, and 23 is a logical NOT macro. 26 is a sequential control logic, and sequential start command 24.
Sequential stop command 25 and process status signal 27
Sequential control processing contents are described in a macro language using a to 27n, and automatic start commands 28a to 28n and automatic stop commands 29a to 29n are issued to each device according to a predetermined order while checking the process status.
Output from

Reference numeral 80 indicates one component of the auxiliary equipment protection circuit, alarm circuit, and manual operation circuit shown in FIG. When the automatic mode is selected by the automatic/manual changeover switch 92, the commands from the manual operation switches 91 and 93 are locked by the AND circuit 81, and the automatic operation outputs 28a and 29a from the digital controller are selected. After checking the process status signal 85, the operating end 12 is automatically operated. On the other hand, when the manual mode is selected, the process status signal 8 is
Manual operation is performed while checking 5. In addition, when a serious abnormal condition of the device is detected at the detection end 14.15, the protective interlock 87 determines the abnormal condition by capturing the abnormal condition signals 86a to 86n, and the detection terminal 14.15 detects the abnormal condition by capturing the abnormal condition signals 86a to 86n. This is to ensure the safety of equipment by forcibly outputting a stop command with the highest priority.

FIG. 4 shows front and side views of a sequence control device using a conventional digital controller.

/O0 is the system cabinet of the control device, /O1 is the control power supply device, 1 is the digital controller, /O2 is the input/output cable of the digital controller, 8 is the auxiliary equipment protection and alarm consisting of /O3's electromagnetic relay, etc. This is a manual operation circuit. /O4 is wiring for configuring a circuit by combining electromagnetic relays, /O5 is an external terminal block, and /O6 is an external cable connected to the plant.

As mentioned above, in conventional systems, in order to eliminate the problem of inability to operate multiple devices in the event of a digital controller failure, an auxiliary equipment protection circuit is installed using hardware of a scale equal to or larger than that of the digital controller and a huge number of wiring. However, unless an alarm circuit and a manual operation circuit are configured, a sequence control device such as a power generation plant that requires continued operation even in the event of a failure of the digital controller cannot be configured.

A known example of such a conventional system is described in PI3 and FIG. 2 of the Journal of the Institute of Electrical Engineers of Japan, 1981/O/O, Vol.

[Purpose of the invention]

An object of the present invention is to ensure protective operation even in the event of a CPU failure in a digital controller, to enable manual operation, and to enable plant operation without the need for complex auxiliary equipment protection interlocks and manual operation circuits using hard-wired ROSICs. Functional PI/PI that has the required number of input/output points and can be maintained independently in one-to-one correspondence with the constituent devices
The object of the present invention is to provide a highly reliable and simple sequence control device constructed using the same.

[Summary of the invention]

The feature of the present invention is that a plurality of equipment groups come together to form an equipment group, a plurality of equipment groups come together to form a system, and a plurality of systems come together to form a power generation plant.
A system controller is placed in each system, and a device group controller is placed in each device group, and a failure in any system controller will not affect other systems, and a failure in any device group controller will not affect other device groups. In a system equipment unit distributed control system of a power generation plant in which each controller is distributed in a distributed manner, one printed card is provided with the number of DIs and DOs required to control one equipment, and furthermore, in the event of a CPU failure, It can output operation signals according to manual operation commands, and it has a built-in circuit to output the status of the operating end to the display.It also has a built-in auxiliary equipment protection circuit, and if an abnormality is confirmed, it will issue a forced stop command to the operating end. A drive control module (hereinafter referred to as DCM), which is a functional PI/○ that can output You can configure a highly reliable equipment group controller without any problems. In addition, since one DCML card is compatible with one device,
Failure of any DCM does not affect other devices, and maintenance can be performed individually, making it possible to configure an extremely reliable distributed control system.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIG.

FIG. 1 shows an example of the configuration of a sequence control system. In the figure, 11a to lln are respective devices, and 150a to 15
0n is a device group consisting of a plurality of devices 11, and 1
51a to 151n are systems made up of a plurality of equipment groups 150, and 152 is a power generation plant made up of a plurality of systems 151.

Reference numerals 153a to 153n are one print card that corresponds one-to-one to the devices 11a to 11n of the plant, and are DCMs that can cover input and output necessary for controlling the corresponding devices. 154 is a plurality of DCMl 53 a to 153 n
155 is its PI/○ bus, and 156 a to 156 n are device group controllers. Reference numeral 157 is a system controller that centrally controls a plurality of device group controllers 156a to 156n. Reference numeral 158 denotes an intra-system serial signal transmission line that connects the system controller 157 and the plurality of device group controllers 156a to 156n. 159a-159n
is a system-based control system, and 160 is a master controller that centrally controls a plurality of system-based control systems 1598 to 159n. Reference numeral 161 denotes a system transmission line that connects the mask controller and a plurality of system controllers.

FIG. 5 shows details of the DCM.

200 is a circuit executed by software stored in memory within the CPU. 201 is a hardware circuit realized by one DCM printed board. 20
2 is the PI/O bus, and the CPU and DCM card are the PI/O bus.
The interface is via /O path 202.

There are circuits 203 to 206 in 200, and the control functions of the circuits are described in a macro language. The sequential automatic operation interlock 203 sequentially outputs operation commands to each operating end in the system while checking the state of the operating end when the automatic mode is selected. An operation permission interlock 204 determines whether the operation end can be operated based on the input process status signal.

The automatic operation interlock 205 based on external process conditions determines whether the operating end is in a state where automatic operation is possible based on the input process status signal, and outputs an operation command if automatic operation is possible.

The operating end diagnostic circuit 206 determines malfunction or non-operation of the operating end by inputting an operating command to the operating end and a state signal of the operating end, and outputs an abnormal signal when an abnormality occurs.

The 201 DCM card, which consists of one printed circuit board circuit, contains 16 D parts of 250, 6 DO parts of 251, and 2
It has 52 basic logics, 253 protection logics, and 254 logic pattern selection sections. The purpose of each channel of DI and D○ is as shown in the figure. The basic logic of 252 is the operation circuit and status display circuit of the operation end.
The minimum necessary logic common to each operation terminal is formalized as fixed logic, and PAL (Program
ble ArrayLogic). 25
Hobara logic in 3 is due to malfunction or malfunction 4! & ROM (Re
ad 0nly Memory).

Reference numeral 300 denotes an operator's operation unit consisting of a manual operation switch and a status display lamp. Reference numeral 12 indicates a motor for driving the operating end 13, and reference numeral 16 indicates a power center or the like, which is comprised of a circuit breaker and a control circuit for the circuit breaker for supplying power to the drive motor 12. 14 is a switch for detecting pressure, flow rate, etc., and 15 is a switch for detecting the state and position of equipment.

FIG. 6 shows details of the protection logic 253 in FIG. 5. The address bus 402 of the storage device 403 is used as an input part, and the logic pattern selection part 254 and the contact input signal 40
8. Signals such as a storage input signal 406 and a timer signal 407 are input. The storage device 403 constructs a logic pattern according to these input conditions, and outputs the result using the data bus 404 as an output section. A portion of the signal output via the data bus 404 is a storage input signal 406
A portion of the signal is input again to the address bus 402 via the timer 405, and constitutes a hold circuit and a time-limit operation circuit, respectively. By selecting the required logic using the logic pattern selection unit 254 with the above configuration,
A logic circuit corresponding to the contact input signal 408 is stored in the memory device 403.
A required output 409 can be obtained by adding a storage input signal 406 and a timer signal 407 as necessary. In FIG. 6, the logic pattern selection section 254 is represented by 6 bits, but in this case, 2'=64 logic patterns can be selected. This number of bits may be selected as required; for example, if 256 patterns of logic are required, it may be set to 8 bits. Input signal 408, storage input signal 406. The number of timer inputs 407 can also be changed as needed within the range of input points of the storage device 403. Note that the storage device 403 is shown as a ROM in FIG. 5, but it may also be a RAM (Random Access Me
mory) t-core memory, etc. can be used,
The constituent logic may be fixed in ROM, etc., or R
It can also be configured to be changeable with AM, core memory, etc.

The logic configured as described above is installed on a printed board as shown in FIG. The logic pattern selection unit 254 selects and configures a protection interlock that issues an 8-force 409 to forcibly stop the equipment when necessary. This makes the protection interlock C
Since it does not go through the PU, it operates reliably even in the event of a CPU failure, and the safety of the equipment is ensured, so a highly reliable and flexible protection circuit is constructed.

FIG. 7 shows a specific method for creating the logic described in FIG. 6. In the example of FIG. 7, for simplicity, the logic pattern selection section 254 has 3 bits, the input 408 has 2 points, and the timer 4
05 is also given 2 points. An example of a logic pattern formed by this input is shown in the lower left frame, and this pattern number is 0/O. A time chart based on this logic is shown at the bottom right.

When external input A turns ON, timer T1 is activated by wire number 414.
starts the timer count. When the external human power B is turned on, the timer T2 similarly starts counting based on the wire number 413. When external human power B turns ON, A is also ON, so output C is output as an ON state via wire numbers 415 and 411. Further, when the timer T1 completes counting, the output is output via the wire number 412 as an ON state.

The method of configuring this logic on memory will be described below. Assume that the memory address is composed of 7 bits in total, including 2 timer points, 2 external input points, and 3 logic pattern selection points,
These are treated as parameters for commanding memory addresses in order. The selection pattern of the logic pattern selection section 254 is set to 0.
If /O is selected, the address area where the upper three digits of the address corresponding to the switch selection section are 0/O is selected. At this time, the corresponding address is selected depending on the 0N/OFF state of the two external inputs 408. Output section 4 according to this address
11, 412, 413, and 414 are programmed according to the logic pattern, and output corresponding to this program. When the output units 413 and 414 turn on, the timer 405 starts counting, and depending on whether or not the timer completes counting, the count is input to the storage unit 403 again, and the corresponding memory address is further accessed. As a result, the output unit 411,
412. The output section may be any number of points within the data bit range of the memory.

FIG. 8 shows details of the basic logic 252 in FIG. 5. 420 is a status display logic, and 450 is an operation command logic. The purpose of the input/output signals is as shown in Figure 8. Signals in the dotted line frame are input signals from the CPU, signals in the solid line frame are input signals from the protection logic ROM, and signals without a frame are external input/output signals. show. 441 is a lamp lighting command output signal "r input", which is the output of the logical sum 437;

The logical sum 437 outputs the "on" lamp lighting command 441 when either the logical products 433, 435 and the lamp test signal 424 are established. Therefore, the control power supply normal signal 42
7 is ON, if the CPU is in the CPU RUN state, a lighting command 441 is output to the "ON" lamp according to the "r ON" lamp lighting signal 422 from the CPU, and if the CPU is in the CPU STOP state, the lighting command 441 is output to the "ON" lamp.
Signal 422 from U is locked by AND 433 and lighting command 441 is output in accordance with the "in" feedback signal from the process. In addition, the "OFF J lamp lighting command output signal 442 is configured using the same logic."Automatic" lamp lighting command output signal 443 and "Manual" lamp lighting command output signal 444 are set to It is output directly by the N/○FF status signal 428. As mentioned above, the process status display and operation mode display necessary for manual operation are
Since the data is taken in from the DI channel in the DCM card without going through the PU and output directly to the D○ channel via the status display logic 420, display can be ensured at any time due to the CPU.

The "in" command output signal of 485 is a protection "in" signal 45 which is an abnormal state signal that requires auxiliary protection by logical sum 483.
If 1 is input, it will be output with the highest priority. In addition, during normal operation and not in such abnormal conditions, R
After confirming by the logical product 481 that the "r input" prohibition signal 452, which is the input from the OM, is not established and the "r input" permission signal, which is the input from the CPU, is established, when the automatic mode is selected, 1 according to the "in" command 456 from the CPU
Operation signal 45 by operation switch when manual mode is selected
7, an "in" command output signal is output. In addition, C
When the PU is stopped, the CPU stop state signal 458 and the logical OR 477 cause a one person permission signal 45 to be sent from the CPU.
3 is a bypass failure, so manual operation and protection interlock are protected regardless of the operating state of the CPU.

FIG. 9 shows the connection between the protection logic 403 in FIG. 6 and the basic logic 420 and 450 in FIG. 8. Note that this figure is also a detailed diagram of a hardware circuit realized by the 201 DCMI printed boards shown in FIG. Protection logic 403, basic logic 420 and 45
．． 0. The DI section 25'O, DO section 251, and PI/○ bus 202 are connected as shown in the figure by mode wiring on the printed board. Process status signals for configuring protection interlocks, permission conditions, etc. are input to the protection logic 403 via the DI unit 250, and the forced operation commands output from the protection logic are matched at an OR gate. After that, it is input to the 4500 basic logic. In the basic logic 450, the forced operation command from the protection logic 403 is output from the DO unit 251 with the highest priority over any of the manual operation command and the automatic operation command from the CPU.

In addition, both the operation command from the manual operation switch 300 and the device status feedback signal are sent to the
The signal is input directly from the I section 250 to the basic logics 450 and 420, and after predetermined logical operations are performed, it is output from the 00 section 251 to the indicator lamp 300 and the operating end. On the other hand, DI section 25
All external signals input from the PI/O bus 202 are input to the CPU through the PI/O bus 202, which performs complex arithmetic processing such as sequential automatic operation interlock and control end abnormality diagnosis circuit, and sends the results to the PI/O bus 202. is output to basic logic 420, 450 via.

The basic logic 450 outputs an operation command from the CPU after confirming the operation mode and operation permission conditions.

FIG. /O shows an implementation diagram of a system cabinet of a control device according to the present invention. 600 is a system cabinet, 6
01 is a digital controller, 602 is a controller input/output cable, 605 is an external terminal block,
606 is an external cable. In this way, the digital controller input/output can be directly connected to external processes without going through protection and manual operation circuits consisting of relays, etc., making it possible to construct a very simple and highly reliable system. Become. In addition, as shown in the figure, the DCM card is a single printed circuit board that corresponds to each piece of process equipment, and maintenance such as replacement can be performed independently of other DCMs, creating an extremely autonomous control device. It becomes possible to do so.

〔Effect of the invention〕

According to the present invention, the input/output function of the number of input/output points, the protection interlock in case of CPU failure, and the manual The operation function is realized as a DCM built into a single printed circuit board circuit, and this is placed in each device.

Connect these DCM cards to the equipment group controller C
By centrally controlling the PU, maintenance can be performed independently for each DCM card, and a highly reliable system is constructed without the need for protective interlocks and manual operation circuits consisting of relays, etc. outside the digital controller. There is an effect that can be done.

[Brief explanation of the drawing]

Fig. 1 is an embodiment (system configuration) of the present invention, Figs. 2 and 3 are explanatory diagrams of the prior art, Fig. 4 is a cabinet mounting diagram of the conventional system, and Fig. 5 is an explanatory diagram of the DCM card of the present invention. , FIG. 6 and FIG. 7 are a diagram and explanatory diagram of the protection logic section in the DCM card, FIG. 8 is a diagram of the basic logic section in the DCM card, FIG. 9 is a hardware configuration diagram of the DCM card, and FIG. Figure O is a system cabinet implementation diagram of the present invention. 1... Digital controller, 8... Protection circuit,
Alarm circuit and manual operation circuit, 11... equipment, 153.
・・D CM (Drive Control Mod
ule), 156-equipment group controller, 1
57... System controller VJ z Mouth YJ4 figure Tato's p cable 8th prisoner J/O 1D nO Tato's 1PF-7-le

Claims (1)

[Claims] 1. For a power generation plant in which a plurality of devices come together to form an equipment group, a plurality of device groups come together to form a process system, and a plurality of process systems come together to form a plant, the process System controller for each system,
A power generation plant configured in such a way that equipment group controllers are distributed in each equipment group, and a failure in any system controller does not spread to other systems, and a failure in any equipment group controller does not spread to other equipment groups. In a system equipment unit distributed control system, drive control modules are arranged corresponding to the equipment that is the minimum component unit of the plant, so that even if any drive control module fails, it does not affect other drive control modules. In addition, a sequence control device characterized in that each drive control module can be disconnected from or connected to a control system independently, and the drive control modules can be maintained individually. In Section 2.1, the drive control module is equipped with an input/output section that inputs and outputs contact signals necessary to control each device, and includes the minimum basic operation circuit and status display circuit necessary for controlling each device. By having a logic section consisting of each hardware of the drive control module and protection circuit, and a PI/O bus that interfaces with the CPU, the drive control module can control the device independently from other control systems. A sequence control device characterized by: 3. In item 2, it has an input section for directly inputting the operation signal from the manual operation device and the external process status signal from the DI,
Equipped with a fixed logic section that constitutes the minimum required operation circuit common to all operation terminals, and by standardizing these on a printed circuit board as hardware, it is possible to use other hardware for help even when the CPU stops. A sequence control device comprised of a PI/O card, characterized in that the operating end can be operated manually without borrowing. In Section 4 and 2, it has an input section for inputting the external process status signal input from the DI, the status display signal from the CPU, the CPU operating status signal, etc., and determines the operating status of the CPU to control the CPU. , is equipped with a fixed logic section that selects the status display signal from the CPU when running, and selects the process status signal when the CPU is stopped, and outputs it directly from the DO, and by standardizing these on a printed board using hardware. , a PI/O characterized in that the process status is output to the display even when the CPU is stopped, so that the manual operation of the operating end when the CPU is stopped as described in item 3 above can be performed while monitoring the process status. A sequence control device consisting of cards. 5. In item 2, there is an input section that takes in contact signals such as process status signals directly from the DI, a logic pattern selection section that selects a required logic, and a variable logic section that is configured by the logic selected by the selection section. By installing these on a printed board using hardware, it is possible to output various output signals according to the input signal and selected logic content to the operating end without going through the CPU. A sequence control device constituted by a PI/O card, characterized in that: