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JPS62186534A - Etching method - Google Patents

Etching method

Info

Publication number
JPS62186534A
JPS62186534A JP2853986A JP2853986A JPS62186534A JP S62186534 A JPS62186534 A JP S62186534A JP 2853986 A JP2853986 A JP 2853986A JP 2853986 A JP2853986 A JP 2853986A JP S62186534 A JPS62186534 A JP S62186534A
Authority
JP
Japan
Prior art keywords
layer
polyimide
etching
metal layer
silicon oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2853986A
Other languages
Japanese (ja)
Inventor
Toshiaki Ogata
尾形 俊昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2853986A priority Critical patent/JPS62186534A/en
Publication of JPS62186534A publication Critical patent/JPS62186534A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To etch a polyimide layer finely without defects, by performing the etching with a metal layer and a silicon oxide layer, which is formed on the metal layer, as masks. CONSTITUTION:On a polyimide layer 2, which is formed on a wafer 1, a metal layer 3 made of aluminum, molibdenum and the like is formed. A very thin photoresist layer 4 is formed between the polyimide layer 2 and the metal layer 3. A silicon oxide layer 5 is formed with spin off glass, and the metal layer 3 is covered. A photoresist layer 6 is formed, and patterning is performed. The silicon oxide layer 5 and the metal layer 3 are patterned. The polyimide layer 2 is etched by a reactive ion etching method. The photoresist layer 6 is usually removed during the etching of the polyimide. The silicon oxide layer 5 and the metal layer 3 are removed by the lift-off method of the photoresist 4.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明にポリイミド11のエツチング法に関し、特にマ
スクの改良に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for etching polyimide 11, and particularly to the improvement of a mask.

〔発明の概要〕[Summary of the invention]

ポリイミド層をエツチングする方法において、金属層上
に酸化シリコン層全形成して金属層上積うことにより、
エツチング時の突起状残渣の発生全防止し、また酸化シ
リコン層下に金属層があることにより、欠陥を救済して
、マスクとして使用できることとなったものである。
In the method of etching a polyimide layer, by forming the entire silicon oxide layer on the metal layer and stacking it on the metal layer,
This completely prevents the generation of protruding residues during etching, and since there is a metal layer under the silicon oxide layer, it can be used as a mask by relieving defects.

〔従来の技術〕[Conventional technology]

従来のポリイミド層のエツチング法は、ウェハー上のポ
リイミド層全選択的にエツチングする際マスクとして、
フォトレジスト、もしくはアルミニウム、モリブデン等
の金属、もしくはスピン・オン・グラスが使用されてい
る。
The conventional polyimide layer etching method uses a mask as a mask when selectively etching the entire polyimide layer on a wafer.
Photoresist, metals such as aluminum or molybdenum, or spin-on glass are used.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、前述の従来技術では、フォトレジストの場合、
酸素上主体とするガスを用いたイオンエツチングにおい
てフォトレジストのエツチング速度がポリイミドのエツ
チング速度の1.5倍以上であり、厚いフオトレジス)
IIの形成が必要なため、微細な加工が困難であること
。アルミニウム、モリブデン等の金属の場合、エツチン
グに除去が非常に困Sな突起状の残渣が発生し易いこと
、スピン・オン拳グラスの場合、膜のピンホールによる
マスク不良が発生し易いことが各々問題点であったO 本発明はこの様な問題点葡解決するもので、その目的と
するところは、ポリイミド層のイオンエツチング時のマ
スクとして微細加工に逸し、欠陥の少ないマスク材上提
供することにある。
However, in the prior art described above, in the case of photoresist,
In ion etching using a gas mainly composed of oxygen, the etching rate of the photoresist is 1.5 times or more than the etching rate of polyimide, resulting in a thick photoresist).
Since it is necessary to form II, fine processing is difficult. In the case of metals such as aluminum and molybdenum, protruding residues that are very difficult to remove are likely to occur during etching, and in the case of spin-on glass, mask defects due to pinholes in the film are likely to occur. The present invention solves these problems, and its purpose is to provide a mask material with fewer defects that can be used as a mask during ion etching of polyimide layers, which can be used as a mask during ion etching of polyimide layers. It is in.

〔問題点全解決するための手段〕[Means to solve all problems]

本発明のエツチング法は、金属層と前記金属層上に形成
さfiた酸化シリコン層上マスクにしてポリイミドrt
iytエツチングすることケ特徴とする。
In the etching method of the present invention, polyimide rt is etched as a mask over a metal layer and a silicon oxide layer formed on the metal layer.
It is characterized by etching.

〔実施例〕〔Example〕

以下2本発明について、実施例に基づき評MK説明する
The following two aspects of the present invention will be described based on examples.

第1図に本発明の実施例ケ工程順に示す図である。まず
a図の如くウエノ・−1上に形成されたポリイミド層2
上にアルミニウム、モリブデン等の金属1% 3 ’e
影形成る。ポリイミド層と金属層の間に極めて薄いフオ
トレジス)#4’に形成すると、後工程でマスク材全リ
フトオフ法によって各局に剥離することができる。
FIG. 1 is a diagram showing an example of the present invention in order of steps. First, as shown in figure a, polyimide layer 2 is formed on Ueno-1.
1% of metals such as aluminum and molybdenum on top 3 'e
Form a shadow. If an extremely thin photoresist (#4') is formed between the polyimide layer and the metal layer, it can be peeled off at each location by a full mask material lift-off method in a post-process.

次にb図に示す如くスピン・オン・グラスによって酸化
シリコン噛5を形成し、金J!T4層3全榎い、エツチ
ング時の突起状の残渣の発生を防止する。
Next, as shown in figure b, a silicon oxide layer 5 is formed by spin-on glass, and gold J! The T4 layer 3 is completely removed to prevent the generation of protruding residues during etching.

また、酸化シリコン層5のピンホールに金属層の存在に
L9ポリイミドf−に転写さnyi:い。
Furthermore, due to the presence of the metal layer in the pinholes of the silicon oxide layer 5, it is transferred to the L9 polyimide f-.

次に0図に示す様に7オトレジスト舊6を形成しバター
ニングする。フオトレジス!−# 6 Uポリイミドの
エツチング終了時1で残る必要が無いため薄い腋で光分
であるので微aなパターンの形成が可能である。
Next, as shown in FIG. 0, seven photoresist edges 6 are formed and patterned. Photoregis! - #6 When the etching of U polyimide is completed, there is no need to leave 1 on, so it is possible to form a fine a pattern because the light beam is thin.

次いでd図に示す様に酸化シリコン層5および金属1−
3ヲバターニングする。
Next, as shown in figure d, a silicon oxide layer 5 and a metal 1-
3. Buttering.

次Ke図の如く酸素もしくはYR累を主体としたガス全
相いて反応性イオンエツチング法でポリイミド層2をエ
ツチングする。フォトレジスト番6は通常ポリイミドの
エツチング中に除去される。
As shown in the following Ke diagram, the polyimide layer 2 is etched using a reactive ion etching method using a gas mainly composed of oxygen or YR. Photoresist number 6 is typically removed during the polyimide etch.

次にf図の如くフォトレジスト4のリフトオフ法で酸化
シリコン層5と金属ml−除去してエツチング全終了す
る。
Next, as shown in Figure F, the silicon oxide layer 5 and the metal ml are removed by a lift-off method of the photoresist 4, thereby completing the etching process.

〔発明の効果〕〔Effect of the invention〕

上述の如く本発明のエツチング法によれば、ポリイミド
層を微細に、かつ欠陥が少なくエツチングすることがで
きる。
As described above, according to the etching method of the present invention, a polyimide layer can be etched finely and with few defects.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(−〜(f) U本発明のエツチング法の一実施
例の工程図である。 1…・―伊つェハー 2・・・・・・ポリイミド層 6・・・・・・金属層 4・・・・・・フオトレジス)/It 5・・・・・・酸化シリコン層 6・・・・・・フォトレジスト層 以   上
FIG. 1 (- to (f) U is a process diagram of an embodiment of the etching method of the present invention. 1...--Item wafer 2... Polyimide layer 6... Metal layer 4...Photoresist)/It 5...Silicon oxide layer 6...Photoresist layer or above

Claims (1)

【特許請求の範囲】[Claims] (1)金属層と前記金属層上に形成された酸化シリコン
層をマスクにしてエッチングすることを特徴とするポリ
イミド層のエッチング法。
(1) A polyimide layer etching method characterized by etching using a metal layer and a silicon oxide layer formed on the metal layer as a mask.
JP2853986A 1986-02-12 1986-02-12 Etching method Pending JPS62186534A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2853986A JPS62186534A (en) 1986-02-12 1986-02-12 Etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2853986A JPS62186534A (en) 1986-02-12 1986-02-12 Etching method

Publications (1)

Publication Number Publication Date
JPS62186534A true JPS62186534A (en) 1987-08-14

Family

ID=12251470

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2853986A Pending JPS62186534A (en) 1986-02-12 1986-02-12 Etching method

Country Status (1)

Country Link
JP (1) JPS62186534A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6679997B2 (en) 1998-08-12 2004-01-20 Nec Compound Semiconductor Devices, Ltd. Organic insulation film formation method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6679997B2 (en) 1998-08-12 2004-01-20 Nec Compound Semiconductor Devices, Ltd. Organic insulation film formation method

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