JPS62183060A - Digital signal recording and reproducing device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to recording and reproducing digital signals, and particularly to a digital signal recording and reproducing device suitable for recording and reproducing using the same device.

[Conventional technology]

Japanese Unexamined Patent Application Publication No. 1983-1983 as one of the digital signal recording and reproducing methods
There is a rotary head type PCM recorder as described in No. 122606. A system using such a rotating head has the feature that the track width can be narrowed and the single-plane recording density can be improved. When recording and reproducing using a rotary head, generally a head for both recording and reproducing is used, and this head is switched to perform recording or reproducing.

[Problem that the invention seeks to solve]

In the above-mentioned conventional technology, the output signal from the recording circuit and the reproduction signal from the head are simultaneously present in the switching circuit that switches the head during reproduction.

The output signal from the recording circuit is not connected to the head during playback, but since the signal level is much higher than the playback signal, leakage affects the playback signal and increases data errors during playback. The problem is that you end up doing it.

An object of the present invention is to prevent the output signal of the recording circuit from leaking into the reproduced signal in the switching circuit.

[Means for solving problems]

The above object is achieved by providing a gate circuit in the recording section of the digital signal processing circuit so that the recording signal is not output during reproduction.

[Effect]

The above gate circuit is controlled by a recording/reproduction switching signal,
When recording, the recording/completion signal is output as is.

Outputs a fixed value during playback. As a result, the output signal of the recording circuit is not inputted to the switching circuit of the head during reproduction, so that the output signal of the recording circuit does not leak into the reproduction signal in the switching circuit.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIG.

FIG. 1 shows a 5-PCM signal recording and reproducing apparatus that records or reproduces PCM signals in response to a recording/reproduction switching signal inputted from an input terminal 28. First, the case of recording will be explained.

During recording, an analog signal input from the input terminal 26 is converted into a PCM signal by the A/D converter 25. Note that the input signal may be a PCM signal output from another PCM signal reproducing device or a digital signal other than the PCM signal. In this case, the A/D converter 25 is unnecessary. This also applies to output. The PCM signal converted by the A/D converter 25 is written into the RAM 21 through the pass line 20. The input/output address generation circuit 17 generates the address of the RAM 21 at this time.

Incidentally, when writing the PCM signal to the RAM 21, the recording signal can be monitored from the output terminal 27 by inputting it to the D/A converter 24 through the error correction circuit 23. At this time, the error correction circuit 23 may be controlled so as not to operate.

The PCM signal written in the RAM 21 is read out according to the address generated by the correction address generation circuit 16, and is input to the error correction circuit 22 through the pass line 20, where an error correction code is generated. That is, the error correction circuit 22 generates an error correction code during recording, and corrects errors in the reproduced signal using the error correction code during reproduction. The error correction circuit 22 generates an error correction code based on the input PCM signal, and writes the generated error correction code into the RAM 21.

After the error correction code is generated, the PCM signal and error correction code stored in the RAM 21 are read out according to the address generated by the recording/reproduction address generation circuit 11, and are read out through the path line 20 and the interface circuit 6. The signal is input to the recording circuit 5.

In the recording circuit 5, additional and additive modulation of synchronization signals, control signals, etc. is performed. After being amplified by the recording amplifier 4, the signal is recorded on the magnetic tape 1 by the rotary head 2. The rotating head 2 is composed of 82 heads mounted on a cylinder facing each other.

The magnetic tape 1 is wound around a cylinder, and the angle of one winding is usually 180° or less, for example 90°. Then, when the head comes over the magnetic tape, a signal is recorded by itself.

The timing generation circuit 15 generates timing signals for controlling various parts using the clock oscillated by the oscillation circuit 14. The oscillation frequency of the oscillation circuit 14 is selected to be an integral multiple of the sampling frequency of the PCM signal.

The oscillation circuit 10 oscillates a clock having a frequency corresponding to the transmission rate (K) of the recording signal. Then, PCM signals and error correction codes are sequentially recorded according to this clock.

The switching circuit ts, 19 switches the address of the RAM 21. Further, the servo circuit 13 is connected to the rotating head 2.
Controls the 0 rotation phase. The position detection circuit 12 detects the phase of the cylinder based on a reference signal indicating the position of the cylinder. Then, the recording timing is determined according to this reference signal.

The gate circuit 29 is a circuit that gates the recording signal output from the recording circuit 5 during reproduction, and outputs a recording signal during recording and outputs O during reproduction. The switching circuit 3 is a head switching circuit, which outputs the recording signal to the rotary head 2 during recording, and outputs the playback signal from the head to the playback amplifier 7 during playback.
Output to. In this way, by providing the gate circuit 29 at the output section of the digital circuit on the recording circuit side of the switching circuit 3.

It is possible to eliminate the influence of leakage of recorded signals during reproduction.

Note that the recording signal can also be gated by stopping the operation of the recording circuit 5.

FIG. 2 shows a recording pattern on the magnetic tape l.

30 indicates one track. ■The truck has
PCM signals and error correction codes are divided into a plurality of blocks, for example 128 blocks, and recorded. FIG. 3 shows the configuration of one block. 31 is a synchronization signal, 32 is P
A control signal related to the CM signal, 33 a block address indicating the block number, and 34 a PC~1 signal and an error correction code.

Figure 4 shows the input of the PCM signal, the generation of the error correction code, and the timing of recording during recording.
11 from the D converter 25. 36 is the timing of writing to the AM21, and the timing of generating the error correction code.

37 is the base yarn signal of the servo circuit 13, 38 is the rotating head 2
39 is a read timing from the RAM 21 to the recording circuit 5, and 40 is a recording timing on the magnetic tape. The numbers in 35, 36 and 39 are R-A
It shows the storage area of M21.゛) - i.e. RAM
21 has a capacity to store PCM signals and error correction codes for four tracks, and each is a first area.

They are a second area, a third area, and a fourth area.

Further, A and B in 40 indicate recording heads. Writing from the A/D converter 25 to the FLAM 21 is performed at a constant cycle depending on the sampling frequency.

For example, if the sampling frequency of the I'CM signal is set to 48K
Hz and to record a two-channel PCM signal, it is necessary to write once every 10 μm. Here, if the access frequency of the RAM 21 is set to 64 times the sampling frequency, or 3.072 MHz, and the number of child bits is 16 bits, P("M signal is written in units of 8 bits, 2 It is necessary to perform writing at the rate of 1 rotation of the rotary head (360
0) to the first and second areas.
and written to the fourth area. At this time, as shown at 36, error correction codes are generated for the PCM signals written in the first and second areas in the previous rotation. Similarly, error correction codes are generated for the PCM signals written in the third and fourth areas in the next rotation. After the error correction code is generated, the PCM signal and the error correction code are read out from the RAM 21 at timing 39 and recorded on the magnetic tape l at timing 40. The recording timing cannot be determined based on the position detection signal 38. Position detection signal 38&t6 indicates the 0° position of the rotary head (the position where head A starts scanning over the magnetic tape l). The servo circuit 13 controls the rotational phase of the rotary head 2 so that the fall of the reference signal 37 generated by the timing generation circuit 15 and the position detection signal 38 coincide. and.

The recording/reproducing address generation circuit 11 determines the recording timing based on the position detection signal 38, and reads the PCM signal and error correction code from the RAN 121.

This reading is performed at a frequency corresponding to the recording rate oscillated by the 0 oscillation circuit 10. Note that the position of the 0 position detection signal 38 may be a position other than O0.

Also, the generation timing 36 of the error correction code and the read timing 39 during recording partially overlap, but if the 111 order of error correction code generation and the ; There is no problem because the generation of the error correction code for the PCM signal has already been completed.

Next, the case where reproduction is performed using the PCM signal recording/reproducing apparatus shown in FIG. 1 will be explained.

During playback, the switching circuit 3 is switched to the playback side by the recording/playback switching signal inputted from the input terminal 28, and the playback signal played by the one-rotation head 2 is amplified and waveform equalized by the playback amplifier 7. The signal is input to the reproduction circuit 8. Note that the recording/reproduction switching signal switches the operation timing of the RAM 21.

It also switches the operation of the error correction circuit 22 and prohibits the operation of the A/D converter 25.

The reproducing circuit 8 demodulates the PCM signal and error correction code, and detects synchronization signals and control signals. The PCM signal and error correction code demodulated by the reproduction circuit 8 are written into the RAM 21 via the interface circuit 9 and the pass line 20. The address of the RAM 21 at the time of writing is generated by the recording/reproduction address generation circuit 11 based on the block address in the synchronization signal and control signal detected by the reproduction circuit 8.

The PCM signal and error correction code written in the RAM 21 are read out according to the address generated by the correction address generation circuit 16, and are read out from the error correction circuit 2 through the path line 20.
2 and error correction is performed.

The PCM signal corrected by the error correction circuit 22 is sent to the RA again.
Written to M21.

The error-corrected PCM signal is read out from the RAM 21 according to the address generated by the input/output address generation circuit 17 and sent to the error correction circuit 23 through the path line 20.
is input. The error correction circuit 23 performs error correction such as average value interpolation to replace errors that cannot be corrected with the average value of values around 1.

It is output to the D/A converter 24. and D/A converter 24
The signal is converted into an analog signal and output from the output terminal 27.

Note that the reproduced PCM signal may be output as is to another PCM device without converting it into an analog signal.

Recording/reproduction address generation circuit 11. When generating addresses in the correction address generation circuit 16 and the input/output address generation circuit 17, the same circuit is shared during recording and reproduction because the address generated during recording and the address generated during reproduction are the same. I can do it.

FIG. 5 shows the timing of signal reproduction, error correction, and output of the PCM signal during reproduction. 7° is the playback timing from the magnetic tape 1, 71 is the RAM from the playback circuit 8.
21 is a write timing, 72 is an error correction timing, and 73 is a read timing from the RAM 21 to the error correction circuit 23. Reproduction of the signal from the magnetic tape l is performed in synchronization with the reference signal 37. And timing 7
1, the first to fourth areas of the RAM 21 are sequentially written. Error correction is performed on the reproduced signal written in the RAM 21 at timing 72. Although the timings of writing the reproduced signal and error correction partially overlap, there is no problem as long as the reproduction order and the error correction order are matched.

The error-corrected PCM signal is sent to one of the 6th order rotary heads.
It is output as a rotation (360°).

The switching timing of the switching circuits 18 and 19 may be the same as that during recording.

FIG. 6 shows an example of the configuration of the gate circuit 29. 80 is a shift register, and 81 and 82 are AND circuits. Also,
The input terminal 83 is an input terminal for the recording signal from the recording circuit 5;
The output terminal 86 is an output terminal for the recording signal to the recording amplifier 4;
The input terminal 84 is an input terminal for a recording/reproduction switching signal, and the input terminal 85 is an input terminal for a shift clock of the shift register 80. Here, the recording/reproduction switching signal is 1 for recording, 0 for recording, and 0 for recording.
Playback will start at 0:00. The shift clock of the shift register 80 uses the reference signal 37 shown in FIG. 4. Similar timing signals.

That is, other signals may be used as long as they change near the 00 position of the rotary head. It is assumed that the shift register 80 shifts at the falling edge of the clock.

The operation will be explained below with reference to the timing chart of FIG. In the figure, 87 indicates a recording/reproduction switching signal, and 88 indicates an output of the AND circuit 81. when playing.

The output of the AND circuit 81 is 0, and no recording signal is output. When changing from playback to recording, that is, 8
When 7 changes from O to 1, the output of the shift register 80 becomes 1 with a delay. At that point, the AND circuit 81
The output becomes 1 and a recording signal is output. As can be seen from FIG. 4, the signal input to the A/D converter 25 is output from the recording circuit 5 with a one rotation delay. Therefore, the recording signal output immediately after switching from reproduction to recording is not a normal recording signal. Here, taking into consideration the switching time of the timing circuit after switching, the output of the recording signal is started two rotations after recording starts. When changing from recording to playback, that is, the recording/playback switching signal is 1.
When the voltage changes from 0 to 0, the output of the AND circuit 81 also immediately becomes VcO, and the output of the recording signal is stopped.

As described above, by stopping the output of the recording signal from the digital circuit during reproduction, it is possible to prevent the recording signal from leaking into the reproduction circuit and affecting it.

Furthermore, by delaying the start of output of the recording signal at the start of recording, recording of an abnormal signal can be prevented.

〔Effect of the invention〕

According to the present invention, it is possible to prevent the signal output from the recording circuit during reproduction from leaking into the reproduction circuit and deteriorating the reproduction signal.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an embodiment of the PCM number recording/reproducing device of the present invention, and Fig. 2 is a diagram of a recording pattern on a magnetic tape.
Figure 3 is a block configuration diagram, Figure 4 is a timing diagram during recording, Figure 5 is a timing diagram during playback, Figure 6 is a configuration diagram of the gate circuit, and Figure 7 is a timing diagram showing the operation of the gate circuit. It is. 2...Rotating head, 3...Switching circuit. 4...recording amplifier, 7...playback amplifier. 5...recording circuit. 6.9...Interface circuit. 8... Reproduction circuit, to, 14... Oscillation circuit. 11... Recording/reproduction address generation circuit. 15...timing generation circuit. 16... Correction address generation circuit. 17...I/O address generation circuit. 18, 19...Switching circuit, 21...RAM
. 22...Error correction circuit, 23...Error correction circuit. 24...D/A converter, 25...A/D converter. 80...Shift register, 81.82...AND circuit.

Claims (1)

[Claims] 1. A digital signal processing circuit that performs predetermined processing on a digital signal to generate a recording signal during recording, and generates and outputs a digital signal from a reproduced signal during reproduction; a recording amplifier that amplifies the reproduction signal, a reproduction amplifier that amplifies the reproduction signal and equalizes its waveform and inputs it to the digital signal processing circuit, a head that records on or reproduces the recording medium, and a head that outputs the output of the recording amplifier during recording. In a PCM signal recording and reproducing apparatus comprising a switching circuit that inputs the signal reproduced from the head to the reproducing amplifier during playback, the recording signal generated by the digital signal processing circuit is directly input to the recording amplifier during recording. 1. A digital signal recording and reproducing device characterized by being provided with a gate circuit that outputs an output and stops the output during reproduction. 2. A PCM signal recording and reproducing apparatus according to claim 1, characterized in that, at the start of recording, the start of output of the recording signal from the gate circuit is delayed for a certain period of time.