JPS62176173A - Manufacture of photoelectric conversion device - Google Patents
Manufacture of photoelectric conversion deviceInfo
- Publication number
- JPS62176173A JPS62176173A JP61017428A JP1742886A JPS62176173A JP S62176173 A JPS62176173 A JP S62176173A JP 61017428 A JP61017428 A JP 61017428A JP 1742886 A JP1742886 A JP 1742886A JP S62176173 A JPS62176173 A JP S62176173A
- Authority
- JP
- Japan
- Prior art keywords
- photoelectric conversion
- electrode
- conversion device
- type
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は非単結晶半導体を用いた光電変換装置において
、非単結晶半導体層を形成する際この半導体層内に不本
意に形成されてしまう空孔またはピンホールにより光電
変換装置の第1の電極と第2の電極とが、これらの空孔
またはピンホールを通して、互いにショートあるいはリ
ーク状態となった光電変換装置を修復することを特徴と
した光電変換半導体の作成方法に関するものであります
。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a photoelectric conversion device using a non-single-crystal semiconductor, in which holes or pinholes are inadvertently formed in the semiconductor layer when forming the non-single-crystal semiconductor layer. A method for producing a photoelectric conversion semiconductor characterized by repairing a photoelectric conversion device in which a first electrode and a second electrode of the conversion device are short-circuited or leaked to each other through these holes or pinholes. It is something.
「従来技術」
従来、光電変換装置としては数Cdの小面積のPIN接
合を有する非単結晶半導体を用いた物が主であった。ま
た最近は数1000cJと大面積の光電変換装置を作り
、その単位面積当たりの製造原価を下げようとする試み
がある。しかし、このような光電変換装置は、非単結晶
半導体層の一部に空孔。"Prior Art" Conventionally, photoelectric conversion devices have mainly used non-single crystal semiconductors having PIN junctions with a small area of several Cd. Recently, there have been attempts to produce photoelectric conversion devices with a large area of several 1000 cJ and to lower the manufacturing cost per unit area. However, such photoelectric conversion devices have holes in a part of the non-single crystal semiconductor layer.
ピンホール、クラック等を必ず有しており、その部分が
短絡電流部(ショート)または弱いリーク部となってし
まうため、大面積の光電変換装置を作製した場合、この
短絡電流部または弱いリーク部の為に曲線因子(F F
)の低下が激しくエネルギー変換効率の低下を誘発し、
製造歩留まりが悪く結果として単位面積当たりの製造原
価を下げることは非常に困難だった。It always has pinholes, cracks, etc., and these parts become short circuit current parts (short circuits) or weak leak parts. Fill factor (F F
) causes a severe decrease in energy conversion efficiency,
The manufacturing yield was poor, and as a result, it was extremely difficult to reduce the manufacturing cost per unit area.
このため、大面積の光電変換装置を作製する際において
、電流短絡部のみを選択的に除去する方法が求められて
いる。その代表例として特開昭60−46080が示さ
れている。この発明は、PIN接合を有する半導体上に
電極を形成し、さらにその表面をエツチング溶液に浸し
、加えて電流を流すことにより電流短絡部のみを選択的
に除去することを特徴としている。そのため使用する溶
液はエツチング溶液であり、その具体例がその明細書3
76頁左上欄ffL9〜右下欄1,1に示されている。Therefore, when manufacturing a large-area photoelectric conversion device, there is a need for a method of selectively removing only the current short-circuit portion. As a representative example, Japanese Patent Laid-Open No. 60-46080 is shown. This invention is characterized in that an electrode is formed on a semiconductor having a PIN junction, the surface of the electrode is immersed in an etching solution, and a current is applied to selectively remove only the current short-circuit portion. The solution used for this purpose is an etching solution, a specific example of which is given in Specification 3.
It is shown in the upper left column ffL9 to the lower right column 1, 1 on page 76.
これによるとショートしている半導体上のITOを選択
的にエツチング除去する。そのための電解液としての0
.01〜1χの塩化水素、0.05モルのNaC1塩希
釈溶液を用いている。According to this method, ITO on a short-circuited semiconductor is selectively removed by etching. 0 as an electrolyte for that purpose
.. A dilute solution of 0.01 to 1 χ hydrogen chloride and 0.05 mol NaCl salt is used.
しかし、かかる電解液でITOおよびその下のショー1
〜部の半導体を除去する従来公知の方法は、他の多くの
欠点を有する。即ちこの除去された領域に対しその後の
工程において選択的に絶縁物をコートしなければならな
い。さらに酸水ン容ン夜中に非単結晶半導体層を浸漬す
るため、金属被膜等は、この工程が終了した後に形成し
なければならなかった。またこの工程の際に半導体層に
吸着した不純物イオンおよび水分等を十分に除却する工
程が必要となり製造原価を引き上げることになってしま
った。However, in such an electrolyte ITO and the show 1 below
Previously known methods of removing semiconductors in ~ parts have a number of other drawbacks. That is, this removed area must be selectively coated with an insulator in a subsequent process. Furthermore, since the non-single crystal semiconductor layer was immersed in acidic water overnight, metal coatings and the like had to be formed after this process was completed. Further, during this step, a step is required to sufficiently remove impurity ions, moisture, etc. adsorbed on the semiconductor layer, which increases manufacturing costs.
「発明の目的」
本発明は、これらの欠点をなくするためにショート個所
をウェットエツチングを行い除去するのではなく、ショ
ート個所を光電変換装置に逆バイアス)を加え、電気的
に絶縁化する(以下この工程をRBを行うという)。す
なわち、光電変換装置のP型非単結晶半導体層側の電極
に負の電圧をN型非単結晶半導体層側の電極に正の電圧
を印加することにより、不良個所を修復しようというも
のです。``Object of the Invention'' In order to eliminate these drawbacks, the present invention does not remove short-circuited parts by wet etching, but rather applies reverse bias to the photoelectric conversion device to electrically insulate the shorted parts ( Hereinafter, this process will be referred to as performing RB). In other words, the defect is repaired by applying a negative voltage to the electrode on the P-type non-single crystal semiconductor layer side of the photoelectric conversion device and a positive voltage to the electrode on the N-type non-single crystal semiconductor layer side.
以下に図面に従って本発明を説明する。The present invention will be explained below with reference to the drawings.
第1図は、本発明の概要を示すものである。わかりやす
くする為、光電変換装置としては非晶質珪素半導体を用
いたPIN構造となっている。FIG. 1 shows an overview of the invention. For ease of understanding, the photoelectric conversion device has a PIN structure using an amorphous silicon semiconductor.
構造としては硝子基板(1)、第1の電極(2)P型a
−3i(3)、I型a−5i(4)、N型a−3t (
5) 、第2の電極(6)となっている。本発明は特に
この構造のみに限定されるものではない。この第1の電
極(2)に負の電圧、第2の電極(6)に正の電圧が印
加されるように電源(7)を接続する。そしてこの電源
(7)の出力をOVよりゆっくり連続して、約8Vまで
増加していった時の回路に流れる電流と電圧の関係を示
すのが第2図のグラフである。The structure is a glass substrate (1), a first electrode (2) P type a
-3i (3), type I a-5i (4), type N a-3t (
5), the second electrode (6). The present invention is not particularly limited to this structure. A power source (7) is connected so that a negative voltage is applied to the first electrode (2) and a positive voltage is applied to the second electrode (6). The graph in FIG. 2 shows the relationship between the current flowing through the circuit and the voltage when the output of the power supply (7) is increased slowly and continuously from OV to about 8V.
第2図(a)において、実線(10)は印加電圧が約5
.5v付近までは、電圧の増加に従って電流も増加して
いる。0〜1■までの抵抗値は8.6Ωと大変小さく光
電変換装置の半導体層中に短絡電流部(8)が存在する
ことが容易に想像し得る。この急に電流が流れなくなる
。以後、約8Vまで電圧を印加しても電流はほぼ一定で
ある。この時の抵抗値は、約800 Ωで0〜1vの時
に比べ90倍も抵抗が増した。これ以後、再びこの光電
変換装置に逆バイアス電圧を印加しても、第2図(b)
の実線(11)のようになり、はぼ一定の抵抗値を示し
電流が急に流れたりすることはなく、個々の光電変換装
置の特性により異なるが、8Vを印加した時最大で15
mA L、か電流が流れない。抵抗値としては500Ω
以上だった。すなわち、○■から5.5vまで電圧を加
えている間に、半導体層中の空孔あるいはピンホールに
より形成された短絡電流部にのみ電流が流れ、その短絡
電流部は焼は切れたか、または電気的に絶縁化されてし
まった為に、再び電圧を加えても異常な電流が流れるこ
とはない。In FIG. 2(a), the solid line (10) indicates that the applied voltage is approximately 5
.. Up to around 5V, the current increases as the voltage increases. The resistance value from 0 to 1 Ω is very small, 8.6Ω, and it can be easily imagined that a short circuit current portion (8) exists in the semiconductor layer of the photoelectric conversion device. Suddenly the current stops flowing. Thereafter, even if a voltage is applied up to about 8V, the current remains almost constant. The resistance value at this time was approximately 800 Ω, which was 90 times higher than when the voltage was 0 to 1 V. After this, even if a reverse bias voltage is applied to this photoelectric conversion device again, the result shown in FIG. 2(b) is
As shown by the solid line (11), the resistance value is almost constant and the current does not flow suddenly.It varies depending on the characteristics of each photoelectric conversion device, but when 8V is applied, the current is 15V at maximum.
mA L, or current does not flow. The resistance value is 500Ω
That was it. In other words, while applying a voltage from ○■ to 5.5V, current flows only to the short-circuit current portion formed by holes or pinholes in the semiconductor layer, and the short-circuit current portion is burnt out or Since it is electrically insulated, no abnormal current will flow even if voltage is applied again.
一般に、光電変換装置のようにダイオード特性を持つも
のに素子が破壊しない程度に逆バイアス電圧(RB)を
加えると、高抵抗(例えばRoとする)を示し、第1図
のように電流が流れる事はない。今、半導体層中に空孔
子はピンホールによる短絡電流部(ショート)が存在し
たとすると、その部分の抵抗値(例えばR1+R21’
−’Rnとする。)は明らかに小さく 、Re > >
RIR2・・・Rnである。この時電流は低抵抗の短絡
電流部を選択的に流れる。この空孔またはピンホールは
、半導体層形成時のほこりごみやフレーク等により発生
するものであるから、短絡電流部の面積は非常に小さい
。よってこの微少面積に電流が流れるために発熱し、局
所的に非常に高温となり短絡電流部を形成する物質が、
焼は切れる、気化蒸発する、表面が酸化する溶は出”る
等、理由は、はっきりとはしないが、結果として絶縁さ
れてしまう。この為、一度RBを行った光電変換装置は
並列抵抗が増加し開放電圧が増加することになり、エネ
ルギー変換効率の向上につかるのである。このRBを行
う際に印加する逆バイアス電圧は、不良個所に過大電流
を流しうるものであればどのような形でもよい。Generally, when a reverse bias voltage (RB) is applied to a device with diode characteristics, such as a photoelectric conversion device, to an extent that does not destroy the device, it exhibits a high resistance (say Ro) and a current flows as shown in Figure 1. There's nothing wrong. Now, if there is a short circuit current part (short) due to a pinhole in the semiconductor layer, the resistance value of that part (for example, R1 + R21'
-'Rn. ) is clearly small, Re > >
RIR2...Rn. At this time, the current selectively flows through the short circuit current section with low resistance. Since these holes or pinholes are generated by dust, flakes, etc. during the formation of the semiconductor layer, the area of the short circuit current portion is extremely small. Therefore, the current flows through this small area, which generates heat, and the material that locally becomes very hot and forms a short circuit current section.
The reasons for this are not clear, such as burnout, vaporization, oxidation of the surface, and elution, but the result is insulation.For this reason, a photoelectric conversion device that has undergone RB once has no parallel resistance. This increases the open-circuit voltage and improves the energy conversion efficiency.The reverse bias voltage applied when performing RB can be of any form as long as it can cause excessive current to flow into the defective area. But that's fine.
以下に実施例を示す。なお、本発明は実施例のみに限定
されることはない。Examples are shown below. Note that the present invention is not limited only to the examples.
実施例1゜
本実施例で用いた光電変換装置は第1図に示された物と
ほぼ同様の構造をとっている硝子基板(1)上に、IT
O−5nOzの第1の電極(2) 、 P型a−3iC
(3)I型a−5i (4) 、 N型μmC−5i
(5)を形成し、第2の電極(6)として、ITOとA
gとIllの積層電極を用いている。この光電変換装置
は集積化されておらず、素子面積は4.59cn+であ
った。RI3を行う前、この構造の光電変換装置150
個のエネルギー変換効率は3〜10χとばらつきがひど
(,7%以上の効率を持つ素子の歩留まりは30χ程度
であった。Example 1 The photoelectric conversion device used in this example is a glass substrate (1) having almost the same structure as that shown in FIG.
First electrode (2) of O-5nOz, P type a-3iC
(3) Type I a-5i (4), Type N μmC-5i
(5), and as the second electrode (6), ITO and A
A laminated electrode of g and Ill is used. This photoelectric conversion device was not integrated and had an element area of 4.59 cn+. Before performing RI3, the photoelectric conversion device 150 with this structure
The energy conversion efficiency of individual devices varies widely, ranging from 3 to 10χ (the yield of devices with an efficiency of 7% or more was about 30χ).
このようなサンプル150個に対し、第1図に示した方
法でRBを行う。すなわちP型a−5iC(3)側のI
TO,5nOz (2)に対し負の電極をN型p−C−
3i(5)側のITO−Ag−AI (6)に正の電極
を接続してゆき、電源(7)の出力を徐々に増してゆき
、本実施例では8vまで加えた。この時、第2図の 5
.5v付近のように急に電流が回路上を流れなくなる点
(RBエンドポイントという)は、3〜5v付近に多か
った。RB is performed on 150 such samples by the method shown in FIG. That is, I on the P type a-5iC (3) side
The negative electrode for TO, 5nOz (2) is N-type p-C-
A positive electrode was connected to the ITO-Ag-AI (6) on the 3i (5) side, and the output of the power source (7) was gradually increased, up to 8 V in this example. At this time, 5 in Figure 2
.. There were many points (referred to as RB end points) where the current suddenly stopped flowing on the circuit, such as around 5V, around 3 to 5V.
150個にRBを行った結果を表1.に示す。Table 1 shows the results of performing RB on 150 pieces. Shown below.
表1゜
表1.においてRshとは光電変換装置に逆バイアス電
圧をIV加えた時の抵抗値のことを示しています。Table 1゜Table 1. , Rsh indicates the resistance value when a reverse bias voltage of IV is applied to the photoelectric conversion device.
実施例2゜
本実施例で用いた光電変換装置は、第1図に示された物
と、はぼ同様の構造をとっている硝子基板(1)上にI
TO−5nOzの第1の電極(2)、P型a−5i(3
)I型a−3i (4) 、 N型a−3i (5)を
形成し、第2の電極(6)としてA1を用いている。そ
の他は実施例1とほぼ同様である。150個についてR
Bを行ったがR8前後の光電変換装置のその代表的な特
性を第5図に示す。曲線(22)はRB前の特性であり
、RB後は曲線(23)である。生データを表2に示す
。Example 2: The photoelectric conversion device used in this example is an I/O converter on a glass substrate (1) having a structure similar to that shown in FIG.
TO-5nOz first electrode (2), P-type a-5i (3
) I-type a-3i (4) and N-type a-3i (5) are formed, and A1 is used as the second electrode (6). The rest is almost the same as in Example 1. R about 150 pieces
FIG. 5 shows the typical characteristics of the photoelectric conversion device before and after R8. The curve (22) is the characteristic before RB, and the curve (23) is after RB. Raw data are shown in Table 2.
表2
このように素子としては、はとんど使用不可能な物を完
全に使用可能な素子としてリペアすることができ、さら
に1つのサンプルにRBを行い、リペアをするのに要す
る時間は、わずか10〜20秒程度であった。そして1
50個のサンプルのR8前後の特性を表3に示す。Table 2 In this way, it is possible to repair a device that is almost unusable into a completely usable device, and the time required to perform RB on one sample and repair it is: It only took about 10 to 20 seconds. and 1
Table 3 shows the characteristics of the 50 samples before and after R8.
表3
実施例3
本実施例で用いた光電変換装置は、第3図(a)に示さ
れた物とほぼ同様の構造をとっている硝子基板(12)
上に、ITO/5nOzの第1の電極(13)、P型a
−5iC(14)、 I型a−5i(14)、N型、c
r−c−Si(14)、を形成し、第2の電極(15)
として、ITOとAgとAIの積層電極を用いている。Table 3 Example 3 The photoelectric conversion device used in this example consisted of a glass substrate (12) having almost the same structure as that shown in FIG. 3(a).
On top, a first electrode (13) of ITO/5nOz, P type a
-5iC (14), type I a-5i (14), type N, c
rc-Si (14), and a second electrode (15)
As such, a laminated electrode of ITO, Ag, and AI is used.
この光電変換装置は15段に集積化されており素子面積
は69.83 cn!であった。RBを行う前この構造
の光電変換装置50個の7%以上の効率を持つ素子の歩
留まりは30χ程度であった。This photoelectric conversion device is integrated into 15 stages and has an element area of 69.83 cm! Met. Before performing RB, the yield of elements having an efficiency of 7% or more was about 30x for 50 photoelectric conversion devices of this structure.
このようなサンプル50個に対し、第3図に示した方法
でRBを行う。すなわちP型a−3ic側のITO−s
noz(13)に対し負の電極を、N型u−C−3i側
のITO−Ag−AI (15)に正の電極を各々接続
してゆき、電源(16)の出力を徐々に増してゆき本実
施例では1段の素子に対し8vまで加えた。この時、第
2図の5.5v付近のように急に電流が回路上を流れな
くなる点(RBエンドポイントという)は、4〜6V付
近に多かった。50個にRBを行った結果を表4に示す
。RB is performed on 50 such samples by the method shown in FIG. In other words, ITO-s on the P type a-3ic side
Connect the negative electrode to noz (13) and the positive electrode to ITO-Ag-AI (15) on the N-type u-C-3i side, and gradually increase the output of the power source (16). In this example, up to 8V was applied to one stage of elements. At this time, there were many points (referred to as RB end points) around 4 to 6 V where the current suddenly stopped flowing on the circuit, such as around 5.5 V in FIG. Table 4 shows the results of performing RB on 50 pieces.
表4
このようにRB後の変換効率は、非常によくなりしかも
、ばらつきが殆どなく9.5 ±5z以内に50個のサ
ンプルすべてが入っていた。Table 4 As described above, the conversion efficiency after RB was very good, and there was almost no variation, and all 50 samples were within 9.5 ±5z.
実施例4
本実施例で用いた光電変換装置は、第4図すに示された
物とほぼ同様の構造をとっている硝子基板(17)上に
MOの第1の電極(18)、 N型a−5i (19
) 、 I型a−3i(19)、 P型a−3i(19
)を形成し、第2の電極(20)としてITOを用いて
いる。その他は実施例3とほぼ同様である。50個につ
いてRBを行ったがR8前後の光電変換装置のその代表
的な特性を第6図に示す。曲線(24)はRB前の特性
であり、RB後は曲線(25)である。Example 4 The photoelectric conversion device used in this example had a first electrode (18) of MO on a glass substrate (17) having almost the same structure as that shown in FIG. Type a-5i (19
), type I a-3i (19), type P a-3i (19
), and ITO is used as the second electrode (20). The rest is almost the same as in Example 3. RB was performed on 50 photoelectric conversion devices, and the typical characteristics of photoelectric conversion devices around R8 are shown in FIG. The curve (24) is the characteristic before RB, and the curve (25) is after RB.
このサンプルの生データを表5に示す。The raw data for this sample is shown in Table 5.
表5
このようにFF(曲線因子)の特性が特に向上し変換効
率の向上に結びついている。そして50個のサンプルの
R8前後の特性を表6に示す。Table 5 As described above, the characteristics of FF (fill factor) are particularly improved, leading to an improvement in conversion efficiency. Table 6 shows the characteristics of the 50 samples before and after R8.
表6
本実施例においては、15段全部を同時にRBを行った
。このように行う際、本実施のように光電変換装置一段
ずつに各々電源を設けても、または15段全部に逆バイ
アス電圧を印加して、各段には素子が破壊しないように
回路上の工夫を行ってもよい。また15段同時にRBを
行うと、時間を短縮することが可能であり生産コストの
引き下げに有効である。Table 6 In this example, RB was performed on all 15 stages at the same time. When performing this process, it is possible to provide a power supply for each stage of the photoelectric conversion device as in this embodiment, or apply a reverse bias voltage to all 15 stages, so that each stage is provided with a power supply on the circuit to prevent the elements from being destroyed. You may try to come up with some ideas. Moreover, if RB is performed in 15 stages at the same time, it is possible to shorten the time and is effective in reducing production costs.
実施例5
実施例1と全く同じ構造のサンプルを用い、50個につ
いてRBを行った後にRB用の接続端子をはずすことな
く、すぐに光電変換装置の特性測定を行った。すなわち
サンプルのP型半導体層側の電極(2)に負の電極を、
逆にN型半導体層側の電極(6)に正の電極を接続し、
実施例1と同様の方法で光電変換装置にRBを行い、光
電変換装置のりペア及び歩留まりの向上を行った後、該
電極の接続をはずすことなく電極の極性を反転させ、光
電変換効率測定用光、本実施例ではA M 1 (10
0mW/cnりをサンプルに照射し、光電変換装置の特
性測定を行った。この際電極の極性を反転させるのは電
源上の操作で行っても回路を切り換えて行ってもよい。Example 5 Using samples with exactly the same structure as in Example 1, after performing RB on 50 samples, the characteristics of the photoelectric conversion device were immediately measured without removing the connection terminal for RB. That is, a negative electrode is attached to the electrode (2) on the P-type semiconductor layer side of the sample,
Conversely, connect the positive electrode to the electrode (6) on the N-type semiconductor layer side,
After performing RB on the photoelectric conversion device in the same manner as in Example 1 to improve the bond pair and yield of the photoelectric conversion device, the polarity of the electrode was reversed without disconnecting the electrode, and the polarity was reversed to measure the photoelectric conversion efficiency. light, in this example A M 1 (10
The sample was irradiated with 0 mW/cn, and the characteristics of the photoelectric conversion device were measured. At this time, the polarity of the electrodes may be reversed by operating the power supply or by switching the circuit.
本実施例のようにRBと特性測定を連続してほぼ同時に
行うことが出来るため、光電変換装置作成の原価を大幅
に引き下げることが可能となった。Since RB and characteristic measurements can be performed continuously and almost simultaneously as in this embodiment, it has become possible to significantly reduce the cost of producing a photoelectric conversion device.
以上実施例で示したように、本発明により従来は不良品
として処分されるような光電変換装置を十分に使用可能
なものにまでリペアすることができる。As shown in the embodiments above, according to the present invention, a photoelectric conversion device that would conventionally be discarded as a defective device can be repaired to a fully usable device.
さらに良品に対しては、製品の特性のバラツキをなくす
ることができ歩留まり率は大幅に向上した。Furthermore, for non-defective products, it was possible to eliminate variations in product characteristics, and the yield rate was significantly improved.
また一度RBを行った光電変換装置は、不良個所を完全
に修復されたために、再び特性が劣化することはなかっ
た。In addition, in the photoelectric conversion device that underwent RB once, the defective parts were completely repaired, so the characteristics did not deteriorate again.
また光電変換装置の製造が完全に終了してから行う為に
、従来の製造工程を全く変更することなく製品の歩留ま
りを向上させることができる。Furthermore, since the process is carried out after the manufacturing of the photoelectric conversion device is completely completed, the yield of the product can be improved without changing the conventional manufacturing process at all.
本発明により光電変換装置の並列抵抗成分が増すために
、集積化した光電変換装置の場合、特にFFの改善につ
ながり変換効率が向上する。According to the present invention, since the parallel resistance component of the photoelectric conversion device is increased, in the case of an integrated photoelectric conversion device, the FF is particularly improved and the conversion efficiency is improved.
また集積化構造の場合、各段間時にRBを行う事が出来
るためRB工程の所要時間は単一構造の場合と全く同じ
であるという特徴を有する。またRB工程と光電変換装
置の特性測定工程を同時に行うことが可能な為、生産コ
ストを低くすることが可能となります。Furthermore, in the case of an integrated structure, since RB can be performed between each stage, the time required for the RB process is exactly the same as in the case of a single structure. Additionally, since the RB process and the photoelectric conversion device characteristic measurement process can be performed simultaneously, production costs can be reduced.
本発明は実施例のみに限定されるものではなく、幅広い
構造の素子に対し応用可能である。The present invention is not limited to the embodiments, but can be applied to elements with a wide range of structures.
第1図は本発明の概略を示す図である。
第2図は本発明のR8前後で逆バイアスを加えた時、光
電変換装置に流れる電流値を示す。
第3図は集積化した光電変換装置の場合の本発明の概略
図を示す。
第4図はRBの終了点の最大の電流電圧を示すグラフで
ある。
第5図及び第6図はR8前後での光電変換装置の特性を
しめす。FIG. 1 is a diagram showing an outline of the present invention. FIG. 2 shows the current value flowing through the photoelectric conversion device when a reverse bias is applied before and after R8 of the present invention. FIG. 3 shows a schematic diagram of the invention in the case of an integrated photoelectric conversion device. FIG. 4 is a graph showing the maximum current voltage at the end point of RB. FIG. 5 and FIG. 6 show the characteristics of the photoelectric conversion device before and after R8.
Claims (1)
有し、該光電変換領域を電気的に直列接続されたPIN
またはNIP接合を少なくとも1つ以上有する非単結晶
半導体層を有する光電変換装置の作成方法であって、個
々の光電変換領域の非単結晶半導体層の両端に逆バイア
ス電圧を加え、非単結晶半導体層の不良個所を複数の光
電変換領域全部を同時に修復する工程とを有することを
特徴とする光電変換装置作製方法。 2、特許請求の範囲第1項において、前記修復工程終了
後の個々の光電変換領域に逆バイアス電圧8Vを加えて
も15mA以上の電流が流れないことを特徴とする光電
変換装置作成方法。[Claims] 1. A PIN having a plurality of photoelectric conversion regions on a substrate having a conductive surface, and electrically connecting the photoelectric conversion regions in series.
Alternatively, a method for producing a photoelectric conversion device having a non-single-crystal semiconductor layer having at least one NIP junction, wherein a reverse bias voltage is applied to both ends of the non-single-crystal semiconductor layer of each photoelectric conversion region, and the non-single-crystal semiconductor layer is 1. A method for manufacturing a photoelectric conversion device, comprising the step of simultaneously repairing a defective portion of a layer in all of a plurality of photoelectric conversion regions. 2. The method of manufacturing a photoelectric conversion device according to claim 1, wherein a current of 15 mA or more does not flow even if a reverse bias voltage of 8 V is applied to each photoelectric conversion region after the repair step is completed.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61017428A JPS62176173A (en) | 1986-01-29 | 1986-01-29 | Manufacture of photoelectric conversion device |
US07/007,780 US4806496A (en) | 1986-01-29 | 1987-01-28 | Method for manufacturing photoelectric conversion devices |
AU68050/87A AU580903B2 (en) | 1986-01-29 | 1987-01-28 | Method for manufacturing photoelectric conversion devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61017428A JPS62176173A (en) | 1986-01-29 | 1986-01-29 | Manufacture of photoelectric conversion device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62176173A true JPS62176173A (en) | 1987-08-01 |
Family
ID=11943743
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61017428A Pending JPS62176173A (en) | 1986-01-29 | 1986-01-29 | Manufacture of photoelectric conversion device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62176173A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6388869A (en) * | 1986-10-01 | 1988-04-19 | Kanegafuchi Chem Ind Co Ltd | Method for eliminating pinhole in amorphous solar cell |
US7417264B2 (en) * | 2003-12-22 | 2008-08-26 | Samsung Electronics Co., Ltd. | Top-emitting nitride-based light emitting device and method of manufacturing the same |
WO2009101857A1 (en) | 2008-02-13 | 2009-08-20 | Sharp Kabushiki Kaisha | Method and apparatus for manufacturing thin film photoelectric conversion module |
JP2009206364A (en) * | 2008-02-28 | 2009-09-10 | Sharp Corp | Method and apparatus of manufacturing thin-film photoelectric conversion module |
US8134111B2 (en) | 2006-10-03 | 2012-03-13 | Sharp Kabushiki Kaisha | Reverse bias processing apparatus and reverse bias processing method for photoelectric conversion devices |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4166918A (en) * | 1978-07-19 | 1979-09-04 | Rca Corporation | Method of removing the effects of electrical shorts and shunts created during the fabrication process of a solar cell |
-
1986
- 1986-01-29 JP JP61017428A patent/JPS62176173A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4166918A (en) * | 1978-07-19 | 1979-09-04 | Rca Corporation | Method of removing the effects of electrical shorts and shunts created during the fabrication process of a solar cell |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6388869A (en) * | 1986-10-01 | 1988-04-19 | Kanegafuchi Chem Ind Co Ltd | Method for eliminating pinhole in amorphous solar cell |
JPH0553309B2 (en) * | 1986-10-01 | 1993-08-09 | Kanegafuchi Chemical Ind | |
US7417264B2 (en) * | 2003-12-22 | 2008-08-26 | Samsung Electronics Co., Ltd. | Top-emitting nitride-based light emitting device and method of manufacturing the same |
US7666693B2 (en) | 2003-12-22 | 2010-02-23 | Samsung Electronics Co., Ltd. | Top-emitting nitride-based light emitting device and method of manufacturing the same |
US8134111B2 (en) | 2006-10-03 | 2012-03-13 | Sharp Kabushiki Kaisha | Reverse bias processing apparatus and reverse bias processing method for photoelectric conversion devices |
WO2009101857A1 (en) | 2008-02-13 | 2009-08-20 | Sharp Kabushiki Kaisha | Method and apparatus for manufacturing thin film photoelectric conversion module |
JP2009194082A (en) * | 2008-02-13 | 2009-08-27 | Sharp Corp | Method and apparatus for manufacturing thin film photoelectric conversion module |
US8679862B2 (en) | 2008-02-13 | 2014-03-25 | Sharp Kabushiki Kaisha | Method and device for manufacturing thin film photoelectric conversion module |
JP2009206364A (en) * | 2008-02-28 | 2009-09-10 | Sharp Corp | Method and apparatus of manufacturing thin-film photoelectric conversion module |
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