JPS62173658A - Resetting circuit - Google Patents

Abstract

PURPOSE:To prevent occurrence of abnormal state of apparatus without requiring complicated operation by resetting a submicrocomputer by a main microcomputer when a safety code becomes discordant with specified data. CONSTITUTION:Responding to a safety code CS outputted to a main microcomputer 3, the main microcomputer 3 resets a submicrocomputer 4. Thus, resetting operation can be made only when the submicrocomputer 4 is making malfunction responding to the safety code CS. Thereby, a resetting circuit that can reduce frequency of complex operation after reset operation.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a reset circuit, and is particularly applicable to devices having multiple microcomputers that transfer data between each other, such as a video tape recorder (VTR). .

B. Summary of the Invention The present invention provides a reset circuit for a microcomputer that resets the sub-microcomputer when a safety code output from the sub-microcomputer to the main microcomputer as needed no longer matches predetermined data. By resetting using the main microcomputer, it is possible to easily obtain a reset circuit that can prevent the occurrence of abnormal conditions in equipment without requiring complicated operations.

C. Conventional Technology Conventionally, for example, in a VTR, in addition to a main microcomputer that controls the main unit of the VTR including a tape drive mechanism, a sub-microcomputer with a date timer function is provided, and this sub-microcomputer displays the date. At the same time, by transferring data to and from the main microcomputer, clock functions such as a reservation timer are realized.

This type of sub-microcomputer maintains the clock function even when the main microcomputer does not supply power to the VTR body.
Main power supply (usually taken from commercial power supply)
Separately, power is supplied from a backup power source (for example, a battery).

In devices with multiple microcomputers like this, when turning on the power to each microcomputer, it is necessary to reset all the microcomputers to a predetermined initial operating state, and even one of them is not reset. If there is a microcomputer, there is a risk that the equipment will malfunction and, in some cases, be damaged.

To solve this problem, in conventional microcomputers, in order to prevent malfunctions when the power is turned on, the reset terminals of all microcomputers are forcibly brought down to the O potential when the power is turned on, and then the reset terminals are set to a predetermined voltage. An external reset circuit is provided for startup.

D Problems to be Solved by the Invention However, with this configuration, an external reset circuit must be provided for each microcomputer, resulting in the problem that the overall configuration of the device becomes complicated. .

Furthermore, in order to reduce the capacity of the backup power supply, a method may be considered in which when the main microcomputer is turned on, the power supply to the sub-microcomputer is switched from the backup power supply to the main power supply. However, when this method is used, there is a risk that a sub-microcomputer that is already in operation may malfunction when the power source is switched. For this reason, if the sub-microcomputer is reset by an external reset circuit as in the prior art, a complicated operation is required to reset the current time etc. in the sub-microcomputer each time the power is turned on.

The present invention has been made in consideration of the above points, and proposes a reset circuit with a simple configuration that can reliably perform a reset operation when a malfunction occurs in a microcomputer while reducing such complicated operations as much as possible. This is what I am trying to do.

E Means for Solving Problems In order to solve these problems, the present invention provides a main microcomputer 3 and a subsystem which transmits and receives data between the main microcomputer 3 and which is reset by the main microcomputer 3. The main microcomputer 3 sets the sub-microcomputer 4 according to a safety code C3 outputted from the sub-microcomputer 4.

F action The main microcomputer 3 resets the sub microcomputer 4 in response to the safety code C8 output to the main microcomputer 3.

In this way, since the reset operation can be performed only when the sub-microcomputer 4 is malfunctioning in accordance with the safety code C8, it is possible to realize a reset circuit that can reduce the frequency of complicated operations after the reset operation. can.

G example An embodiment of the present invention will be described in detail below with reference to the drawings.

In FIG. 1, reference numeral 1 denotes a video information recording/reproducing device (hereinafter referred to as a video deck) which includes a video camera section 2 as a whole and is controlled by a main microcomputer 3 and a sub microcomputer 4. As shown in FIG.

When the main power switch circuit 5 is off, the backup power supply 6 supplies power to the sub-microcomputer 4 via the diode 7. On the other hand, when the main power switch circuit 5 is in the on state, the main power supply 8 instead of the backup power supply 6 supplies power to the sub-microcomputer 4 via the diode 9, and also supplies power to the sub-microcomputer 4 via the diode 9. , video deck drive circuit 10
and supplies power to the liquid crystal display circuit 11.

Therefore, the main microcomputer 3 operates together with the video deck drive circuit 10, the video camera unit 2, and the liquid crystal display circuit 11 only when the switch circuit 5 is in the on state (hereinafter referred to as the operating mode), and the sub microcomputer 4 operates as the main power switch. It operates whether the circuit 5 is on or off.

Furthermore, when the main power switch circuit 5 is turned on, the reset circuit 12 outputs a reset signal R3Tl that once falls to 0 [■] and then rises to a predetermined voltage to the reset terminal of the main microcomputer 3. At this time, the main microcomputer 3 receives the reset signal R3Tl.
is reset to the initial operating state.

When entering the operation mode, the main microcomputer 3 receives data D output from the sub microcomputer 4.
In response to A, a control signal DC is output to the data bus 32, and the video deck drive circuit 10 and video camera unit 2 are driven and controlled based on the control signal. Furthermore, the video deck drive circuit 10 and the video camera section 2 are connected to a data bus 3.
For example, the main microcomputer 3 outputs each sensor information such as the count value of the tape counter and the dew condensation sensor to the main microcomputer 2, and the main microcomputer 3 outputs this information to the sub-microcomputer 4 as a data DB as necessary.

Such data transmission and reception between the microcomputers 3 and 4 is carried out using, for example, three words of data DA and DB consisting of one 8-bit word as shown in FIG.

Of these, the data DA transferred from the main microcomputer 3 to the sub-microcomputer 4 includes information outputted from the video deck drive circuit 10 and the video camera section 2 (for example, information on the dew condensation sensor and the end of the cassette tape) in the first word W1. information fg) is assigned. Further, the data of the count value of the tape counter obtained from the video deck drive circuit 10 is assigned to the second word W2. Furthermore, the operating status of the video deck (
For example, information about recording, fast forwarding, pausing, etc.) is assigned.

Conversely, the data DB transferred from the sub-microcomputer 4 to the main microcomputer 3 is the first word W.
The specification of the video deck l, that is, the identification jrrtfi representing the video signal format such as NTSC system or PAL system, and the slide switch (
For example, a position error representing the slide position of the erroneous t1 image prevention switch 21 or the tape running speed changeover switch 22) is assigned. Further, operation information indicating the on or off state of the tact switch of the operator 15 (eg, recording start switch 25, fast forward switch 26, playback start switch 27) is assigned to the second word W2.

In addition to this, the third word W3 includes a random access memory (
A safety code C8 consisting of the contents of a predetermined location in RAM) 17 is assigned. This safety code C
3 stores specific data in a predetermined location of the RAM 17 after the sub-microcomputer 4 performs an initialization operation.
For example, the main microcomputer 3 determines whether or not the safety code C3 is predetermined data, that is, rAAJ, each time the data DB is output from the sub-microcomputer 4. do.

If safety code C8 is data rAAJ,
It can be determined that the contents of the RAM 17 of the sub-microcomputer 4 are normal values, and it can be determined that the sub-microcomputer 4 is also operating normally.

On the contrary, safety code cs is data "AA"
If not, it indicates that an abnormality has occurred in the contents of the RAM 17, and the sub-microcomputer 4 can be determined to be malfunctioning.

Therefore, if the safety code C3 does not match the data rAAJ, the main microcomputer 3 immediately lowers the voltage at the reset terminal of the sub microcomputer 4 to 0 [■] and then resets it to a predetermined voltage. A signal RST2 is applied to reset the sub-microcomputer 4 to its initial state.

In contrast, the safety code C3 is the data rAAJ.
If they match, the main microcomputer 3 continues the control operation without relaying it based on the data DB information obtained from the sub-microcomputer 4.

On the other hand, when the switch circuit 5 is turned off or turned on, the sub-microcomputer 4 increments the value of an internal counter provided inside and counts the current time and date (hereinafter referred to as a clock). (referred to as "operation"), and read-only memory (ROM
) configuration character generator 16 display information DLC
D is output to the liquid crystal display circuit 11 (hereinafter referred to as display output operation), and the data buses 30 and 31 are monitored.

Each line of the data bus 31 is provided with a slide switch 21, 22, a tact switch 25, etc. of the operator 15, for example.
A clock set switch 29 is connected together with 26 and 27, and when the user operates the position switch of the slide switch 21.22 or turns on the tact switch 25, 26, 27 and the clock set switch 29,
The logic level of each line of the data bus 31 connected thereto is changed.

Furthermore, the sub-microcomputer 4 monitors the data bus 31, and when a change occurs in the line of the data bus 31 connected to the clock set switch 29, it increments the value of the counter to calibrate the time and date. Slide switch 21.22 and Hitaku switch 25.2
When a change occurs in the line of the data bus 31 connected to 6.27, information on this change is stored in the RAM 17 (hereinafter, these are referred to as key scan operations).

The information of the slide switches 21, 22 and tact switches 25, 26, 27 stored in the RAM 17 is output to the data bus 30 as a data DB at a predetermined timing when the main microcomputer 3 is activated.

That is, when the sub-microcomputer 4 receives the reset signal RST2, it executes the step SPI shown in FIG.
The program moves to the initial state, enters the safety code judgment processing program, initializes the contents of the RAM 17 and the counter in step SP2, and then moves to step SP3. The sub microcomputer 4 performs this step SI.
After writing the data rAAJ as safety code C8 to a predetermined address of the RAM 17 at '3, the process moves to step SP4 and a key scan operation is performed.

In the following step SP5, the sub-microcomputer 4 writes the RAM written in the above-mentioned step SP3.
It is checked whether the contents of the safety code C8 of No. 17 still match the data rAAJ at the time of writing.

If a positive result is obtained here, the sub-microcomputer 4 moves to step SP6, executes a clock operation and a display output operation, and then moves to step SP7. In this step SP7, the sub microcomputer 4 monitors the data bus 30, and when the main microcomputer 3 is operating, the sub microcomputer 4 monitors the data bus 30.
After transmitting and receiving data DA and DB, step S
Move to P8. This step SP8 is a step to confirm whether or not the content of the safety code C8 in the RAM 17 written in the above-mentioned step SP3 matches the data "AA" at the time of writing, and an affirmative result is obtained here. After returning to the above-mentioned SP4 and performing the key scan operation of step SP4 again, step 5P5-5P6-3
P? - Repeat the processing of the steady operation loop LOOPI of 5P8-3P4.

If a negative result is obtained in step SP5 during the processing of this loop LOOPI, this means that an error has occurred in the contents of the RAM 17 of the sub-microcomputer 4, and at this time, the sub-microcomputer 4 The process returns to and executes the process of initializing the contents of the RAM 17 and internal counters again.

Similarly, if a negative result is obtained in step SP8,
The sub-microcomputer 4 returns to step SP2 described above and executes processing to initialize the contents of the RAM 17 and internal counters.

In the above configuration, the sub-microcomputer 4
When the switch circuit 5 is in the off state, the backup power supply 6 performs step 5P4-3P5-S shown in FIG.
F3-3P? - Loop LOOP consisting of 5P8-5P4
lRepeat the steady operation process.

In this state, due to the influence of external noise etc., RAM
If an error occurs in the contents of 17, the sub-microcomputer 4 determines this in step SP5 or Se2, moves to step SP2, initializes the contents of the RAM 17 and the internal counter, and then executes the loop L00PI via step SP3. Operates to return to steady processing state.

In this operating state, when the user turns on the main power switch circuit 5, the main microcomputer 3,
Power is supplied to the video deck drive circuit IO, video camera section 2, and liquid crystal display circuit 11, and the sub-microcomputer 4 is supplied with a main power supply 8 instead of the backup power supply 6.

When this main power is input, the main microcomputer 3
After being reset by the reset signal R3T1 of the reset circuit 12, the sub-microcomputer 4
Based on the contents of step SP7, the data DB to be output at the timing of step SP7 is awaited. Eventually, in step SP7, when the sub-microcomputer 4 outputs the data DB, the main microcomputer 3 determines whether the safety code C3 of the third word W3 of this data DB is the data rAAJ.

Here, if the sub-microcomputer 4 malfunctions due to the main power switch circuit 5 turning on, the safety code C8 of the data DB is the data rAA.
It should have changed to data different from J. Therefore, the main microcomputer 3 has a safety code C8.
When the data "AA" is not lost, the sub microcomputer 4 immediately outputs the reset signal RST2.
Control THt to return to SPI from step SI'8
,,Thus, the RAM 17 of the sub-microcomputer 4
and initialize the contents of the internal counter.

In contrast, the safety code C8 is the data rAAJ.
When the main microcomputer 4 is defeated, the main microcomputer 4 uses the first and second words Wl and W2 of the data DB to
In the standby mode, a control signal DC is output to the video deck drive circuit 10 and video camera unit 2 which are in the standby state to drive and control them.

Further, the main microcomputer 3 outputs data DA to the sub-microcomputer 4 based on information output from the video deck drive circuit 10 and the video camera section 2. At this time, after receiving this data DA, the sub-microcomputer 4 updates the contents of a predetermined location in the RAM 17 based on the data DA, and performs a display output operation in step SP6 as necessary.

In addition, the sub microcomputer 4 is connected to the loop L00PI.
When executing steady processing via step SP
4, the current user operation is detected by performing a key scan operation, and if the user turns on the recording start switch 25, for example, the sub-microcomputer 4 transfers information of the operation to changes in the data bus 31. After storing it in the RAM 17 as information of
7, the data DB is sent to the main microcomputer 3.
Output as . At this time, the main microcomputer 3 changes the safety code C5 of the data DB to the data rA.
A control signal DC is output on the condition that it matches AJ, and thus the video deck 1 starts the recording operation.

According to the embodiment described above, by checking the data DB output from the sub-microcomputer 4 by the main microcomputer 3, the corresponding microcomputer 4 can be reset only when the sub-microcomputer 4 malfunctions. Because it is possible to
Previously, the time when the user inputted 1fB was done each time,
It is possible to obtain a reset circuit with a simple configuration that can significantly reduce the frequency of calibration operations for dates and the like.

Further, according to the embodiment described above, even if the backup power 1fIX6 is not constantly supplied as a power source for the sub-microcomputer 4, when the main power switch circuit 5 is turned on, the main power 8
Since the backup power source 6 can be of a smaller capacity and lighter in size than conventional ones, the video deck 1 as a whole can be made smaller and lighter.

Further, according to the above-described embodiment, the sub-microcomputer 4 can check its own memory contents using the self-check function, so even when the main power switch circuit 5 is not turned on, the sub-microcomputer 4 will not malfunction. If this occurs, it can be quickly prevented, and the risk of equipment damage due to malfunction of the sub-microcomputer 4 can be prevented.

In the above-described embodiment, the data DA and DB sent and received between the main microcomputer 3 and the sub-microcomputer 4 are three words of data each consisting of one 8-bit word. Although the case has been described in which data rAAJ is added to 3 words W3 as safety code C3, the present invention is not limited to this, and the present invention is not limited to this. The contents (ie, data rAAJ), etc. can be changed as necessary. For example, the same effect as described above can be obtained by adding a safety code "99" to the I-th word of data consisting of 4 bits and 5 words.

Further, instead of adding a safety code to the data DB output from the sub-microcomputer 4 each time, the safety code may be outputted every once or every time, for example. The structure of the data can be changed in various ways, such as alternately outputting two different types of codes as safety codes each time.

Furthermore, in the present invention, a case has been described in which the present invention is applied to a VTR provided with one main microcomputer and one sub microcomputer. The present invention can also be applied to cases where a sub-microcomputer is used, and the present invention can be widely applied not only to VTRs but also to devices having a control system that is controlled in a unified manner as a whole using a plurality of microcomputers.

H Effects of the Invention As described above, according to the present invention, in a device that is uniformly controlled by a plurality of microcomputers, when one of the microcomputers malfunctions, a reset operation is performed in response to the malfunction. As a result, it is possible to reduce the frequency of complicated operations performed for each reset operation as in the conventional configuration, and it is possible to easily obtain a reset circuit that can efficiently reset the device.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a route diagram showing data sent and received between the main and sub-microcomputers, and Fig. 3 is a flowchart for explaining the operation of the sub-microcomputer. . 1...Video deck, 2...Video camera section, 3.4...Microcomputer, 5
... Switch circuit, 6 ... Backup power supply, 8 ... Main power supply, 30.31.32 ...
...Data bus. Sheep l Diagram Data DA and DB configuration Good 2 Diagram Bua Microcomputing flowchart Tea 3 Diagram

Claims (2)

[Claims] (1) A main microcomputer, and a sub-microcomputer that transmits and receives data to and from the main microcomputer and is reset by the main microcomputer, and is equipped with a safety system that outputs data from the sub-microcomputer. A reset circuit characterized in that the sub microcomputer is reset by the main microcomputer according to a code. (2) The reset circuit according to claim 1, wherein the sub-microcomputer is reset in response to a safety code generated internally.