JPS62151674U - - Google Patents
Info
- Publication number
- JPS62151674U JPS62151674U JP3776486U JP3776486U JPS62151674U JP S62151674 U JPS62151674 U JP S62151674U JP 3776486 U JP3776486 U JP 3776486U JP 3776486 U JP3776486 U JP 3776486U JP S62151674 U JPS62151674 U JP S62151674U
- Authority
- JP
- Japan
- Prior art keywords
- input
- signals
- processing unit
- central processing
- ram
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Control Of Vending Devices And Auxiliary Devices For Vending Devices (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Description
第1図は本考案の回路構成を示した制御ブロツ
ク図、第2図は本考案のRAM書き込みシーケン
スのフローチヤート、第3図は本考案のタイムチ
ヤートである。
1……マイクロコンピユータ、2……RAM、
3……入出力コントローラ、4……プログラマブ
ルセレクタ、5……データ書き込み制御回路、6
……データ書き込み信号、7……データバス、8
……アドレスバス。
FIG. 1 is a control block diagram showing the circuit configuration of the present invention, FIG. 2 is a flow chart of the RAM write sequence of the present invention, and FIG. 3 is a time chart of the present invention. 1...Microcomputer, 2...RAM,
3... Input/output controller, 4... Programmable selector, 5... Data write control circuit, 6
...Data write signal, 7...Data bus, 8
...address bus.
Claims (1)
M2と該中央処理装置1からの制御信号を受け、
入出力のコントロール信号を送出する入出力コン
トローラ3と、前記中央処理装置1の制御手段に
よるポート信号を受け、入出力回路及び動作を決
定し、指示信号を送出するプログラマブルセレク
タ4と、通常RAM2を書き込み禁止状態にし、
前記入出力コントローラ3及びプログラマブルセ
レクタ4からの制御信号により、RAM2にデー
タ書き込み信号6を送出するデータ書き込み制御
回路5とを有し、RAM2にデータを書き込む処
理の制御を、データ書き込み制御回路5で行うこ
とを特徴とする自動販売機の制御装置。 Microcomputer central processing unit 1 and RA
receiving control signals from M2 and the central processing unit 1;
An input/output controller 3 that sends input/output control signals, a programmable selector 4 that receives port signals from the control means of the central processing unit 1, determines input/output circuits and operations, and sends out instruction signals, and a normal RAM 2. Make it write-protected,
It has a data write control circuit 5 that sends a data write signal 6 to the RAM 2 according to control signals from the input/output controller 3 and the programmable selector 4, and the data write control circuit 5 controls the process of writing data to the RAM 2. A control device for a vending machine characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986037764U JPH0716190Y2 (en) | 1986-03-15 | 1986-03-15 | Vending machine controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986037764U JPH0716190Y2 (en) | 1986-03-15 | 1986-03-15 | Vending machine controller |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62151674U true JPS62151674U (en) | 1987-09-25 |
JPH0716190Y2 JPH0716190Y2 (en) | 1995-04-12 |
Family
ID=30849382
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986037764U Expired - Lifetime JPH0716190Y2 (en) | 1986-03-15 | 1986-03-15 | Vending machine controller |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0716190Y2 (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5717060A (en) * | 1980-07-04 | 1982-01-28 | Nec Corp | Information processor |
JPS60239850A (en) * | 1984-05-14 | 1985-11-28 | Fuji Xerox Co Ltd | Microprocessor system provided with no-break memory |
-
1986
- 1986-03-15 JP JP1986037764U patent/JPH0716190Y2/en not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5717060A (en) * | 1980-07-04 | 1982-01-28 | Nec Corp | Information processor |
JPS60239850A (en) * | 1984-05-14 | 1985-11-28 | Fuji Xerox Co Ltd | Microprocessor system provided with no-break memory |
Also Published As
Publication number | Publication date |
---|---|
JPH0716190Y2 (en) | 1995-04-12 |
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