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JPS62134957A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS62134957A
JPS62134957A JP27645885A JP27645885A JPS62134957A JP S62134957 A JPS62134957 A JP S62134957A JP 27645885 A JP27645885 A JP 27645885A JP 27645885 A JP27645885 A JP 27645885A JP S62134957 A JPS62134957 A JP S62134957A
Authority
JP
Japan
Prior art keywords
substrate
semiconductor device
bonded
wiring portion
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27645885A
Other languages
Japanese (ja)
Inventor
Atsushi Maruyama
篤 丸山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP27645885A priority Critical patent/JPS62134957A/en
Publication of JPS62134957A publication Critical patent/JPS62134957A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

PURPOSE:To reduce the cost of a semiconductor device and the size of an electronic device by not bonding a part of a wiring conductor plate to be bonded on an insulating substrate of the semiconductor device to a substrate, and placing it above the substrate by ending to reduce the substrate area for placing a semiconductor element, i.e., the occupying area of the semiconductor device. CONSTITUTION:A wiring pattern having a chip supporting region 11 and a wiring portion 12 is formed of a copper plate 1 on a ceramic substrate 2, electrodes on the chip are connected by aluminum wirings 7 with the wiring portion 12, a laid wiring portion 4 is not bonded to the substrate 2, and extended from the substrate 2. The not bonded wiring portion 4 is erected as shown. Thus, the occupying area of this semiconductor device is reduced by an area for bonding the wiring portion 4.

Description

【発明の詳細な説明】[Detailed description of the invention] 【発明の属する技術分野】[Technical field to which the invention pertains]

本発明は、絶&!基板上に接着された金属板が配線導体
を形成し、その配&!導体の所定の領域に半導体素体が
搭載される半導体装置に関する。 °
This invention is absolutely &! A metal plate glued onto the board forms the wiring conductor, and its distribution &! The present invention relates to a semiconductor device in which a semiconductor element is mounted in a predetermined region of a conductor. °

【従来技術とその問題点】[Prior art and its problems]

例えば複数のパワートランジスタからなる半導体装置を
構成する場合、従来は金属基板上にトランジスタ素体を
固定し、トランジスタの電極と、同様に基板上に絶縁板
を介して固定された端子導体とを導線で接続していた。 しかし最近、例えば0.3鶴の厚さの銅板をセラミック
板上に反応接合または接着剤により接着して配線パター
ンを形成し、配線パターンの一部の領域にトランジスタ
素体を固定する構造が開発されている。第2図はそのよ
うな半導体装置に用いる基板を示し、セラミック基板2
の上に種々の形状の銅板1が接着されている。しかしこ
のような基板においては、例えば端子3を一端に形成す
るため、長い配線部4を引きまわさなければならない場
合が生ずる。このような配線部4の占める面積は軽視で
きず、そのため絶縁基板2の寸法が大きくなる。
For example, when configuring a semiconductor device consisting of multiple power transistors, conventionally the transistor element body is fixed on a metal substrate, and the electrodes of the transistors and the terminal conductor, which is also fixed on the substrate via an insulating plate, are connected using conductive wires. It was connected with. However, recently, a structure has been developed in which a copper plate with a thickness of, for example, 0.3 mm is bonded onto a ceramic plate by reaction bonding or adhesive to form a wiring pattern, and a transistor element is fixed in a part of the wiring pattern. has been done. FIG. 2 shows a substrate used for such a semiconductor device, and a ceramic substrate 2
Copper plates 1 of various shapes are bonded on top. However, in such a board, since the terminal 3 is formed at one end, for example, a long wiring portion 4 may have to be routed. The area occupied by such a wiring section 4 cannot be underestimated, and therefore the dimensions of the insulating substrate 2 become large.

【発明の目的】[Purpose of the invention]

本発明は、上述の欠点を除去し、半導体素体搭載用基板
の寸法を小さくして安価にできる半導体装置を提供する
ことを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and to provide a semiconductor device that can be made inexpensive by reducing the size of a substrate for mounting a semiconductor element.

【発明の要点】[Key points of the invention]

本発明による半導体装置は、絶縁基板上に接着された配
線導体用金属板が基板面から上方に離れた金属板部分に
連続していることにより、この部分を支持するための絶
縁基板面積が節約できるため基板寸法が小さくなって上
記の目的が達成される。
In the semiconductor device according to the present invention, the wiring conductor metal plate bonded on the insulating substrate is continuous with the metal plate part upwardly separated from the substrate surface, so that the area of the insulating substrate for supporting this part is saved. As a result, the substrate size can be reduced and the above objective can be achieved.

【発明の実施例】[Embodiments of the invention]

第1図は本発明の一実施例を示し、二つのトランジスタ
チップ5と二つのダイオードチップ6を搭載する基板は
第3図に示すようなもので、第2図の場□合と同様にセ
ラミック基板2の上にチップ支持領域11と配線部12
を有する配線パターンが銅板1によって形成されており
、チップ上の電極と配線部12がアルミニウム&917
で接続されている。 しかし第2図の場合と異なり引きまわし配線部4は基板
2に接着されておらず、基板2からはみ出している。こ
の接着されていない配線部4を第1図のように立ててお
く、これによりこの半導体装置の占有面積は第2図の基
板を使用した場合に比し引きまわし配線部4接着のため
の面積だけ小さくなる。 銅板1が第4図に示すように絶縁基板2の縁部21まで
接着されると、絶縁基板2の縁部での銅板1とこの半導
体装置の支持面との間の絶縁鉛面距離が小さくなるので
、第1図に示すように絶縁基板の縁部21より引き込ん
だ所で配線部4を立ち上がらせることが望ましい。その
ためには、絶![板2の縁部付近に銅板の接着の際に絶
縁基板上に接着を阻害する材料を付着させておくことが
を効である。しかし第5図に示したように、予め段付加
工を施した銅板1を接着してもよい。 【発明の効果] 本発明によれば、半導体装置の絶縁基板上に接着される
配線導体板の一部を基板に接着しないでおき、折り曲げ
により基板上方に置くことにより、半導体素体搭載用基
板面積、すなわち半導体装置の占有面を小さくでき、半
導体装置の価格低減。 電子装置の小形化に役立つ、あるいは同一基板面積で大
きな寸法の半導体素体を搭載できるので、半導体装置の
特性向上にも効果がある。さらに組立工程中においては
、配線導体の一部が絶縁基板からはみ出していることに
より、基板の方向性が明確になり、基板を治具に挿入す
る際方向を誤ることがないなど、半導体装置組立工程の
容易化にも有効である。
FIG. 1 shows an embodiment of the present invention, and the substrate on which two transistor chips 5 and two diode chips 6 are mounted is as shown in FIG. A chip support area 11 and a wiring section 12 are provided on the substrate 2.
A wiring pattern having
connected with. However, unlike the case shown in FIG. 2, the routing wiring section 4 is not bonded to the substrate 2 and protrudes from the substrate 2. This unbonded wiring section 4 is stood up as shown in FIG. 1, so that the area occupied by this semiconductor device is smaller than the area for gluing the wiring section 4, compared to the case where the substrate shown in FIG. 2 is used. becomes smaller. When the copper plate 1 is bonded to the edge 21 of the insulating substrate 2 as shown in FIG. 4, the distance between the insulating lead surface between the copper plate 1 and the support surface of this semiconductor device at the edge of the insulating substrate 2 is small. Therefore, as shown in FIG. 1, it is desirable to make the wiring section 4 stand up at a point where it is retracted from the edge 21 of the insulating substrate. For that purpose, absolutely! [It is effective to attach a material that inhibits adhesion to the insulating substrate near the edge of the plate 2 when adhering the copper plate. However, as shown in FIG. 5, a stepped copper plate 1 may be bonded. Effects of the Invention According to the present invention, a part of the wiring conductor plate to be bonded on the insulating substrate of the semiconductor device is not bonded to the substrate, and by bending and placing it above the substrate, The area, that is, the area occupied by the semiconductor device can be reduced, and the price of the semiconductor device can be reduced. It is useful for downsizing electronic devices, and it is also effective in improving the characteristics of semiconductor devices because a large-sized semiconductor body can be mounted on the same substrate area. Furthermore, during the assembly process, part of the wiring conductor protrudes from the insulating substrate, which makes the direction of the board clear and prevents the board from being inserted into the jig in the wrong direction. It is also effective in making the process easier.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す斜視図、第2図は従来
の半導体素体搭載用基板の斜視図、第3図は第1図の半
導体装置に用いる基板の斜視図、第4図は本発明実施の
際の留意点を示す斜視図、第5図は本発明の別の実施例
の要部を示す斜視図である。 1:w4板、2:セラミック基板、4:引きまわ第2図
FIG. 1 is a perspective view showing an embodiment of the present invention, FIG. 2 is a perspective view of a conventional substrate for mounting a semiconductor element, FIG. 3 is a perspective view of a substrate used in the semiconductor device of FIG. The figure is a perspective view showing points to be noted when implementing the present invention, and FIG. 5 is a perspective view showing main parts of another embodiment of the present invention. 1: W4 board, 2: Ceramic board, 4: Pulling figure 2

Claims (1)

【特許請求の範囲】[Claims] 1)絶縁基板上に接着された金属板が配線導体を形成し
、該配線導体の所定の領域に半導体素体が搭載されるも
のにおいて、配線導体用金属板が絶縁基板面から上方に
離れた金属板部分に連続していることを特徴とする半導
体装置。
1) In a device in which a metal plate bonded on an insulating substrate forms a wiring conductor and a semiconductor element is mounted in a predetermined area of the wiring conductor, the metal plate for the wiring conductor is separated upward from the surface of the insulating substrate. A semiconductor device characterized by being continuous with a metal plate part.
JP27645885A 1985-12-09 1985-12-09 Semiconductor device Pending JPS62134957A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27645885A JPS62134957A (en) 1985-12-09 1985-12-09 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27645885A JPS62134957A (en) 1985-12-09 1985-12-09 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS62134957A true JPS62134957A (en) 1987-06-18

Family

ID=17569718

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27645885A Pending JPS62134957A (en) 1985-12-09 1985-12-09 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS62134957A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5906136A (en) * 1993-06-21 1999-05-25 Nsk Ltd. Ball screw lubricated with oil-containing polymer
US6019513A (en) * 1995-07-11 2000-02-01 Nsk Ltd. Sealing device for linear guide apparatus
US6023991A (en) * 1993-06-21 2000-02-15 Nsk Ltd. Ball screw lubricated with oil-containing polymer
US6216821B1 (en) 1997-07-24 2001-04-17 Nsk Ltd. Lubricating apparatus for ball screw

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5906136A (en) * 1993-06-21 1999-05-25 Nsk Ltd. Ball screw lubricated with oil-containing polymer
US6023991A (en) * 1993-06-21 2000-02-15 Nsk Ltd. Ball screw lubricated with oil-containing polymer
US6019513A (en) * 1995-07-11 2000-02-01 Nsk Ltd. Sealing device for linear guide apparatus
US6257765B1 (en) 1995-07-11 2001-07-10 Nsk Ltd. Sealing device for linear guide apparatus
US6672764B2 (en) 1995-07-11 2004-01-06 Nsk Ltd. Sealing device for linear guide apparatus
US7048443B2 (en) 1995-07-11 2006-05-23 Nsk Ltd. Sealing device for linear guide apparatus
US7255479B2 (en) 1995-07-11 2007-08-14 Nsk Ltd. Sealing device for linear guide apparatus
US6216821B1 (en) 1997-07-24 2001-04-17 Nsk Ltd. Lubricating apparatus for ball screw

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