JPS62122173A - semiconductor equipment - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] This is a gate electrode structure of an MO3 type semiconductor device, and is a salicide structure semiconductor device having a gate electrode of a two-layer structure in which a metal or silicide film is formed on a polysilicon film. Then, the upper end of the spacer made of the 5i02 film provided around the gate electrode is formed to protrude higher than the upper surface of the gate electrode, and the metal or silicide film is formed on the polysilicon film. To prevent metal atoms of the deposited metal from spreading into the source region or drain region through the side surfaces of the gate electrode, and to prevent short-circuits between the gate electrode and the source region, and between the gate electrode and the drain region. semiconductor device.

[Industrial application field]

The present invention relates to a semiconductor device, particularly an MO3 type semiconductor device having a salicide structure gate electrode, and particularly relates to a 5iO2111! formed on the side surface of the gate electrode. ! The tip of the spacer is formed so as to protrude higher than the upper surface of the gate electrode to prevent metal atoms of the metal or metal silicide film from being introduced into the source region or drain region through the side surface of the gate electrode. Related to semiconductor devices.

Semiconductor devices such as ICs and LSIs are required to be formed at increasingly higher densities and at higher speeds, and due to this increase in density, wiring resistance and contacts that connect these wirings and chips are increasing. The need to form resistors or diffused layer resistors thin and densely has hindered the speeding up of semiconductor devices.

Therefore, low-resistance tungsten (W) and titanium (Ti) are used instead of polysilicon for forming gate electrodes and wiring films.
), or these metals and silicon (
Silicide, which is an intermetallic compound with Si), is considered to be promising.

When forming an MO3 type semiconductor device using such silicide, for example, after forming a gate electrode with a two-layer structure of a polysilicon film and silicide on a P-type Si substrate via a gate oxide film, this gate electrode is masked. As such, a salicide structure device has been developed in which a source region or a drain region is formed by introducing N-type impurity atoms such as phosphorus (P) by ion implantation using Selfa Line.

By forming the gate electrode with a two-layer structure consisting of a polysilicon film and a silicide film, it is possible to reduce the electrical resistance of the gate electrode as well as the contact resistance with the wiring film formed on top of the gate electrode. We are trying to obtain a semiconductor device that operates under the following conditions.

[Conventional technology]

The structure of such a conventional semiconductor device will be explained using FIG. 7.

FIG. 7 is a cross-sectional view showing the main structure of a conventional MO3 type semiconductor device.
is defined by a silicon dioxide (Si02) film 2 for isolation between elements, and the element formation region defined by this 5i02 film 2 has a two-layer structure of a polysilicon film 4 and a silicide film 5 with a gate oxide film 3 interposed therebetween. A gate electrode 6 is formed, and using this gate electrode 6 as a mask, atoms such as phosphorus (P), which are N-type impurity atoms, are introduced using an ion implantation method using Selfa Line, and a source region 7 and a drain region 8 are formed. has been done.

Furthermore, as shown in FIG. 8, a thick 5iO2 film 9 of 2000 layers is formed on the substrate 1 by the CVD method, and then the 5io2 film 9 is etched into a predetermined pattern by anisotropic etching. As shown in FIG. 9, a spacer IO is formed to cover the periphery of the gate electrode 6. Then, a tungsten (W) metal film is selectively formed on the polysilicon film 4, the source region 7, and the drain region 8, and then by heat-treating the substrate l,
As shown in FIG. 7, a silicide film 5 and a polysilicon film 4
A gate electrode 6 having a two-layer structure is formed.

Furthermore, silicide 1'$ is applied to the source region 7 and drain region.
11 and 12 are formed respectively.

In addition, in addition to the above-mentioned silicide film 5 and silicide film l,
To form L12, after forming the spacer 10 described above, WIN is deposited over the entire surface of the substrate by sputtering, and then this substrate is heat-treated to form polysilicon film 4 or the source region and gate region. The silicide film 5 on the gate electrode 6 and the silicide film 1 in the source region 7 and drain region 8 are reacted with silicon.
1.12 is formed.

Furthermore, on the substrate 1, since the W film is formed as it is on the 5i02 film 2 for element isolation on which the silicon film is not exposed, the Esotynda solution, which is a mixture of hydrogen peroxide and ammonia, is used. By selectively etching only the W film, polysilicon I! shown in FIG. 7 is formed. A semiconductor device having a gate electrode 6 having a two-layer structure of J 4 and a silicide film 5 was formed.

In this way, the spacer 10 made of the 5i02 film does not react with a metal such as W even when heat-treated, so after depositing and growing a metal film such as W on a substrate using sputtering or the like,
During the heat treatment process, metal atoms such as W are prevented from being transmitted through the polysilicon film 4 and diffused iBU into the source region 7 and drain region 8.

[Problem that the invention seeks to solve]

However, the structure of the gate electrode 6 of the conventional semiconductor device is that the upper surface of the gate electrode 6 and the 5i formed around the gate electrode are
The height of the upper end of the spacer 10 made of 0.02 film is formed to be on the same plane, and in a later step, a metal film such as W or Ti is deposited and grown on this polysilicon film 4 by sputtering or the like. Later, when this metal film is melted and reacted with the lower polysilicon film 4 to form the silicide film 5, the deposited metal film flows out from the upper part of the spacer 10 toward the side surface and is formed. A problem arises in that the gate electrode 6 and the source region 7 or the gate electrode 6 and the drain region 8 are short-circuited.

[Means for solving problems]

In the semiconductor device of the present invention, the upper end portion of a spacer 10 made of a SiO2 film provided around the gate electrode 6 is provided so as to protrude from the upper surface of the gate electrode 6.

[Effect]

In the semiconductor device of the present invention, the upper end of the spacer 10 provided around the gate electrode 6 is formed to protrude from the upper surface of the gate electrode 6, and when forming the silicide film 5 of the gate electrode 6,
The metal film formed on the polysilicon film 4 is a silicide film 5.
In the heat treatment step for formation, the above-mentioned 5i0
211 to prevent it from being introduced into the source region 7 or the drain region 8 through the side surface of the spacer lO.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

As shown in FIG. 1, in the semiconductor device of the present invention, a source region 7 and a drain region 8 are formed in an element formation region defined by a 5IO2 pattern 2 for element isolation, and a source region 7 and a drain region 8 are formed through a gate oxide film 3. A gate electrode 6 formed on the surface of the substrate 1
The upper end A of the spacer 10 made of a 5i02 film is formed to protrude from the upper surface B of the gate electrode 6 made of the silicide film 5.

Regarding the manufacturing method of such a semiconductor device, FIGS.
This will be explained using the cross-sectional views shown in the figures.

First, as shown in FIG. 2, a 5I02 film 2 for element isolation is formed on a P-type Si substrate 1 by thermal oxidation, and then a gate oxide film 3 is formed by thermal oxidation.

Next, a polysilicon film 4 and a Si nitride film 1 are formed by CVD method.
After the Si nitride film 13 is etched into a predetermined pattern using photolithography, the underlying polysilicon film 4 is etched to have the dimensions of the gate electrode.

Here, the polysilicon film 4 is doped.

Further, using the thus formed gate electrode 6 as a reference, N type impurity atoms such as phosphorus atoms are ion-implanted into the substrate 1 by the self-line method to form a source region 7 and a drain region 8.

Next, as shown in FIG.
After forming the oxide film 15 to a thickness of about 2000 mm, a thick oxide film 15 of about 2000 mm thick is formed thereon by CVD.

The reason why the Si○2 films 14 and 15 with different thicknesses are formed in a two-layer structure in this way is because if the thick oxide film 15 is formed by thermal oxidation, the substrate 1 will be heated to a high temperature. This is because the impurity atoms introduced into the drain region 8 are re-diffused and the depth of the region changes.

Next, a thick 5iO- film was formed by the above-mentioned thick CVD method by anisotropic etching using a mixed gas of carbon tetrafluoride (CF4) gas and hydrogen (H2) gas.

The film 15 is etched, and the polysilicon film 4 and Si nitride film 13 are etched around the Mi layer, as shown in FIG.
A spacer 10 made of 02 film is formed.

Further, as shown in FIG. 5, the nitride 5ilJ13 is removed by etching with phosphoric acid to form a structure in which the upper end of the spacer 10 provided around the polysilicon gate electrode film 4 protrudes from the surface thereof.

If the thickness of the nitride 5ilW13 is thin, the polysilicon film 4 is further etched to increase the step between the upper surface of the polysilicon film 4 and the spacer 10.

Here, since a thin thermal oxide film 14 is formed in the source region 7 and drain region i5i8, it is not etched.

After removing the thin thermal oxide film 14 by notching, the CV
After selectively growing a W film on the source region 7, drain region 8, or polysilicon film 4 by the D method, or by depositing the W film on the entire surface of the substrate, or by forming it by sputtering, the substrate is removed. Heat treatment. Then, silicide is formed on the source region 7, drain region 8, and polysilicon film 4, but sio2m for isolation between other elements! W is laminated on the spacer 2 and the spacer 9 as it is.

This silicide film is not etched by an etching solution consisting of a mixture of hydrogen peroxide and ammonia, but
The metal film is easily etched away.

In the step of heat-treating this substrate 1, since the upper end of the spacer 10 is formed higher than the upper surface of the polysilicon film 4, the polysilicon lI! ! The metal atoms of the metal film such as W deposited on the upper part of the semiconductor device 4 are prevented from spreading laterally and diffusing into the source region 7 and the drain region 8 through the spacer 10 during the heat treatment process.

In this way, as shown in FIG. 6, the source region 7, the drain region 8, and the polysilicon film 4 are easily silicided, and the silicide film 5 is formed on the gate electrode 6. Silicide films 11 and 12 are formed on each of the silicide films 11 and 12, respectively.

In addition, when forming silicide using Ti, after forming the state shown in Figure 5, the thin oxide film is removed, a Ti film is deposited on the entire surface by sputtering, and then the substrate is heat-treated. However, the Si atoms of the SiO2 film of the spacer 10 are likely to diffuse into the Ti atoms. Therefore, after the Ti film is deposited on the substrate, heat treatment is performed in two stages: low temperature and high temperature. However, according to the semiconductor device of the present invention, -times of heat treatment is sufficient, and the process is reduced accordingly. Can be simplified.

〔Effect of the invention〕

As described above, in the semiconductor device of the present invention, when the gate electrode is formed by forming a polysilicon film and a silicide film, or a polysilicon film and a metal film, the metal atoms are formed on the side surfaces of the gate electrode by the heat treatment process. This eliminates the possibility of diffusion into the source region or the drain region, resulting in the effect of providing a highly reliable semiconductor device in which the phenomenon of breakdown voltage reduction ring does not occur.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view showing the main structure of the semiconductor device of the present invention, FIGS. 2 to 6 are cross-sectional views showing the manufacturing process of the semiconductor device of the present invention, and FIG. FIG. 8 and FIG. 9 are cross-sectional views showing the manufacturing process of a conventional semiconductor device. In the figure, l is a Si substrate, 2 is an SiO2 film for isolation between elements, 3 is a gate oxide film, 4 is a polysilicon film, 5 is a silicide film, 6 is a
is a gate electrode, 7 is a source region, 8 is a drain region, 1
0 is a spacer, 11.12 is a silicide film, 13 is a Si nitride film, 14 is a thermal 5i02 film, and 15 is a CV. 5i02 film, A indicates the upper end of the spacer, and B indicates the upper surface of the gate electrode. 4 Sardine Ministry θ Blade Management I-qg-r, a drunkenness db mouth 1st figure 44 degJIqS! -day 4 t&:'/-s, p・
Problem 4 to the area ゛〃 Figure 5

Claims (1)

[Claims] In the region defined by the silicon dioxide film for element isolation (2), a gate oxide film (3), a source region (7), a drain region (8), and a polysilicon film (4). and metal film, or polysilicon film (4) and silicide film (5)
A gate electrode (6) having a two-layer structure is formed, and a spacer (
10), the upper end of the spacer (10) is connected to the gate electrode (6).
) A semiconductor device characterized in that the semiconductor device is provided so as to protrude from the upper surface of the semiconductor device.