JPS62116022A - Control system for automatic line equalizer - Google Patents

Abstract

PURPOSE:To optimize line characteristic, etc. in an optional frequency band, by detecting insufficient and excessive equalization by means of a circuit which detects the righ-left symmetry of an isolated-wave response and changing the combination of steps of two equalizers. CONSTITUTION:The left side of an isolated-wave response is represented by (b) and the right side by (d). The (b) and (d) are respectively counted by counter A 111 and counter B 112, to which high-speed clocks are given, and the results are compared with each other by a comparison controlling circuit 113. When the results of the counter A are equal to those of the counter B, the optimum equalization is obtained and, when counter A < counter B, insufficient equalization is obtained. When counter A > counter B, excessive equalization is obtained. The right-left symmetry of the isolated-wave response is mainly due to the equalization of delay and two equalizers 2 and 3 are controlled in such a way that the step of the equalizer 2 is raised and step of the equalizer 3 is lowered at the time of insufficient equalization. In the case of excessive equalization, the step of the equalizer 2 is lowered and step of the equalizer 3 is raised.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an automatic line equalizer that automatically equalizes line loss characteristics in a telecommunications line, and more particularly to a method for controlling a combination of a plurality of equalizers.

2. Description of the Related Art Conventionally, this type of automatic line equalizer has been known, for example, as shown in FIG. This is a flat equalizer 1 with flat gain characteristics. Gradient equalizers 2 and 3, each having a slope gain characteristic with a large or small gain variation range. Peak detection circuit 4. A gain control circuit 6 is provided to detect the peak value of the equalizer output with respect to the solitary wave input, and the gain control circuit 6 automatically controls the equalizer 1°2.3. Once the frequency band is specified and the line loss value is determined, the corresponding combination of steps of the slope equalizers 2 and 3 is fixed to one.

Problems to be Solved by the Invention In such a switched capacitor automatic line equalizer, since the combination of steps of the slope equalizers 2 and 3 is fixed, the gain characteristics of any frequency band or different line types, The disadvantage is that the group delay characteristics are not necessarily optimally equalized.

Means for Solving the Problems The line equalizer of the present invention detects the left-right symmetry of the solitary wave response as shown in FIG. 3 using a detection circuit as shown in FIG. 2, and performs optimal equalization. , determines under-equalization and over-equalization, and equalizer 2
Optimal equalization is achieved by changing the combination of steps 3 and 3.

Example Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the invention.

In the figure, 1 is a flat equalizer, 2 is a slope equalizer with a large gain change width, 3 is a slope equalizer with a small gain change width, and 4 is a slope equalizer with a small gain change width.
is a circuit that detects the peak of the solitary wave response that appears in the output,
6 is a circuit for controlling the gain of each equalizer based on this detection output, and 5 is a circuit for detecting the left-right symmetry of the solitary wave response, which is obtained by a circuit configuration as shown in FIG. 2, for example. 7
is a circuit that controls the delay characteristics by changing the combination of steps of the slope equalizers 2 and 3 using the output of the symmetry detection circuit 5.

The waveform of the solitary wave response is K as shown in FIG. In the figure, A represents the waveform of optimal equalization, B represents the waveform of under-equalization, and C represents the waveform of over-equalization.

Next, the operation of the symmetry detection circuit shown in FIG. 2 will be explained. First, a signal is applied to the reset terminal to discharge the capacitor 105, and then a solitary wave response is input. Needless to say, the input of this circuit is the output of the equalizer 3. Until this input reaches its peak, the output of the comparator 101 becomes +1 because the ten-terminal input is υ larger than the one-terminal input. Therefore, the switch 103 is turned on, and the capacitor 1
Charge is accumulated in 05. When the peak is exceeded, the single-terminal input becomes larger than the ten-terminal input, so the output is inverted and becomes as shown in a. In the comparator 102, the output C becomes +1 when the input is larger than half the value of the peak, and becomes -1 when it is smaller. It is an AND of biia and C, and +1 from when the solitary wave response reaches half the peak value to the peak.
, which represents the left side of the solitary wave response. d is the result of inverting a and ANDing C, and is +1 until the value reaches half the peak of the solitary wave response, representing the right side of the solitary wave response. Counters b and d are counted by a counter A 111 and a counter B 112 provided with equal high-speed clocks, respectively, and the results are compared by a comparison control circuit 113. At this time, if counters A and B are equal, optimal equalization is performed, and counter A
<If counter B, equalization is insufficient; counter A> If counter B, overequalization occurs. The left-right symmetry of the solitary wave response is mainly due to delay equalization; when equalization is insufficient, the step of equalizer 2 is increased, and when equalization is over-equalized, the step of equalizer 3 is decreased. lowers the step of equalizer 2 and lowers the step of equalizer 3
control to raise the step. Note that since the group delay characteristic changes when the signal speed changes, the combination of equalizer 2 and equalizer 3 is made to change depending on the signal speed.

Effects of the Invention As explained above, according to the present invention, under-equalization and over-equalization are detected by a circuit that detects left-right symmetry of a solitary wave response, and the combination of steps of equalizers 2 and 3 is performed. Optimal equalization of line characteristics can be performed in any frequency band by changing 0

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a circuit and time chart diagram showing one example of a symmetry detection circuit used in the present invention, FIG. 3 is a solitary wave response waveform diagram, and FIG. The figure is a block diagram of a conventional example.0 1...Flat equalizer, 2...Slope equalizer with a large gain variation range, 3...Gain variation width small slope equalizer, 4...Peak detection circuit, 5.
... Symmetry detection circuit, 6 ... Gain control circuit, 7 ... Delay control circuit, 101, 102 ...
...Comparator, 103,104...Switch, 105...Capacitor, 106,107...
...Flip-flop, 108...Inverter, 109, 110...AND circuit, 111...
...Counter A, 112...Counter B,
113... Comparison control circuit. Figure 1 Vptji h ;:; One hour ° °. CLK PSJ List 7 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] It consists of a flat equalizer with flat gain characteristics, a slope equalizer with a large gain variation, a slope equalizer with a small gain variation, a peak detection circuit, and a gain control circuit. In the automatic equalizer that automatically equalizes the line characteristics by controlling the gains of the slope equalizer with a large gain change width and the slope equalizer with a small gain change width, the isolation in the input signal is Changing the combination of gain characteristics of the slope equalizer with a large gain change width and the slope equalizer with a small gain change width according to the magnitude relationship between the width in the leading direction and the width in the lag direction of the response to the wave. A control method for an automatic line equalizer characterized by performing optimal equalization by.