JPS62115518A - Ad conversion unit in programmable controller - Google Patents

Abstract

PURPOSE:To respond rapidly to the change of an input voltage specification making unnecessary a manual operation at an AD conversion unit side or the cut off of a power source by providing a variable gain amplifier circuit at the input side of an AD conversion circuit, and performing the remote control of a gain at a CPU unit side. CONSTITUTION:An analog input voltage obtained from an input terminal 4 is amplified at a variable gain amplifier circuit 5. The circuit 5 is constituted with operational amplifiers 51 and 52 which operate as a voltage follower and a variable gain amplifier respectively. Analog switches 53-55 are inserted to each of feedback loops provided at the amplifier 52, and the gain of the amplifier 52 is set in one time, two times, and five times respectively depending on a state that each of the switches 53, 54, and 55 is turned on. The amplified output of the circuit 5 is digitized at an AD conversion LSI6, and sent out to a data bus through a buffer 7, and a two-way bus driver 8. Meanwhile, the switches 53-55 are controlled with the outputs D0-D2 of a latch circuit 9, and also, a bit of gain information sent from the CPU unit side is latched at the circuit 9 through the driver 8.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of the Invention) The present invention relates to an AD conversion unit of a programmable controller which is provided with a plurality of input voltage ranges and which can be arbitrarily switched from the CPtJ unit side.

(Summary of the Invention) In this invention, a variable gain amplification circuit is provided on the input side of the AD conversion circuit, and its gain is remotely controlled on the CPU unit side, so that the power can be turned off on the AD conversion unit side or manually. This makes it possible to immediately respond to changes in the input voltage range without any switching operations.

(Prior art and its problems) Conventionally, in the AD conversion unit of this type of programmable controller, when changing the input voltage range, it was necessary to turn off the power each time and perform manual switching operations such as replacing the shorting pin. Therefore, it is not possible to immediately respond to changes in the voltage specifications on the knee 1f side, and there are problems such as incorrect setting of the input voltage range due to mistakes in replacing the shorting pin.

(Objective of the Invention) The object of the present invention is to be able to immediately respond to changes in input voltage specifications in this type of AD conversion unit without requiring manual switching operations on the equivalent AD conversion unit side or without turning off the power. An object of the present invention is to provide an AD conversion unit.

(Structure and Effects of the Invention) In order to achieve the above object, the present invention has an output port that is opened under control from the CPU unit and outputs gain information on the system bus, and stores the gain information obtained from the output port. A memory circuit, a variable gain (q amplification circuit) that amplifies the analog input voltage obtained from the external input terminal according to the stored gain information, and an A/D conversion circuit that digitally converts the analog voltage obtained from the variable gain amplification circuit. It is characterized by consisting of a circuit, and an input port that is opened under control from the CPU unit and inputs converted digital information onto the system bus.

According to such a configuration, the input range can be immediately switched by simply sending the power information from the CPU unit side to the corresponding input port, and there is no need to turn off the power, so there is no need for the user to turn off the power. It is possible to immediately respond to changes in voltage specifications.

Also, like the conventional shorting pin replacement device,
Since no manual switching operation is required, it is possible to avoid erroneous voltage range constants caused by this.

(Description of Embodiments) FIG. 1 is a block diagram showing the electrical configuration of an AD conversion unit according to the present invention.

This AD conversion unit can be connected to a system bus 2 of a programmable controller device (building block type) via a connector 1.

Furthermore, any analog voltage can be input from the input terminal 4 provided on the terminal block 3.

The analog input voltage obtained from the input terminal 4 is amplified by the variable gain amplifier circuit 5.

The variable gain amplifier circuit 5 includes an OP amplifier 51 that operates as a voltage follower and an OP amplifier 52 that operates as a variable gain amplifier.

This OP amplifier 52 is provided with three systems of feedback loops, and each feedback loop has an analog switch 53.5.
4.55 has been inserted.

When the analog switch 53 is turned on, the gain of the OP amplifier 52 is set to 1, as shown in FIG.

In addition, when the analog switch 54 is on, the third
As shown in the figure, the gain of the OP amplifier 52 is set to double.

In addition, when the analog switch 55 is on, the fourth
As shown in the figure, the gain of the OP amplifier 52 is set to 1.15 times.

The amplified analog voltage obtained from the variable gain amplifier circuit 5 is converted into digital information by a known A/D converter LSI 6, and then passed through a buffer 777 and a bidirectional bus driver (functioning as an input/output port) 8. The data is then sent out onto the data bus connected to the CPtJ unit.

On the other hand, each analog switch 53 to 5 in the variable gain circuit 5
5 is on/off controlled by the output Do''D2 of the latch circuit 9, and the latch circuit 9 latches gain information sent from the CPU unit side via the bidirectional bus driver 8.

Next, the configuration of the user program will be explained with reference to the ladder diagram of FIG. 5, taking as an example the case where the gain of this AD conversion unit is set to five times.

The program shown in the ladder diagram of Fig. 5 connects the AD conversion unit shown in Fig. 1 to the channel number (CH30).
At the same time, the profit (q) is set to 5 times, and the set value of the timer (64-0) is changed in size according to the value of the analog input.

That is, when the pushbutton switch (PB-1) is operated, the setting value of the timer (64-0) is determined according to the magnitude of the input analog voltage at that time, and as the timer times up, the relay ( 10-5> is driven.

In this case, as shown in the ladder diagram of FIG. 5, the range of the AD conversion unit of CH30 is increased five times by using a range setting command G 5 in addition to the normal data transfer commands LD and SD.

In this case, as shown in FIG. 6, it is assumed that the set value of the timer (64-0) is stored in the 65th channel in the I10 memory in the CPJJ unit.

Next, the control contents provided on the CPtJ unit side corresponding to the above user program will be explained.

In FIG. 7, when the program starts, first, in initial processing, various flags and registers are initialized (step 701), system service processing (step 702>), input update processing (step 7).
03) in sequence.

In the system service processing, processing such as monitoring and programming is performed, and in the input update processing, data is updated between the input canister and the input cannit of the I10 memory.

Thereafter, unless a key operation corresponding to RUN mode is performed on the program console (step 704 is negative),
The state of all output kaninits is set to the off state.

On the other hand, when a key operation corresponding to the RtJN mode is performed on the program console (step 704 affirmative), the command words are sequentially read from the beginning of the user program (step 706), and the read command words are the END command, If there is no RG word command (step 707 negative, 708 negative), the corresponding command is executed (step 7
09).

On the other hand, the read instruction word is the range setting instruction R.
If it is G (step 708), the AD of the designated channel
Range setting data is sent to the conversion unit (step 710).

Then, in FIG. 1, the bidirectional bus driver 8, which functions as an output port, opens and the range setting data is transferred to the AD.
It is taken into the conversion unit and stored in the latch 9.

At this time, by setting only D2 to "1'' among Do to D7 that make up the range setting data,
Turn on only the analog switch 55 and turn on the OP amplifier 52.
The gain can be set to 5 times.

Similarly, by setting only Do or Dl to "1", the gain of the variable gain amplifier circuit 5 can be set to 1 and 2, respectively.

Next, returning to FIG. 7, as a result of sequentially reading out the instructions, if the END instruction is finally read out (Yes at step 707), output update processing is performed (step 711).

In this output update process, output data that has been replaced as a result of calculation execution is sent to the output unit for output to the outside.

In this way, in this embodiment, the range setting command RG is used in the user program, and the input range of the designated channel can be arbitrarily changed in the user program, and unlike conventional devices, the range setting command RG can be used to change the setting of the input range of the specified channel on the user program. There is no need to turn off the power and perform a manual switching operation, so it is possible to immediately respond to changes in voltage specifications by the user, and there is little risk of JJ determination.

In this embodiment, the range setting command RG used in the user program is decoded on the CPU unit side, and the input range is switched based on the result. B, directly A with the range 7.2 constant data that will be input from now on.
Of course, the gain of the D conversion unit may be changed.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing the electrical configuration of the AD conversion unit according to the present invention, Figs. 2 to 4 are explanatory diagrams showing each setting state of the variable gain amplifier circuit, and Fig. 5 is for changing the range. FIG. 6 is a memory map showing the state of the timer setting value area in the I10 memory, and FIG. 7 is a flowchart showing the control contents of the CPU unit. 1... Connector 2... System bus 3... Terminal block 4... Input terminal 5... Variable gain amplifier circuit 6... AD conversion LSI 7... Buffer 8... Bidirectional bus Driver 9...Latch patent applicant Tateishi Electric Co., Ltd. Figure 5 Figure 6

Claims (1)

[Claims] (1) An output port that opens under control from the CPU unit and outputs gain information on the system bus, a memory circuit that stores the gain information obtained from the output port, and an analog input voltage obtained from the external input terminal. A variable gain amplifier circuit that amplifies the obtained gain information according to the obtained gain information, and an A/D conversion circuit that digitally converts the analog voltage obtained from the variable gain amplifier circuit. An AD conversion unit of a programmable controller, comprising: an input port for inputting data onto a bus;