JPS6188682A - Picture processing circuit - Google Patents

Abstract

PURPOSE:To attain left/right inversion of a picture easily with a low cost by storing alternately a line scanning electric signal obtained from an object to the 1st or 2nd line memory circuit sections and reading the signal in the converse order from the storage. CONSTITUTION:A signal inputted during the 1st scanning period from an input terminal 1 is inputted to the 1st line memory 4 via a buffer circuit 11, read in the converse order from the storage during the 2nd scanning period and outputted as the 2nd scanning signal via a D/A converter 6. Further, the signal is inputted similarly to the 2nd line memory 5 during the 2nd scanning period and outputted as the 3rd scanning signal during the 3rd scanning period. The procedure above is repeated similarly alternately.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an image processing circuit for a television camera using a solid-state image sensor.

2. Conventional configurations and their problems In TV cameras that use conventional vidicon tubes, the tube itself has a short lifespan and is susceptible to mechanical vibrations, etc., so for industrial purposes, solid-state sensors have been used for some time. .

Currently, COD cameras are used for industrial purposes.'' (C
It has become. Depending on the application, the reproduced image may be observed once through mirror reflection, and it is necessary to make it a horizontally inverted image. In order for a driver who is driving to monitor the image captured by a camera at the rear of the vehicle with an image equivalent to the rear view mirror screen, processing such as reversing the image reproduced by the television camera from side to side occurs.

In this case, since conventional television cameras use a deflection coil in the vidicon tube to scan the beam, reversing scanning can be achieved by simply connecting the deflection coil terminals in the opposite direction.

However, in the COD type camera that has been put into practical use in recent years, the light-receiving surface (C) is a signal generator that is completely different from the conventional one and outputs the generated charge by transferring it with a drive pulse. This is one of the problems when using the camera because it does not have a configuration that allows signal output through reverse transfer.

Although there is a method of changing the structure of the sensor itself, there is a problem of complicating the cost amplifier 174 construction.

OBJECTS OF THE INVENTION The present invention solves the above-mentioned conventional drawbacks, and aims to reproduce images of a television camera using a solid-state image pickup device by horizontally inverting the images.

Structure of the Invention The present invention achieves the above object by converting a two-dimensional image obtained from an object into a line-scanning electrical signal, and transmitting an odd-numbered scanning line signal to a first line memory circuit section and an even-numbered scanning line signal to a first line memory circuit section. The second line memory circuit section stores the data in the first line memory circuit section during the even scanning line signal storage period and the second line memory circuit section alternately during the odd scanning line signal storage period. The present invention provides an image processing circuit characterized in that a reverse scanned image is obtained by reading data in the reverse order of storage.

Description of examples Embodiments of the present invention will be described below with reference to the drawings.

The present invention will now be described in detail with reference to FIG.

The input signal from the COD camera (signal in FIG. 1(a)) shows the first and second scan line signal portions of the image converted into line scan signals.

For example, when conforming to the Japanese Kuwa standard, the scanning period is approximately 63.5 μS = IH, and the period of one image field is approximately □
A book scanning line signal is input.

These input signals are sequentially stored as pixels in two sets of separately prepared line memories every 1H.

Ω For example, FIG. 1(b) is a signal stored in the line memory, which is read out in the reverse order of storage during the second scanning signal period, and is used as a reverse scanning signal of the first scanning signal delayed by 1H (C ) waveform (second scanning period) is output.
'Similarly, the second scanning signal is stored as a (d) signal in another line memory. This is read out in the following third scanning signal period in the reverse order of storage, resulting in the signal during the third scanning period shown in FIG. 3(C).

With a signal processing configuration of 5 benos or more, the input signal from the COD camera is output as a reverse scanning signal delayed by 1H, and a horizontally inverted image can be reproduced.

The above is an easy-to-understand summary of the input signal processing, and in Act #2, the above objective is achieved by digital signal processing.

The details will be explained below.

FIG. 2 is a block diagram of an image processing circuit in one embodiment of the present invention.

In Fig. 2, 1 is an analog signal input terminal from a COD camera, 2 is a preamplifier for band-limiting the input signal and amplifying it to a certain level, and 3 is a preamplifier for converting the analog signal of amplifier 2 into a digital signal. A/D conversion circuit
/ The digital signal after D conversion is converted into 8 bits. Further, 4 is a first line memory circuit section for odd-numbered scanning line signals of one frame image, 5 is a second line memory circuit section for even-numbered scanning line signals of one frame image, and 6 is a first line memory circuit section for even-numbered scanning line signals of one frame image. 2 a D/A converter that converts the 8-bit digital signals read out alternately for each scanning line from the memory circuits 4 and 5 into analog signals; 7 synchronizes the signal obtained from the input terminal 1; A synchronization separation circuit section that separates and extracts only the signal section generates basic pulses for controlling the timing of control pulses of each section from this signal.

Reference numeral 8 denotes a clock pulse generator for controlling data storage and read operations in the first and second line memory circuit sections 4 and 5; 9 and 10 indicate the first and second line memory circuit sections 4;
and the storage order of each pixel of the scanning line signal stored in 5.
An address control circuit for reversing the reading order of each pixel from the memory circuit section 4.5, and 11 a buffer for temporally aligning 8-bit signals at the input/output points of each line memory circuit section 4.5. In the circuit, 12 is an output signal terminal.

With this configuration, the COD camera signal input to the input terminal 1 is obtained as a reverse scanning signal from the output terminal 12.

Next, the operation of this embodiment will be explained using FIG. 2.

The input signal from the input terminal IK in Fig. 1 (L> in Fig. 2) is input as an analog signal. The analog signal is amplified and then converted into an 8-bit digital signal by the A/D converter 3, and the signal input to the first line memory circuit section 4 in the first scanning period via the buffer circuit 11 is converted into an 8-bit digital signal. be remembered.

When stored in the first line memory circuit section 4, each pixel during the scanning period is an 8-bit signal synchronized with the clock signal GK input to the A/D converter 3. size, number 1
The recording of the scanning period is performed sequentially under the control of the signal WE and 8- to 10-bit signals from the first address control circuit 9, which will be described later. When the first scanning period ends, the analog signal shown in FIG. 1('b) is stored in the first line memory circuit section 4 as a digitized signal.

In the second scanning period, the data in the first line memory circuit section 4 is read out in the reverse order of storage, and the buffer circuit 11
The signal is inputted to the D/A converter 6 via the D/A converter 6, converted into an analog signal, and then outputted from the output terminal 12.

The signal at the terminal 12 is output as the second scanning period signal shown in FIG. 1(C).

Next, the signal input from input terminal 1 during the second scanning period is processed in the same way as the signal input during the first scanning period.
It is inputted to the second line memory circuit unit 5 via the buffer circuit 11, read out in the reverse order of storage during the third scanning period, and transmitted via the D/A converter 6 to the third scanning line shown in FIG. 1(C). Output as a signal.

The signals stored in the second line memory circuit section 5 during the second scanning period are digital arrays obtained by converting the analog signal shown in FIG. 1(d) into an 8-bit signal per pixel.

The storage and read operations of the second line memory circuit section 5 are performed using the WE multiplication signal 8 to 1 from the second address control circuit 10.
This is performed sequentially using a 0-bit signal.

As explained above, the first image from the COD camera. The third scanning signal following the second scanning signal. The same signal processing is repeated for the fourth scanning signal (which lasts for -screen period).

The output of the synchronization separation circuit section 7 is the horizontal and vertical drive pulses HD and VD signals generated from the synchronization signal section of the input signal and the 5Y signal.
This is an NC pulse.

To 9-2 HD,! :The VD pulse is applied to the clock signal generator 8 and the address control circuits 9 and 10, and is used to control the signal generation period and, therefore, to determine the range of data to be stored in one scanning period.

The output 5YNC signal of the synchronization separation circuit section is used when it is necessary to add it to the output terminal 12 signal after processing the storage/reproduction signal.

With such a configuration, images from a television camera using a solid-state image sensor can be easily reversed horizontally and reproduced.

Effects of the Invention In short, the present invention is such that line scanning electrical signals obtained from a subject are alternately stored in the first or second line memory circuit section, and which ones are read out in the reverse order of storage. , it has the advantage that horizontal reversal of an image can be easily performed at low cost without complicating the structure of the COD element.

[Brief explanation of the drawing]

FIG. 1 is a conceptual diagram illustrating an image line scanning inversion procedure according to the present invention, and FIG. 2 is a block diagram of an image processing circuit in one embodiment of the present invention. 1...Input terminal, 2...Preamplifier,
3-... A/D converter, 4... First line memory circuit section, 5... Second line memory circuit section, 6...
...D/Ai converter, 7... Synchronization separation circuit section, 8... Clock signal generation section, 9... First
Address control circuit, 10...second address control circuit, 11...buffer circuit, 12...output terminal.

Claims (1)

[Claims] A two-dimensional image obtained by capturing an object is converted into a line-scanning electrical signal, and the odd-numbered scanning line signals are sequentially time-divided from the beginning of one field image scanning and sequentially stored pixel by pixel in the first line memory circuit section. Then, the subsequent even-numbered scanning line signals are sequentially stored pixel by pixel in a separately provided second line memory circuit section using the same means, and during the storage period of the even-numbered scanning line signals, the data of the first line memory circuit section is also stored in the odd-numbered scanning line signal. An image processing circuit characterized in that during a storage period of a scanning line signal, data in a second line memory circuit section is read out alternately and in the reverse order of pixel storage, and is repeated for one pixel period to generate a reverse scanning image. .