JPS617934A - General purpose bit operating system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a general-purpose bit manipulation method such as a shift for converting a multi-bit data group into another multi-bit data group.

[Conventional technology]

When handling 6-bit data on an 8-bit or 1-byte machine, it is possible to add two invalid bits, such as 0, to the 6-bit data to make it 8 bits, but it is also possible to use other representations such as compressing the data into 8 vias. For example, a 6-bit data group may be redivided into 8-bit data, and the latter method has the advantage that storage capacity can be reduced when storing data. Changing to 8 bits means that the data is 8 bits, but the upper 2 bits are 0.
, that is, it is invalid or meaningless, so it also occurs when the invalid part is removed and 8-bit data is made up of only the valid part. In this case as well, if we focus on the effective part, it is a process of converting a plurality of N=6 bit data groups into another plurality of M=8 (M>N) bit data groups.

[Problem that the invention seeks to solve]

Although the process of converting 6-bit data to 8-bit data can be executed by a program, it is fixed in the program, and when the above 6 bits become 4 bits and 8 bits become 16 bits, the above N , M changes, the program must be completely rewritten each time, and flexibility is lacking, making it impossible to take various measures. Further, there is a problem that the processing speed is slow and the load on the CPU is large.

The present invention aims to provide a general-purpose bit manipulation method that can easily convert N-bit data to M-bit data even if the values of N and M change, and that can perform high-speed processing.

[Means for solving problems]

In a general-purpose operation method such as a shift that converts a multi-bit input data group into another multi-bit output data group, the present invention allows the shift position of input data to be incorporated into output data to be changed for each case and for all of the input data. A lookup table that indicates the value of , with invalid bits for parts other than the input data, and an address that indicates which input data should be used for each output data and which look amplifier table should convert the input data. The feature is that the table is used, the address table is referred to for each output data, the look amplifier table is accessed according to the result, and the output data is obtained by logically ORing the read data.Please refer to the following embodiments. The structure and function will be explained.

〔Example〕

FIG. 1 shows an embodiment of the present invention, in which 10 is a lookup table (LUT), and a plurality of tables TI, T2 .
It consists of... 12 is an address table for sampling SL, S2 and for lookup Ll, L2.
Consisting of 16 is a group of input data, in this example, data AI, A2 .・・・・・・
Consisting of 18 is a group of output data to be sought, in this example, it is a data group of 8 bits in the effective part, each of which is 6-bit data A.
1, the first two bits of data A2, the remaining four bits of data A2, and the first four bits of data A3, etc. Lookup table 10 has the contents shown in FIG.

In other words, table T1 has 64 pieces of 8-bit data, but
The lower 2 bits are fixed to 0, and the upper 6 bits are as shown in the figure, that is, in decimal notation, 0°1.2.・・・・・・
・It has contents that change from 63. Although the input data is 8 bits, the upper 2 bits are 0, so it is actually 6 bits.
The value of 6 binary bits is any one of θ to 63. Therefore, when reading table T+ according to the value of input data A+,
8-bit data with the same value in the top 6 bits is obtained,
This is the same as shifting the input data Ai by 2 bits to the left (the empty lower 2 bits are set to 0).

Table T2 also consists of 64 pieces of 8-bit data, but the upper 6 bits of these data are fixed to 0, and the lower 2 bits are 0 to 15, 00.16 to 31, and 01.32.
-47 to 10.48 to 63 to 11. This focuses only on the upper 2 bits of the input 6-bit data; if it is 2 bits, it is either 00 to 11, and the lower 4 bits are ignored, so it is 0 to 15.16 to 31.
. . . are unchanged, and the table becomes as shown in table T2.

This is used to add the upper 2 bits of the subsequent 6-bit data to the lower 2 bits of the preceding 6-bit data. Table T3 also consists of 64 pieces of 8-bit data, but the lower 4 bits are fixed at 0, and the upper 4 bits change in the range of 0 to 15 in decimal. this is,
This method focuses on the lower 4 bits of 6-bit data, and ignores the upper 2 bits, so the value of 6-bit data is 0.
Even if it is 63, if it is limited to the lower 4 bits, 0 to 15 will be repeated. This table T3 is used to shift the lower 4 bits of 6-bit data to the upper 4 bits of 8-bit data.

Table T4 also consists of 64 pieces of 8-bit data, but the upper 4 bits are fixed to 0 and the lower 4 bits are fixed to 6.
1 for 0.4 to 7 for bit data value θ~3
．． 2 for 8-11. It changes as... This shifts the upper 4 bits of 6-bit data to the lower 4 bits of 8-bit data. Also table T5
It consists of 64 pieces of 8-bit data, but the lower 6
The bit is fixed to 0, and the upper 2 bits are 6-bit data values of 0 to 3.4 to 7. 0-3, 0-3. It changes to... This converts the lower 2 bits of the 6-bit data into the upper 2 bits of the 8-bit data.
It performs operations that add to bits. Table T6 similarly consists of 64 pieces of 8-bit data, but the upper 2 bits are fixed to 0, and the lower 6 bits change from 0 to 63 in response to the value of the 6-bit data changing from 0 to 63. . This is an operation for shifting 6-bit data to the lower 6 bits of 8-bit data.

If you prepare such a look-up table and also prepare an address table 12 that instructs whether to refer to the look-up table when converting data, you can easily convert 6-bit data to 8-bit data. It can be converted to . That is, 1. at the left end of the address table 12. 2.
3. 4. . . . indicates the number of 8-bit output data, and each number is SL, Ll, 32 . L2
indicates the following: That is, for number 1, 51=1. L1=1, which indicates that input data A1 should be converted directly using table T, and furthermore, 52=2. Since L2=2, it indicates that input data A2 should also be taken out and converted using table T2. Tweet number 2 in the output data is 51=2
．． L1=3. Since S2'=3°L2=4, this indicates that input data A2 should be converted using table T3, and input data A3 should be converted using table T4.

The following shall apply accordingly.

The processing unit 14 performs calculation processing and takes the logical sum of the results of the first step and the second step.

In this example, when A1 is converted using table TI, T1 in Fig. 2
As is clear from the above, A + all bits Oo (first step), and when A2 is converted using table T2, it becomes 0000.
The first 2 bits of 00A2 (second step),
When the results of these steps are logically summed, all bits of A1 and the upper two bits of A2 are obtained, and number 1 of the 8-bit output data is obtained. Similarly, when A2 is converted with T3, the lower 4 bits of A2 become oooo, when A3 is converted with T4, the upper 4 bits of A3 become 0000, and when these are logically summed, the lower 4 bits of A2 and the upper 4 bits of A3 are obtained, resulting in 8-bit output data. The number 2 is obtained. The same applies below.

In this example, since 6-bit to 8-bit conversion is performed, the sampling and lookup address tables 12 are S1 and L1.
, 2 steps S2 and L2 may be used, but 3 steps may be sufficient.
When converting bit data to 8-bit data, the output 8-bit data will contain 3 pieces of input data, so it is necessary to prepare 3 steps by adding S3 and L3, and the look amplifier table T + , , T2
,... also need to be changed. − class, if the number of input data included in the output data is j, then
The address table 12 is prepared in j steps (j pairs of Si and Li). The size m of each address table is equal to the number m of output data. Look amplifier table TI, T2. The number of ... is equal to the number of combinations of input data included in the output data (this is also the number of types of shifts). In this example, as is clear from the output data group 18, the number of combinations is six, and this is repeated. Output data can be found by shifting and/or dividing input data, accessing three look-up tables with bits other than the self set to 0, and logically ORing the outputs. This operation can be expressed as follows.

TLl(IN(Sl(1)))U...TLJ(
IN(sjo)))→OUT(11・・・・・・[
1) Here t-t, 2. ...m, and U indicates a logical sum. In the above example, if i=l, I N (S
+ (11) = 00A+, Tl-1 = TI% or j-
2 and IN (Sj(11)=00A2,T,...
= T2.

The following shall apply accordingly. The individual tables TI, T2 . ...is the number 1゜2,
If expressed by each memory address instead of . . . (Equation 11 is expressed by the following equation).

T(IN (S + (1)) 10L + )U・
...T (IN(Sj(il) + Lj)→
0UT (1) ・・・・・・(2) This\de Ll,・
. . . Lj is the address of table 1゛1 . . . Tj. This conversion process can be performed extremely easily and quickly by using a vector processor that performs pipeline processing. In other words, Si in table 12 is 1 and 2 in this example.
, 2 and 3. 3 and 4. ..., read the lookup table with the data obtained, load that data, and perform an OR operation to find output data one after another.

To perform the above conversion process with a program, input data 00
Take A1 into the first 8-bit register, shift it to the left by 2 bits, take the next input data 00A2 into the second 8-bit register, shift it to the right by 4 bits, OR the data in these registers, and shift it to the left by 2 bits. 8-bit output data A+
and obtain the upper 2 bits of A2 and store this in memory,
Next, the second input data 00A2 is again taken into the first 8-bit register and shifted to the left by 4 bits, and the third input data A3 is taken into the second register and shifted to the right by 2 bits. The second 8-bit output data is obtained by ORing the data in the second register, and the process - is repeated. All of these processes are expressed as command statements, and proceed one process at a time. This takes time.

If we call the operation of converting 6-bit data to 8-bit data, or converting N-bit data to M-bit data (here M>N) by converting it to 8-bit data, we also need to unpack it back to its original state. However, this unpacking can be done as follows.

FIG. 3 shows a lookup table used for unpacking, and FIG. 4 shows the same address table. The creation procedure is similar to that in Figure 2, so a detailed explanation will be omitted. Below, we will explain the procedure for converting the output data OUT (11) in Figure 1 to the same person data IN (J). Now it's output, but we'll use the same word to avoid confusion) data 00
To find A1, look at the first column of the address table in Figure 4, which is 51=1. L1=1. And 52=1. L
Since 2=7, take the first of the output data group and write A1 and A
Get the upper 2 bits of 2. Since the table to be accessed is T1, 00A1 is obtained when this access is performed. The lower two bits are thus ignored. Next, access table T7 for the upper two bits of A1 and A2,
Since this is all 0, we simply get that 0. When these logical sums are taken, the input data 00A+ is obtained, which is the same as the first one.

When the address table is indexed for the second input data, 31=1. L1=2,52=2. L2=3 is obtained, and when this is executed, the upper 2 bits of 00A2, 0000, and the lower 4 bits of 0000A2 are obtained, and when they are logically summed, input data 00A2 is obtained. The following shall apply accordingly.

〔Effect of the invention〕

As explained above, according to the present invention, a table is used to convert N-bit data into M-bit data, so high-speed processing is possible.

Furthermore, by setting the table, it is possible to handle arbitrary bits of data. Furthermore, when a pipeline type processor is used, an array of indexes can be used, so very efficient processing can be performed, and it is effective for image processing and data conversion when replacing a 36-bit machine with a 32-bit machine.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram showing an embodiment of the present invention, FIG. 2 is an explanatory diagram of a look amplifier table, and FIGS. 3 and 4 are explanatory diagrams of tables used for reverse operation. In the drawing, 10 is a lookup table, 12 is an address table, 16 is an input data group, 18 is an output data group,
14 is a processing unit that performs processing such as calculating a logical sum.

Claims (1)

[Claims] In a general-purpose operation method such as a shift that converts a multi-bit input data group to another multi-bit output data group, the shift position of the input data to be incorporated into the output data is inputted in each case. For all values of the data,
And using a lookup table with invalid bits for parts other than the input data, and an address table indicating which input data should be used for each output data and which lookup table should be used to convert the input data, each A general-purpose bit manipulation method characterized by referring to an address table for output data, accessing a look-up table according to the result, and calculating the logical OR of the read data to obtain output data.