JPS617656B2 - - Google Patents
Info
- Publication number
- JPS617656B2 JPS617656B2 JP9929080A JP9929080A JPS617656B2 JP S617656 B2 JPS617656 B2 JP S617656B2 JP 9929080 A JP9929080 A JP 9929080A JP 9929080 A JP9929080 A JP 9929080A JP S617656 B2 JPS617656 B2 JP S617656B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9929080A JPS5725052A (en) | 1980-07-22 | 1980-07-22 | Memory control device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9929080A JPS5725052A (en) | 1980-07-22 | 1980-07-22 | Memory control device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5725052A JPS5725052A (en) | 1982-02-09 |
| JPS617656B2 true JPS617656B2 (en) | 1986-03-07 |
Family
ID=14243506
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9929080A Granted JPS5725052A (en) | 1980-07-22 | 1980-07-22 | Memory control device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5725052A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0233980U (en) * | 1988-08-29 | 1990-03-05 |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59144966A (en) * | 1983-02-08 | 1984-08-20 | Nec Corp | Data processor |
| JPH0520181A (en) * | 1991-07-10 | 1993-01-29 | Fujitsu Ltd | Main memory controller |
| US8253751B2 (en) * | 2005-06-30 | 2012-08-28 | Intel Corporation | Memory controller interface for micro-tiled memory access |
| US7558941B2 (en) * | 2005-06-30 | 2009-07-07 | Intel Corporation | Automatic detection of micro-tile enabled memory |
| US7872892B2 (en) * | 2005-07-05 | 2011-01-18 | Intel Corporation | Identifying and accessing individual memory devices in a memory channel |
-
1980
- 1980-07-22 JP JP9929080A patent/JPS5725052A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0233980U (en) * | 1988-08-29 | 1990-03-05 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5725052A (en) | 1982-02-09 |