JPS6167310A - Agc amplifier circuit - Google Patents

Abstract

PURPOSE:To prevent deterioration by distortion of an output signal, by maintaining the operating current of a transistor (TR) for signal amplification under a fixed condition irrespectively of an external bias for making gain control. CONSTITUTION:When the control voltage of a gain controlling terminal 13 exceeds the reference voltage of another gain controlling terminal 14, a TR11 is turned on and another TR12 is turned off. Under this condition, electric currents flowing to TRs 5 and 6 for signal amplification become halves of the currents set by a constant-current circuit 15 through TRs 9 and 10 connected to diodes. When the control voltage of the terminal 13 becomes lower than the reference voltage of the terminal 14, the TR12 is turned on and TR11 is turned off. Under this condition, the electric currents of the TRs 5 and 6 become halves of the currents set by the constant-current circuit 15 through resistances 7 and 8. In this way, the electric currents of the TRs 5 and 6 are maintained under a constant condition irrespectively of the state of gain control. Therefore, the deterioration by distortion of an output signal is prevented.

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to an AGC amplifier circuit formed using an integrated circuit.

(Prior art) Conventionally, an AGC amplifier circuit formed of a half-core integrated circuit □ with a gain control function is usually configured differentially, and a diode is inserted between the emitters of the transistors making up the differential configuration. A commonly used method is to control the gain by changing the impedance between the schmitters by changing the flowing current with an external bias, and there are many other gain control methods.

However, in either case, if the bias for gain control is changed externally, the current of the transistor for signal amplification also changes, making it impossible to maintain the operating point at one point. Therefore, if the current decreases, the output signal will be distorted. Or to improve distortion when the current decreases,
Since the current value needs to be increased, the current value becomes larger than necessary when the current increases, resulting in an increase in power consumption.

(Object of the Invention) The object of the present invention is to operate a signal amplification transistor regardless of an external bias for gain control.

(Structure of the Invention) The AGC amplifier circuit of the present invention has a base connected to the first and second input terminals, and a collector connected to the first and second output terminals, forming a first differential amplifier circuit. a first and a second transistor, each having one end connected to the emitters of the first and second transistors;
and a second diode, and first and second resistors connected in series between the emitters of the first and second transistors, whose bases are connected to the first and second gain control terminals, respectively, and whose collectors are connected to the first and second gain control terminals, respectively. third and fourth transistors that are connected to a common connection point of the other ends of the first and second diodes and a common connection point of the first and second resistors, respectively, and configure a second differential amplifier circuit; It consists of the following.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing one embodiment of the present invention.9 In this embodiment, the base is connected to the first and second input terminals 1 and 2, respectively.
first and second NPN transistors (hereinafter referred to as transistors →5, 6, which are connected to the first and second output terminals 3 and 4 and whose collectors are respectively connected to the first and second output terminals 3 and 4 and constitute a first differential amplifier circuit); First and second diode-connected transistors 9 and 10 are connected in series between the emitters of transistors 5 and 6, the base and collector of which are respectively connected to the emitters of transistors 5 and 6. The first and second resistors 7.8 have bases connected to the first and second gain control terminals 13.14, respectively, and collectors connected to a common connection point of the emitter of the transistor 9.10 and a common connection point of the resistor 7.8. It is constructed by including third and fourth transistors 11 and 12 connected to the connection point and forming a second differential amplifier circuit.

Note that the collectors of the transistors 5.6 are connected to the power supply terminal 18 via load resistors 16.17, respectively, and the emitters of the transistors 11.12 are commonly connected and connected to the ground potential via the constant current circuit 15.

Next, the operation of this embodiment will be explained.

A reference voltage serving as a reference is temporarily applied to the gain control terminal 14, and a gain control voltage is applied to the other gain control terminal 13. When the gain control voltage at the gain control terminal 13 exceeds the reference voltage at the gain control terminal 14, the transistor 11 is turned on and the transistor 12 is turned off. In this state, the current of the signal amplifying transistors 5 and 6 is 1/2 of the current set by the constant current circuit 15 flowing through the diode-connected transistors 9 and 10. The gain will be maximum, and that gain will increase the emitter current of the transistor. , with the emitter resistance as r6, 26mV7e. =r. r, which is determined by the relationship, and the ratio of the load resistance 16.17 resistance value to RL (RL /
r, , ). (Here, r is the transistor 5
Or 6 r0 + transistor 9 or 10 r,
) Conversely, the gain control voltage of gain control terminal 13 is the gain control voltage of gain control terminal 1.
When the voltage drops below the reference voltage No. 4, transistor 12 is turned on and transistor 11 is turned off. In this state, currents of 1/2 of the current set by the constant current circuit 15 are flowing through the transistors 5 and 6 via the resistor 7.8. The resistance value of resistors 7 and 8 is the resistance of load resistor 16.17.
From the relationship @ (r is the r of transistor 5 or 6), the minimum gain can be made small, and the width between the maximum gain and the minimum gain can be widened.

Further, when both transistors 11 and 12 are on, that is, when the voltages at gain control terminals 13 and 14 are equal, the gain is determined by the emitters of transistors 9 and 10, resistor r6, and resistor 7.
, 8 in parallel is equivalent to 5.6 transistors.

As explained above, according to this embodiment, no matter what state the gain control voltage is in, the current of the signal amplification transistor 5.6 is gain controlled in proportion to the 1/2 relationship set by the constant current circuit 15. Therefore, the reduction in current during gain control that occurs in conventional circuits and the deterioration in distortion of the output signal can be avoided.

The above is an explanation of the reverse AGC operation in which the gain is decreased in the direction of decreasing the voltage at the gain control terminal 13.
If the gain control terminal 13 is selected as the reference voltage and the gain control terminal 14 is selected as the gain control voltage, forward AGC operation is also possible in which the gain is decreased in the direction of increasing the control voltage.

In addition, in the above embodiment, the transistor is NP.
Although N type was used, it goes without saying that the present invention is also applicable to PNP type.

(Effects of the Invention) As described above in detail, the AGC amplifier circuit of the present invention has a reference voltage applied to the gain control terminal to convert the current of the signal amplification transistor constituting the first differential amplifier circuit for signal amplification. and a second differential amplifier circuit that is controlled via a resistor or a diode whose impedance changes depending on the current flowing through itself in response to the gain control voltage, and the gain control voltage flows to the signal amplification transistor in any state. Since gain control is performed while the current is always kept at a constant value, there is an advantage that there is no possibility that the current decreases during gain control and deteriorates the distortion of the output signal as in the conventional case.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention. 1.2...Input terminal, 3.4...Output terminal, 5.6...NPN) transistor, 7.8
...Resistance, 9,10,11°12...
NPNI-transistor, 13.14... Curved gain control terminal, '15... Constant current circuit, 16.17.
...Load resistance, 18...Power supply terminal. Agent Patent Attorney Uchihara -P6, ,-)

Claims (1)

[Claims] first and second transistors having bases connected to first and second input terminals and collectors respectively connected to first and second output terminals and forming a first differential amplifier circuit; and first and second diodes each having one end connected to the emitter of the second transistor, first and second resistors connected in series between the emitters of the first and second transistors, and a base. are the first
and a second gain control terminal, the collectors of which are connected to a common connection point of the other ends of the first and second diodes and a common connection point of the first and second resistors, respectively, a second differential amplification device. An AGC amplifier circuit comprising third and fourth transistors forming the circuit.