JPS6156496A

JPS6156496A - Board for hybrid integrated circuit device

Info

Publication number: JPS6156496A
Application number: JP17871684A
Authority: JP
Inventors: 冨士　昌章
Original assignee: NEC Corp
Current assignee: NEC Corp
Priority date: 1984-08-28
Filing date: 1984-08-28
Publication date: 1986-03-22

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】〔発明の属する技術分野〕本発明は混成集積回路装置用基板で、高集積度で高精度
な多層配線基板に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to a board for a hybrid integrated circuit device, and relates to a highly integrated and highly accurate multilayer wiring board.

[Prior art]

近年、電子機器の大規模、高機能化が進むに従ってこれ
らの機器に使用される混成集積回路装置にはますます、
小型、高集積度が要求されて来ている。小型化し、集積
度を上げるために混成集積回路装置用の基板としては、
一般にセラミック多層配線基板が用いられる。これらの
配線基板は通常、アルミナグリーンシート上に厚［４体
層と厚膜絶縁層とを印刷し、焼成した後、碑体表面層に
メッキ処理を施して製造しているため、次のような欠点
があった。In recent years, as electronic devices have become larger and more sophisticated, the hybrid integrated circuit devices used in these devices have increasingly become
There is a growing demand for smaller size and higher integration. In order to reduce the size and increase the degree of integration, the substrate for hybrid integrated circuit devices is
Generally, a ceramic multilayer wiring board is used. These wiring boards are usually manufactured by printing a thick layer and a thick insulating layer on an alumina green sheet, baking it, and then plating the monument surface layer. There was a drawback.

イ）焼成時の基板の収縮誤差のために、パターン精度が
得られない。b) Pattern accuracy cannot be obtained due to shrinkage error of the substrate during firing.

（ロ）厚膜導体を印刷しているため、導体幅が狭くて平
担なパターンを得ることが難かしい。(b) Since thick film conductors are printed, the conductor width is narrow and it is difficult to obtain a flat pattern.

（ハ）メッキ膜はニッケル、金等の２層構造をとるコト
カ多く、プロセスも複雑で、高価格とな）やすい。(c) Many plating films have a two-layer structure of nickel, gold, etc., making the process complicated and expensive.

[Purpose of the invention]

本発明の目的は、上記欠点を除去し、平担で、高密度、
高精度のパターンを有する混成集積回路装置用基板を低
価格で提供するととＫある。The purpose of the present invention is to eliminate the above-mentioned drawbacks, to provide a flat, high-density,
K provides a substrate for a hybrid integrated circuit device having a highly accurate pattern at a low price.

[Structure of the invention]

本発明の混成集積回路装置用基板は、アルミナグリーン
シート上に、厚膜導体層と厚膜絶縁層とを交互に印刷し
て焼成した後、薄膜導体及び薄膜抵抗等を付着させ、回
路形成して構成する。The substrate for a hybrid integrated circuit device of the present invention is produced by alternately printing thick film conductor layers and thick film insulating layers on an alumina green sheet and baking them, and then attaching thin film conductors, thin film resistors, etc. to form a circuit. Configure.

[Explanation of Examples]

次に本発明による実施例を図面を用いて説明する。第１
図は本発明による混成集積回路装置用基板の断面図及び
その製造方法を示す図である。Next, embodiments according to the present invention will be described with reference to the drawings. 1st
The figure is a cross-sectional view of a substrate for a hybrid integrated circuit device according to the present invention and a diagram showing a method of manufacturing the same.

アルミナグリーンシー）ＩＫタングステン擲体層２．３
及び４と、アルミナ絶縁層５．６及び７とを交互にスク
リーン印刷する。このとき絶縁層５．６．７には、各導
体層の電気的接続をとるためのスルーホール８が開けら
れている。次に導体の酸化を防ぐため、還元性雰囲気で
、焼成して厚膜多層配線基板を形成する（第１図Ａ）。Alumina green sea) IK tungsten shell layer 2.3
and 4 and alumina insulating layers 5, 6 and 7 alternately by screen printing. At this time, through holes 8 are opened in the insulating layers 5, 6, 7 for electrically connecting the respective conductor layers. Next, in order to prevent oxidation of the conductor, it is fired in a reducing atmosphere to form a thick film multilayer wiring board (FIG. 1A).

その後、この基板上にニクロム及び金薄膜９をスパッタ
法又は蒸着法によシ付着させる（第１図Ｂ）。次Ｋ。Thereafter, a thin nichrome and gold film 9 is deposited on this substrate by sputtering or vapor deposition (FIG. 1B). Next K.

１　　　　　　　フォトエツチング法によシ、薄膜導体
９をエツチングして所望のパターンを形成しく第１図Ｃ
）、混成集積回路装置用基板を製造した。1. Etch the thin film conductor 9 to form a desired pattern using a photo-etching method.
), manufactured a substrate for a hybrid integrated circuit device.

〔発明の効果〕か〃・る方法により形成された、混成果槓回路！！装置
用基板は、アルミナグリーンシート上に厚膜を印刷し、
焼成した後、最上層に薄膜導体層を形成しているので、
基板の収縮誤差がなくて精度が、高く、平担で、高密度
のパターンが得られ、又、複雑なメッキプロセスも心安
としないので、安価で、信頼性の高いものとなった。[Effects of the invention] A hybrid output circuit formed by the method! ! The device substrate is made by printing a thick film on an alumina green sheet.
After firing, a thin film conductor layer is formed on the top layer, so
Since there is no shrinkage error of the substrate, a highly accurate, flat, and high-density pattern can be obtained, and since a complicated plating process is not necessary, it is inexpensive and highly reliable.

[Brief explanation of drawings]

第１図（５）〜（ｑは本発明の一実施例の製造工程を説
明する断面図である。なお、図において、１・・・・・・アルミナグリーンシ
ー）、２，３．４・・・・・・厚膜導体層、５，６．７
・・・・・・厚膜絶縁層、８・・・・・・スルーホール
、９・・・・・・薄膜導体層、である。FIG. 1 (5) to (q are cross-sectional views explaining the manufacturing process of an embodiment of the present invention. In the figures, 1...Alumina green sea), 2, 3.4, ... Thick film conductor layer, 5, 6.7
. . . thick film insulating layer, 8 . . . through hole, 9 . . . thin film conductor layer.

Claims

[Claims]

A hybrid circuit characterized in that a circuit is formed by depositing a thin film conductor, a thin film resistor, etc. on a multilayer wiring board formed by alternately printing thick film conductor layers and thick film insulating layers on an alumina green sheet and baking them. Substrate for integrated circuit devices.