JPS615554A - Substrate for mounting semiconductor element - Google Patents

Abstract

PURPOSE:To mount a semiconductor element securely while preventing any crack or breakage due to thermal stress from happening while making the element operate normally and stably for a long time by a method wherein a section placing or containing the semiconductor element is composed of silicon nitride sintered body with thermal expansion coefficient similar to that of the semiconductor element. CONSTITUTION:A sludge comprising silicon nitride powder added with sintering assistant and bonding agent is formed into a sheet. Within such a sheet, an empty space to form a cavity 4 containing semiconductor element 2 as well as a leading hole to lead a conductive pattern 5 from the cavity 4 on a base 3 to the bottom of base 3 are formed and then a conductive pattern 5 to connect the surface of sheet formed of the leading hole and the conductive hole to the semiconductor element 2 and external lead terminals 6 is formed. Next the sheet is laminated to hold the conductive pattern 5 formed on the surface between itself being fixed by thermal pressure to be cut and separated into multiple pairs of packages 1 and further baked to sinter into one body. Finally the external lead terminals 6 made of Koval, etc. are brazed using silver wax material, etc.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to substrates for mounting semiconductor elements, and in particular to multilayer wiring boards and semiconductor packages on which semiconductor elements made of single crystal silicon or the like are mounted and housed. Related to substrate numbers for mounting semiconductor elements such as.

<Background of the Invention> Recently, semiconductor devices made of silicon single crystal, etc.
In particular, integrated circuit elements tend to become larger in size as memory capacity increases and circuit elements become more highly integrated, and the amount of heat generated during operation also tends to increase. Therefore, the semiconductor element mounting substrates on which these semiconductor elements are mounted and housed need to have excellent electrical insulation and high mechanical strength.
It is required that the semiconductor device be made of a material having a coefficient of thermal expansion similar to that of the semiconductor element.

<Problems to be solved by the prior art and the invention> As is well known, aluminum oxide (alumina; AJs
Oa) has excellent electrical insulation properties and high mechanical strength, so it is often used as a material for semiconductor element mounting substrates on which semiconductor elements are placed and housed.

However, this alumina (Al2O5) has a thermal expansion coefficient of 7 to 7.5 x 110-6 K', and a thermal expansion coefficient of 3 to 3.5 x 1 of the silicon single crystal that constitutes the semiconductor element.
It is very different from 0K. Therefore, 1. When joining each electrode of a corresponding semiconductor element using an adhesive material such as a brazing material, the mounting board expands more than the semiconductor element due to the heat that melts the brazing material. There is a disadvantage that positional misalignment occurs between each electrode of the element and the electrical wiring pattern formed on the mounting board, and it is not possible to properly connect each electrode of the semiconductor element to each electrical wiring pattern of the mounting board. This is particularly noticeable in mounting substrates having high-density wiring patterns.

Furthermore, when operating a semiconductor element after mounting it on a mounting board, the heat generated by the semiconductor element generates thermal stress at the joint between the mounting board and the semiconductor element due to the difference in coefficient of thermal expansion between the two. There is also the disadvantage that the semiconductor element may be destroyed or cracked due to thermal stress, making it impossible to operate the semiconductor element normally and stably.

<Object of the Invention> The present invention has been devised in view of the above-mentioned drawbacks, and its purpose is to ensure the connection between each electrode of a semiconductor element and an electrical wiring pattern formed on a substrate for mounting a semiconductor element, and to
To provide a substrate for mounting a semiconductor element, which minimizes the thermal stress applied to the semiconductor element, eliminates cracking or destruction of the semiconductor element, and allows the semiconductor element to always operate normally and stably.

Means for Solving Problems> The substrate for mounting a semiconductor element of the present invention is characterized in that at least a portion on which a semiconductor element is placed and housed is made of a silicon nitride sintered body.

<Function> Hereinafter, the semiconductor element mounting substrate of the present invention will be explained in detail based on the attached FIGS. 1 and 2.

FIG. 1 shows an open perspective view when the semiconductor element mounting substrate of the present invention is applied to a semiconductor package that houses a semiconductor element, in which 1 is a semiconductor package 1, 2 is a semiconductor element made of silicon single crystal, etc. It is. The semiconductor package 1 is made of a silicon nitride sintered body, and is provided with a cavity 4 for mounting and fixing a semiconductor element 2 approximately in the center of a pedestal 3 that constitutes the main part of the package.

Each electrode (not shown) of the semiconductor element 2 is die-bonded to a partially exposed portion 5 of a conductive pattern buried in the pedestal 3 via an adhesive material such as brazing material, and the conductive pattern 5 extends to the bottom surface. An external lead terminal 6 is soldered to one end of each of the terminals provided, thereby forming one lead-out terminal.

A lid member 7 is welded to the top surface of the pedestal 3 using silver brazing material, glass, resin, etc. to close the cavity 4, and the inside of the cavity 4 is hermetically sealed from the outside air to form a semiconductor device. .

According to the present invention, the pedestal 3' to which the semiconductor element 2' is die-bonded has a thermal expansion coefficient of silicon single crystal (3.0 to 3.0.
It is composed of a silicon nitride sintered body having a coefficient of thermal expansion (2.6 to 3.3 x 10 K) extremely close to 5 x 10-' (-1). Therefore, semiconductor element 2
When soldering □ into the cavity 4 of the semiconductor puff cage 1 or when operating the semiconductor element 2, the melting heat of the brazing material or the heat generated by the semiconductor element itself is applied to the semiconductor element 2 and the pedestal 3 of the semiconductor puff cage 1. However, since the thermal expansion coefficients of the semiconductor element 2 and the pedestal 3 are very similar, the amount of thermal expansion of both is approximately the same, and each electrode of the semiconductor element 2 is connected to the conductive pattern 5 formed on the pedestal 3. Proper connection can be achieved without causing positional deviation.

At the same time, the thermal stress caused by the difference in thermal expansion between the two is minimized, eliminating the possibility of cracking or breaking the semiconductor element, allowing the semiconductor element to operate normally and stably. becomes.

The silicon nitride sintered body constituting the pedestal 3 has a volume resistivity of 1014Q-011 or more, which shows extremely excellent electrical insulation, and a dielectric constant (IMHz) (silicon nitride 8 N 0.0
32: Alumina 0.04) and has excellent properties that are almost equal to or better than alumina in terms of mechanical strength, etc., so it is extremely suitable as a material for semiconductor device mounting substrates. .

<Example> Next, a method for manufacturing a semiconductor package made of a silicon nitride sintered body will be described in detail below.

First, sintering aids such as magnesia (MgO), beryllia (Bed), and alumina (AJ!!03) and binders such as polymethyl methacrylate and polyvinyl butyral are added to silicon nitride powder refined to an average particle size of 10 μm or less. This is added to form a slurry, which is then formed into a plurality of sheets by employing a conventionally well-known doctor blade method.

Next, a cavity for forming a cavity portion 4 for housing the semiconductor element 2 and a conductive hole for leading out the conductive pattern from the cavity portion 4 of the pedestal 3 to the bottom surface of the pedestal 3 are each punched out using a conventional well-known method. A conductive pattern 5 for connecting the semiconductor element 2 and the external lead terminal 6 is formed on the surface of the sheet formed by a processing method and in the conductive hole.

The conductive pattern 5 is formed on a sheet by applying a paste made by adding an organic binder and a solvent to high melting point metal powder such as tungsten (B) or molybdenum (MO) using, for example, a screen printing method. is formed.

Next, the conductive pattern 5 formed on the surface of the glue sheet is laminated so as to be sandwiched between the sheets.
Thermocompression bonded at a temperature of 0℃, cut and separated into multiple package shapes, and non-oxidizing atmosphere width of approximately 1300℃~160℃
They are sintered and integrated by firing at a temperature of 0° C., and finally, the external lead terminals 6 made of copal, 42 A11ay, or the like are soldered with silver brazing material or the like.

In the present invention, as shown in FIG. 2, only the plate 8 portion on which the semiconductor element 2 is placed as the pedestal 3 of the semiconductor puff cage 1 is made of silicon nitride, and the sheet 9 with the void space is made of silicon nitride. It is also possible to form it with other materials,
Those skilled in the art will easily understand that this configuration has the same effect as the configuration described above.

<Effects of the Invention> Thus, according to the semiconductor element mounting substrate of the present invention, at least the portion where the semiconductor element is placed and housed is made of a silicon nitride sintered body having a coefficient of thermal expansion similar to that of the semiconductor element. As a result, even if the semiconductor element and the semiconductor element mounting substrate are heated during mounting or operation of the semiconductor element, the semiconductor element can be reliably mounted in the specified position on the mounting substrate, and cracks due to thermal stress on the semiconductor element can be prevented. It is possible to operate the semiconductor device normally and stably for a long period of time without causing any damage or damage. ′

[Brief explanation of drawings]

FIG. 1 is an open perspective view of the semiconductor package of the present invention, and FIG.
The figure is a partially exploded perspective view of the semiconductor package of the present invention. 1... Semiconductor package 2... Semiconductor element 3... Pedestal 4... Cavity part 5... External lead terminal

Claims (1)

[Claims] 1. A substrate for mounting a semiconductor device, characterized in that at least a portion on which a semiconductor device is mounted and housed is made of a silicon nitride sintered body.