JPS6151425B2 - - Google Patents
Info
- Publication number
- JPS6151425B2 JPS6151425B2 JP9852081A JP9852081A JPS6151425B2 JP S6151425 B2 JPS6151425 B2 JP S6151425B2 JP 9852081 A JP9852081 A JP 9852081A JP 9852081 A JP9852081 A JP 9852081A JP S6151425 B2 JPS6151425 B2 JP S6151425B2
- Authority
- JP
- Japan
- Prior art keywords
- resin
- circuit board
- rubber
- sealing
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 229920005989 resin Polymers 0.000 claims description 38
- 239000011347 resin Substances 0.000 claims description 38
- 239000004065 semiconductor Substances 0.000 claims description 20
- 238000001746 injection moulding Methods 0.000 claims description 2
- 238000001721 transfer moulding Methods 0.000 claims description 2
- 238000007789 sealing Methods 0.000 description 12
- 239000007788 liquid Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 4
- 238000004382 potting Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 229910001111 Fine metal Inorganic materials 0.000 description 1
- 239000005062 Polybutadiene Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229920001971 elastomer Polymers 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229920002857 polybutadiene Polymers 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 229920005749 polyurethane resin Polymers 0.000 description 1
- 239000005060 rubber Substances 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【発明の詳細な説明】
本発明は半導体装置に係り、特に回路基板に直
接半導体素子を装着する半導体装置に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and particularly to a semiconductor device in which a semiconductor element is directly mounted on a circuit board.
従来、回路基板に直接半導体素子を装着する半
導体装置では、該半導体素子を封止する方法とし
て液状樹脂をポツテイングする方法が一般に用い
られている。しかしながら、ポツテイング方法に
よる封止においては、液状樹脂が不要な箇所に流
出したり、気泡が生じたり、一定形状に製造でき
ない等の外観不良を生じることが多かつた。さら
に液状樹脂の場合は、硬化に長時間を要するため
作業性が悪くなるという欠点もあつた。またモー
ルド樹脂封止の場合は、一定形状に封止すること
が可能となり、かつ、作業性も大巾に向上すると
いう利点を生むが、回路基板表面の導電層の存在
により凹凸部ができるため、樹脂バリ不良が大量
に発生し、実際にはモールド樹脂封止は極めて困
難であつた。 Conventionally, in semiconductor devices in which a semiconductor element is directly mounted on a circuit board, a method of potting liquid resin has generally been used as a method of sealing the semiconductor element. However, when sealing is performed by the potting method, the liquid resin often flows out to unnecessary locations, bubbles are generated, and appearance defects such as the inability to manufacture the product into a certain shape occur. Furthermore, in the case of liquid resin, it takes a long time to harden, resulting in poor workability. In addition, in the case of mold resin encapsulation, it is possible to encapsulate in a fixed shape and has the advantage of greatly improving workability, but the presence of a conductive layer on the surface of the circuit board creates uneven parts. However, a large amount of resin burr defects occurred, and mold resin sealing was actually extremely difficult.
本発明の目的は、上記ポツテイング封止の欠点
である外観不良や作業性の悪さを無くすべく、樹
脂バリが発生しないトランスフアー又は射出成形
が可能な樹脂封止型半導体装置を提供することに
ある。 An object of the present invention is to provide a resin-sealed semiconductor device that can be transferred or injection molded without generating resin burrs, in order to eliminate the poor appearance and poor workability that are the disadvantages of potting encapsulation. .
上記日的を達成するため、本発明は半導体素子
を直接回路基板に装着し、トランフアー成形又は
射出成形により樹脂封止する半導体装置におい
て、この回路基板における少なくとも樹脂封止部
の外周にゴム状の樹脂層が設けられていることを
特徴とする。 In order to achieve the above objective, the present invention provides a semiconductor device in which a semiconductor element is directly mounted on a circuit board and sealed with resin by transfer molding or injection molding, and in which a rubber-like resin is applied to at least the outer periphery of the resin-sealed portion of the circuit board. It is characterized by being provided with a resin layer.
本発明によれば、ゴム状の樹脂層を設けたこと
により、モールド金型で型締めした際にゴム状の
樹脂層が回路基板の導電層による凹凸を完全に吸
収し、金型と回路基板が密着できるため、樹脂バ
リの発生しないモールド樹脂封止が可能となる。
したがつて、一定形状で外観の良好な製品が得ら
れ、また成形時間も数分で足りるため、作業性も
大巾に向上する。 According to the present invention, by providing the rubber-like resin layer, when the mold is clamped, the rubber-like resin layer completely absorbs the unevenness caused by the conductive layer of the circuit board, and the mold and circuit board Since the resin can be in close contact with each other, mold resin sealing without resin burrs is possible.
Therefore, a product with a constant shape and good appearance can be obtained, and the molding time is only a few minutes, so the workability is greatly improved.
次に本発明の実施例について、図面を用いて説
明する。従来の半導体装置は、第１図ａ及びｂに
示すように半導体載置部を有する回路基板１に半
導体素子２を金属ロー材、接着剤等で接着し、該
半導体素子２と導電層３を金属細線４で接続した
後、液状封止用樹脂の漏れ防止のために樹脂等か
らなる枠５を該回路基板１に接着して、封止用樹
脂６をポツテイングするという方法が一般にとら
れていた。 Next, embodiments of the present invention will be described using the drawings. In a conventional semiconductor device, as shown in FIGS. 1a and 1b, a semiconductor element 2 is bonded to a circuit board 1 having a semiconductor mounting part using a metal brazing material, an adhesive, etc., and the semiconductor element 2 and a conductive layer 3 are bonded together. After connecting with the thin metal wire 4, a method is generally used in which a frame 5 made of resin or the like is adhered to the circuit board 1 to prevent leakage of the liquid sealing resin, and the sealing resin 6 is potted. Ta.
このような構造の場合、均一な外観、形状を得
ることが難しい上に樹脂の硬化に長時間を要し、
作業性が悪かつた。 With such a structure, it is difficult to obtain a uniform appearance and shape, and it takes a long time for the resin to harden.
Workability was poor.
これに対して本発明の実施例による半導体装置
は、第２図ａ及びｂに示すように回路基板１１の
封止予定部の外周となる半導体素子１２の周囲及
び周囲から、回路基板１１の端部に通じる少なく
とも一本のゴム状の樹脂層１５を設けている。モ
ールド樹脂封止する際は、モールド金型１９及び
２０で型締めされ、その後溶融状態のモールド樹
脂がランナー１７，サブランナー１８を通り、回
路基板に設けたゴム状の樹脂層１５の上を通り、
封止部に圧入される。この際、ゴム状の樹脂層１
５は回路基板１１の凹凸を吸収して樹脂バリを生
じないようになつている。なお、このゴム状樹脂
層の材料としては、封止後ランナーを除去するた
めにモールド樹脂とは密着性の悪いものが好まし
く、例えばシリコーン樹脂、ポリウレタン樹脂、
ポリブタジエン樹脂等が挙げられるが、限定され
るものではない。また、封止後このゴム状樹脂層
の不要な部分、例えば本実施例における封止部外
周から回路基板の端部に通じる部分を除去したい
場合は、シリコーン系の型取り剤を用いると効果
的に除去できる。そして、このゴム状樹脂層を形
成する方法としては、液状樹脂をスクリーン印刷
にて回路基板上に形成するか、または所定の形状
のゴム状シートをラミネートする等の方法で容易
に作成できる。なお、ゴム状樹脂層の膜厚として
は回路基板の凹凸を完全に吸収できる程度の厚さ
で十分であるが、それ以上厚いものを用いても有
効なのは言うまでもない。 On the other hand, in the semiconductor device according to the embodiment of the present invention, as shown in FIGS. 2a and 2b, the edge of the circuit board 11 is At least one rubber-like resin layer 15 communicating with the portion is provided. When sealing with a mold resin, the molds are clamped by the molds 19 and 20, and then the molten mold resin passes through the runner 17 and sub-runner 18, and then passes over the rubber-like resin layer 15 provided on the circuit board. ,
It is press-fitted into the sealing part. At this time, the rubber-like resin layer 1
5 is designed to absorb the unevenness of the circuit board 11 and prevent resin burrs from forming. The material for this rubber-like resin layer is preferably one that has poor adhesion to the mold resin in order to remove the runner after sealing, such as silicone resin, polyurethane resin,
Examples include, but are not limited to, polybutadiene resins. In addition, if you want to remove unnecessary parts of this rubber-like resin layer after sealing, for example, the part leading from the outer periphery of the sealing part to the edge of the circuit board in this example, it is effective to use a silicone-based molding agent. can be removed. The rubber-like resin layer can be easily formed by forming a liquid resin on the circuit board by screen printing, or by laminating rubber-like sheets of a predetermined shape. Note that it is sufficient that the rubber-like resin layer has a thickness that can completely absorb the unevenness of the circuit board, but it goes without saying that it is also effective to use a layer that is thicker than that.
第１図ａ及びｂは従来の半導体装置の図で、第
１図ａは上面図、第１図ｂは断面図であり、第２
図ａ及びｂは本発明による半導体装置の一実施例
を示し、第２図ａは上面図、第２図ｂは断面図で
ある。
なお図において、１，１１……回路基板、２，
１２……半導体素子、３，１３……導電層、４，
１４……金属細線、５……樹脂枠、６……液状封
止用樹脂、１５……ゴム状樹脂層、１６……モー
ルド樹脂、１７……ランナー、１８……サブラン
ナー、１９，２０……モールド金型、である。
1A and 1B are diagrams of a conventional semiconductor device, in which FIG. 1A is a top view, FIG. 1B is a sectional view, and FIG.
Figures a and b show an embodiment of the semiconductor device according to the present invention, with Figure 2a being a top view and Figure 2b being a sectional view. In the figure, 1, 11...circuit board, 2,
12... Semiconductor element, 3, 13... Conductive layer, 4,
14... Fine metal wire, 5... Resin frame, 6... Liquid sealing resin, 15... Rubber resin layer, 16... Mold resin, 17... Runner, 18... Sub-runner, 19, 20... ...Mold.
Claims (1)
アー成形又は射出成形により樹脂封止する半導体
装置において、該回路基板における少なくとも樹
脂封止部の外周にゴム状の樹脂層が設けられてい
ることを特徴とする半導体装置。1. A semiconductor device in which a semiconductor element is directly mounted on a circuit board and sealed with resin by transfer molding or injection molding, characterized in that a rubber-like resin layer is provided on at least the outer periphery of the resin-sealed portion of the circuit board. semiconductor devices.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9852081A JPS58159A (en) | 1981-06-25 | 1981-06-25 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9852081A JPS58159A (en) | 1981-06-25 | 1981-06-25 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58159A JPS58159A (en) | 1983-01-05 |
| JPS6151425B2 true JPS6151425B2 (en) | 1986-11-08 |
Family
ID=14221926
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9852081A Granted JPS58159A (en) | 1981-06-25 | 1981-06-25 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58159A (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6150353A (en) * | 1984-08-20 | 1986-03-12 | Oki Electric Ind Co Ltd | Eprom device |
| DE3535365A1 (en) * | 1985-10-03 | 1987-04-09 | Gert Guenther Niggemeyer | HIGH VOLTAGE CAPACITOR IGNITION DEVICE FOR INTERNAL COMBUSTION ENGINES |
| NL9401682A (en) * | 1994-10-12 | 1996-05-01 | Fico Bv | Method for encapsulating a chip, and separation strip and mould half to be used with said method |
| FR2734948B1 (en) * | 1995-05-31 | 1997-07-18 | Sgs Thomson Microelectronics | ENCAPSULATION BOX WITH WELDING BALL ARRAY AND ENCAPSULATION METHOD. |
| DE19729179C2 (en) * | 1997-01-08 | 2001-09-13 | Orient Semiconductor Elect Ltd | Method and devices for potting a semiconductor device with plastic |
| US5982625A (en) * | 1998-03-19 | 1999-11-09 | Advanced Semiconductor Engineering, Inc. | Semiconductor packaging device |
| US6372553B1 (en) * | 1998-05-18 | 2002-04-16 | St Assembly Test Services, Pte Ltd | Disposable mold runner gate for substrate based electronic packages |
| DE19935441A1 (en) * | 1999-07-28 | 2001-03-01 | Siemens Ag | Method and mold for wrapping electronic components |
| US6398547B1 (en) * | 2000-03-31 | 2002-06-04 | L'air Liquide, Societe Anonyme Pour L'etude Et L'exploitation Des Procedes Georges Claude | Oxy-fuel combustion firing configurations and methods |
| KR100789951B1 (en) * | 2006-06-09 | 2008-01-03 | 엘지전자 주식회사 | Light emitting unit manufacturing apparatus and method |
-
1981
- 1981-06-25 JP JP9852081A patent/JPS58159A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58159A (en) | 1983-01-05 |
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