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JPS61293659A - Method for inspecting soldering appearance - Google Patents

Method for inspecting soldering appearance

Info

Publication number
JPS61293659A
JPS61293659A JP13592985A JP13592985A JPS61293659A JP S61293659 A JPS61293659 A JP S61293659A JP 13592985 A JP13592985 A JP 13592985A JP 13592985 A JP13592985 A JP 13592985A JP S61293659 A JPS61293659 A JP S61293659A
Authority
JP
Japan
Prior art keywords
soldering
parts
area
image
window
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13592985A
Other languages
Japanese (ja)
Other versions
JPH0375045B2 (en
Inventor
Tomoharu Nakahara
智治 中原
Kazunari Yoshimura
一成 吉村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP13592985A priority Critical patent/JPS61293659A/en
Publication of JPS61293659A publication Critical patent/JPS61293659A/en
Publication of JPH0375045B2 publication Critical patent/JPH0375045B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Length Measuring Devices By Optical Means (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)

Abstract

PURPOSE:To inspect the deviation and soldering condition of packaged parts with high accuracy by providing two windows to the soldering parts to be inspected and inspecting the soldering condition from the sum and ratio of the measurement areas in the respective windows. CONSTITUTION:The soldered parts 5 of chip parts 4 packaged and soldered onto a printed wiring board 6 are subjected to falling illuminating 3 via the two windows 2 provided above said parts. A television camera picks up the image thereof and applies a signal to a binary coding part 11. The signal is compared with the a prescribed binary coding threshold level in said part and is converted to the binary coded image. The image is inputted to an area measuring part 13. The area of the binary coded image within the region assigned by a window generating part 12 is measured in the part 13. The output from the part 13 is inputted to an arithmetic discrimination part 14 where the measured value is compared with the value stored in a standard table 15 and the normality or abnormality is discriminated.

Description

【発明の詳細な説明】 (技術分野) 本発明はテレビカメラを使用し、印刷配線基板上の半田
付は状態を検査する半田付は外観検査方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a method for inspecting the appearance of soldering on a printed wiring board using a television camera to inspect the condition of soldering.

(背景技術) 部品実装された印刷配線基板を自動半田付けする場合、
半田不足、半田過剰等の半田付は異常が起こるため、実
装後に半田付は状態を検査する必要がある。
(Background technology) When automatically soldering printed wiring boards on which components are mounted,
Abnormalities occur with soldering such as insufficient solder or excessive solder, so it is necessary to inspect the soldering condition after mounting.

一般的には人手による目視検査が行われているが、作業
者により判定基準が一定していないため、半田欠如とい
うような顕著な半田付は異常については大きく判定基準
に差は起こらないが、半田不足、半田過剰というような
微妙な半田付は異常になると大きな差が起こり、正確な
検査を行うことができないという欠点があった。
Generally, visual inspection is carried out manually, but since the judgment criteria are not constant depending on the operator, there is no big difference in the judgment criteria for abnormal soldering such as missing solder, but there is no big difference in the judgment criteria. There was a drawback that if delicate soldering such as insufficient solder or excessive solder became abnormal, a large difference would occur, making it impossible to conduct accurate inspections.

一方、一部では機械による外観検査も行われているが、
半田不足、半田過剰というような微妙な半田付は異常に
ついては検査精度に問題があった。
On the other hand, in some cases mechanical visual inspections are also carried out.
There were problems with inspection accuracy for subtle soldering abnormalities such as insufficient solder or excessive solder.

(発明の目的) 本発明は上記の点に鑑み提案されたものであり、その目
的とするところは、印刷配線基板上の半田付は部におけ
る半田量の過不足を正確に検査することのできる検査方
法を提供することにある。
(Object of the Invention) The present invention has been proposed in view of the above points, and its purpose is to accurately inspect whether the amount of solder is too much or too little in the soldering area on a printed wiring board. The objective is to provide an inspection method.

(発明の開示) 本発明の基本的な特徴は、半田付は検査箇所の中心部と
外縁部とに独立につ、イントウを設定し、各ウィンドウ
内の落射照明による二値化像の測定面積値の和およびそ
の比を用いることにより、半田量の過不足を検査する点
にある。
(Disclosure of the Invention) The basic feature of the present invention is that soldering is performed by setting in-toes independently at the center and outer edges of the inspection area, and measuring the area of the binarized image using epi-illumination in each window. By using the sum of the values and their ratio, it is possible to check whether the amount of solder is too much or too little.

以下、実施例を示す図面に沿って本発明を具体的に説明
する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below with reference to drawings showing embodiments.

第1図は本発明を具体化した検査装置の構成を示したも
のである。図において、4は印刷配線基板6上に実装半
田付けされたチップ部品であり、その半田付は部5に対
して上方から照明部2により落射照明3が行われ、照明
部2の更に上方からテレビカメラ1により撮像が行われ
ろようになっている。テレビカメラ1の信号は二値化部
11に与えられ、所定の二値化閾値レベルと比較されて
二値化像に変換されるようになっており、二値化部11
の出力は面積測定部13に入力され、面積測定部13で
はウィンドウ発生部12で指定されろ領域内の二値化像
の面積が測定されるようになっている。次いで、面S測
定部13の出力は演算・判定部14に入力され、規格テ
ーブル15に記憶された値と測定値とを比較して正常・
異常の判定を行い、判定結果を出力するようになってい
る。なお、10は各部の動作を制御する制御部である。
FIG. 1 shows the configuration of an inspection device embodying the present invention. In the figure, 4 is a chip component that is mounted and soldered on a printed circuit board 6, and the soldering is performed by epi-illumination 3 on the part 5 from above by the illumination part 2, and from further above the illumination part 2. A television camera 1 is arranged to take an image. The signal from the television camera 1 is given to the binarization unit 11, where it is compared with a predetermined binarization threshold level and converted into a binarized image.
The output is input to the area measuring section 13, and the area measuring section 13 measures the area of the binarized image within the area designated by the window generating section 12. Next, the output of the surface S measurement section 13 is input to the calculation/judgment section 14, which compares the measured value with the value stored in the standard table 15 to determine whether it is normal or not.
It is designed to determine abnormalities and output the determination results. Note that 10 is a control section that controls the operation of each section.

しかして、照明部2によ^落射照明3を行い、テレビカ
メラlでチップ部品4を撮像し二値化すると、第2図に
示すように半田不足、半田過剰の部分や、チップの端子
部分のような平坦な金属部分が像として得られる。明白
な半田不足(第2図C)の場合には、従来のように検査
箇所に1つのウィンドウを設定し、測定面積値の大小に
より判定が下せるが、微妙な不足(第2図B)のような
場合には面積だけでは正常な半田付は状態(第2図A)
と区別することができず判定できない。
When epi-illumination 3 is applied to the illumination unit 2 and the chip component 4 is imaged and binarized with a television camera 1, as shown in FIG. A flat metal part like this is obtained as an image. In the case of obvious solder shortage (Fig. 2 C), a single window is set at the inspection point as in the past, and a judgment can be made based on the size of the measured area value, but in the case of a subtle solder shortage (Fig. 2 B) In such cases, the area alone indicates normal soldering (Figure 2 A).
cannot be distinguished and cannot be determined.

そこで、本発明では微妙な半田不足(第2図B)や半田
過剰(第2図D)の場合には半田付は部の中心付近に二
値化像が得られることを利用し、第3図(イ)のように
半田付は部の外縁部と中心部とに独立にウィンドウa、
bを設定して、夫々の検査ウィンドウ内における像の面
積値の様子から正確な半田付は状態を検出するようにし
ている。
Therefore, in the present invention, in the case of slight solder shortage (Figure 2B) or excess solder (Figure 2D), the third As shown in figure (a), soldering is performed independently on the outer edge and center of the window a,
By setting b, the accurate soldering state is detected from the area value of the image within each inspection window.

具体的には、第1図の面8!測測定13において、外縁
部ウィンドラミ、中心部つィンドウb内の二値化像の面
積を同時に測定し、得られた面積S、、Sl、より第1
図の演算判定部14において次の処理を行って判定を下
す。
Specifically, surface 8 in Figure 1! In measurement 13, the areas of the binarized images in the outer edge window ram and the center window b are simultaneously measured, and from the obtained areas S, , Sl, the first
The calculation/judgment unit 14 shown in the figure performs the following processing to make a determination.

■ウィンドウa、bの面積S 、、s’ 5iibの和
S。
■Sum of areas S of windows a and b, , s' 5iib.

およびウィンドウa、b内の測定面積S、pS5の和S
を求める。
and measurement area S in windows a and b, sum S of pS5
seek.

■検査箇所のウィンドウ面積和S、に対する測定面積和
Sの比S/S、を求め、この値が規格値αより大きけれ
ば半田付は異常と判定する(明白な半田不足(第2図C
)の場合。)■測定面積和Sが規格値αより小さく、か
つ中心部の測定面積Sbが規格値βより小さい場合には
、正常と判定する(半田付は正常(第2図A)の場合。
■ Find the ratio S/S of the measured area sum S to the window area sum S of the inspection location, and if this value is larger than the standard value α, the soldering is determined to be abnormal (obvious solder shortage (Fig. 2 C).
)in the case of. ) If the sum of the measured areas S is smaller than the standard value α and the measured area Sb at the center is smaller than the standard value β, it is determined to be normal (if the soldering is normal (Fig. 2 A)).

) ■測定面積和Sは小さいが中心部の測定面積Sl、が大
きい場合には、中心部の測定面′IaSI。
) ■If the sum of the measurement areas S is small but the measurement area Sl at the center is large, the measurement surface 'IaSI at the center.

に対する外縁部の測定面積S、の比S、/S。The ratio of the measured area S, of the outer edge to S, /S.

をとり、この値が規格値γより大きい場合には正常と判
定し、小さい場合には異常と判定する。
If this value is larger than the standard value γ, it is determined to be normal, and if it is smaller, it is determined to be abnormal.

すなわち、第2図A、B、Cの各場合における検査ウィ
ンドウ内の二値化像の様子を第3図(ロ)に示すが、半
田欠如Cは二値化像の面積が圧倒的に大きいため上記の
■の処理で判定することができ、また、正常Aと不足B
とは二値化像の面81If!けでは区別できないが、不
足Bの場合には中心部の測定面積Sbに対する外縁部の
測定面積S、の比S、/Sbが小さくなるので、正常A
と明確に区別できるわけである。
In other words, Fig. 3 (B) shows the state of the binarized image within the inspection window in each case of A, B, and C in Fig. 2, and the area of the binarized image is overwhelmingly large in solder deficiency C. Therefore, it can be determined by the process of ■ above, and normal A and insufficient B
is the surface 81If of the binarized image! Although it is not possible to distinguish between the two, in the case of deficiency B, the ratio S, /Sb of the measured area S of the outer edge to the measured area Sb of the center becomes small, so it is normal A.
can be clearly distinguished.

なお、以上の演算判定処理の流れを第4図に示す。The flow of the above calculation and determination process is shown in FIG.

(発明の効果) 以上のように本発明にあっては、半田付は検査箇所に2
つのウィンドウを設け、各ウィンドウ内の測定面積の和
および測定面積の比をもって半田付は状態を検査するよ
う、にしたので、半田欠如というような顕著な半田付は
異常の検査に加え、半田不足、半田過剰というような微
妙な半田付は異常も検査することが可能となり、かつ、
アルゴリズムがシンプルなため高速検査が行える効果が
ある。
(Effects of the Invention) As described above, in the present invention, soldering is performed at two locations to be inspected.
Two windows were set up, and the soldering condition was inspected based on the sum of the measured areas and the ratio of the measured areas within each window. Therefore, in addition to inspecting for abnormal soldering, noticeable soldering such as lack of solder is also detected. , it becomes possible to inspect subtle soldering abnormalities such as excessive solder, and
Since the algorithm is simple, it has the effect of allowing high-speed inspection.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は検出判定機構の構成図、第2図はチップ部品に
おける各半田付は状態とその時の検出二値化像、第3図
はウィンドウとウィンドウ内二値化像検出例、第4図は
演算判定線処理の流れ図である。 1・・・・・・テレビカメラ、2・・・・・・照明部、
3・・・・・・落射照明、4・・・・・・チップ部品、
5・・・・・・半田付は部、6・・・・・・印刷配線基
板、7・・・・・・反射光、10・・・・・・制御部、
11・・・・・・二値化部、12・・・・・・ウィンド
ウ発生部、13・・・・・・面積測定部、14・・・・
・・演算判定部、15・・・・・・規格テーブル
Figure 1 is a configuration diagram of the detection/judgment mechanism, Figure 2 is the state of each solder on a chip component and the binary image detected at that time, Figure 3 is an example of a window and a binary image detected within the window, Figure 4 is a flowchart of calculation judgment line processing. 1...TV camera, 2...Lighting section,
3... Epi-illumination, 4... Chip parts,
5... Soldering part, 6... Printed wiring board, 7... Reflected light, 10... Control part,
11...Binarization section, 12...Window generation section, 13...Area measurement section, 14...
...Calculation judgment section, 15...Standard table

Claims (1)

【特許請求の範囲】[Claims] 印刷配線基板上の半田付け状態を検査する方法において
、検査箇所にあらかじめ中心部と外縁部とに分離した検
査ウィンドウを設定し、落射照明によりテレビカメラか
ら得られる像の二値化像を使って検査ウィンドウ内の二
値化像面積を測定し、中心部と外縁部の各検査ウィンド
ウ内の測定面積和がウィンドウ面積和に占める割合と、
中心部の検査ウィンドウ内の測定面積に対する外縁部の
検査ウィンドウ内の測定面積の比とにより、半田付け状
態が正常であるか異常であるかを検査することを特徴と
した半田付け外観検査方法。
In a method of inspecting the soldering condition on a printed wiring board, an inspection window is set up in advance at the inspection location, with the center and outer edges separated, and a binarized image of the image obtained from a television camera is used with epi-illumination. Measure the binarized image area within the inspection window, and calculate the ratio of the sum of the measured areas within each inspection window at the center and the outer edge to the sum of the window areas,
A soldering appearance inspection method characterized by inspecting whether a soldering condition is normal or abnormal based on the ratio of the measured area within an outer edge inspection window to the measured area within a central inspection window.
JP13592985A 1985-06-24 1985-06-24 Method for inspecting soldering appearance Granted JPS61293659A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13592985A JPS61293659A (en) 1985-06-24 1985-06-24 Method for inspecting soldering appearance

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13592985A JPS61293659A (en) 1985-06-24 1985-06-24 Method for inspecting soldering appearance

Publications (2)

Publication Number Publication Date
JPS61293659A true JPS61293659A (en) 1986-12-24
JPH0375045B2 JPH0375045B2 (en) 1991-11-28

Family

ID=15163146

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13592985A Granted JPS61293659A (en) 1985-06-24 1985-06-24 Method for inspecting soldering appearance

Country Status (1)

Country Link
JP (1) JPS61293659A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6473205A (en) * 1987-09-14 1989-03-17 Agency Ind Science Techn Apparatus for inspecting soldering of printed wiring board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6473205A (en) * 1987-09-14 1989-03-17 Agency Ind Science Techn Apparatus for inspecting soldering of printed wiring board

Also Published As

Publication number Publication date
JPH0375045B2 (en) 1991-11-28

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