JPS61271891A - Manufacture of hybrid ic - Google Patents
Manufacture of hybrid icInfo
- Publication number
- JPS61271891A JPS61271891A JP60114485A JP11448585A JPS61271891A JP S61271891 A JPS61271891 A JP S61271891A JP 60114485 A JP60114485 A JP 60114485A JP 11448585 A JP11448585 A JP 11448585A JP S61271891 A JPS61271891 A JP S61271891A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- hole
- hybrid
- thick
- printed resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は回路基板の対向する両主表面に夫々回路パター
ンが形成されるとともに、少なくともその一主表面に厚
膜印刷抵抗体が形成されてなるハイブリッドICの製造
方法に関する。Detailed Description of the Invention (Industrial Application Field) The present invention is characterized in that circuit patterns are formed on both opposing main surfaces of a circuit board, and a thick film printed resistor is formed on at least one of the main surfaces. The present invention relates to a method of manufacturing a hybrid IC.
(従来技術)
一般に、この種のハイブリッドICにおいて、回路基板
の対向する両主表面に夫々形成された回路パターンは、
回路基板の厚み方向に形成されたスルーホールを通して
相互に接続される。(Prior Art) Generally, in this type of hybrid IC, the circuit patterns formed on both opposing main surfaces of the circuit board are:
They are interconnected through through holes formed in the thickness direction of the circuit board.
従来、ハイブリッドICの回路基板にスルーホールを形
成するには、スルーホールを形成する位置に孔を開けた
回路基板に導電ぺ一又トにより回路パターンを印刷する
とき、吸引治具にて回路基板の上記孔i 1)空気を吸
引し、印刷された回路パターンの導電ペーストを、吸引
される空気とともに上記孔の内部に引き込んで、上記孔
の内壁面に導電膜を形成する印刷吸引方式と呼ばれる手
法が採用されている。Conventionally, in order to form through holes in the circuit board of a hybrid IC, when printing a circuit pattern using conductive tape on a circuit board with holes drilled at the positions where the through holes are to be formed, the circuit board is removed using a suction jig. 1) This is called a printing suction method in which air is sucked and the conductive paste of the printed circuit pattern is drawn into the hole along with the sucked air to form a conductive film on the inner wall surface of the hole. method has been adopted.
ところで、この印刷吸引方式では、吸引される空気とと
もに導電ペーストを回路基板の孔の内部に引き込み、回
路基板に形成された孔の内壁面に確実に導電膜を形成す
るのは難しく、スルーホール密度の高い回路基板や孔形
状の複雑なもの・スルーホールの形成が困難となり、ハ
イブリッドICの製造時の歩留りが低いという問題があ
った。By the way, with this printing suction method, it is difficult to draw the conductive paste into the holes of the circuit board along with the suctioned air, and to reliably form a conductive film on the inner wall surface of the holes formed in the circuit board. There was a problem in that it was difficult to form circuit boards with high densities, complex hole shapes, and through holes, resulting in low yields during the production of hybrid ICs.
導電ペーストの材料としては一般に銀(Ag)−パラジ
ウム(Pd)が使用されており、最近、より安価な材料
としてm(Cu )ペーストも使用されているが、銅ペ
ーストを使用するものでは窒素雰囲気中で焼き付ける関
係で溶剤やバインダの材質に制約をうける結果、回路基
板の孔に銅ペーストが吸引されにく)、吸引された銅ペ
ーストの厚みが不均一になり易い、このように厚みが不
均一になると、銅ペーストの焼付時に割れやクランクが
発生し、信頼性のあるスルーホールが更に得難(なる。Silver (Ag)-palladium (Pd) is generally used as a material for conductive paste, and m(Cu) paste has recently been used as a cheaper material, but those using copper paste require a nitrogen atmosphere. (As a result of restrictions on the solvent and binder materials used in baking, it is difficult for the copper paste to be sucked into the holes in the circuit board), and the thickness of the suctioned copper paste tends to be uneven. If it becomes uniform, cracks and cranks will occur during baking of the copper paste, making it even more difficult to obtain reliable through holes.
一方、両面プリント回路基板のスルーホールの形成に採
用されているスルーホールメッキ法は、久ルーホールを
形成する孔が複雑な形状を有していても、スルーホール
メッキ膜の厚みは比較的均一ならのが得られ、その信頼
性も高い。On the other hand, the through-hole plating method that is used to form through-holes on double-sided printed circuit boards requires that the thickness of the through-hole plating film be relatively uniform even if the hole forming the through-hole has a complicated shape. can be obtained, and its reliability is high.
そこで、ハイブリッドICの製造にもこのスルーホール
メッキ法を採用することが考えられるが、酸化ルテニウ
ム等のメタルグレーズ系の材料を使用した厚膜印刷抵抗
体を有するハイブリッドICを製造する場合、スルーホ
ールメッキ後に厚膜印刷抵抗体を形成すると、厚膜印刷
抵抗体とスルーホールメッキにより形成されたスルーホ
ールメッキ膜とが反応したり、厚膜印刷抵抗体の焼成時
にスルーホールメッキ膜が酸化してしまう問題がある。Therefore, it is conceivable to adopt this through-hole plating method for manufacturing hybrid ICs, but when manufacturing hybrid ICs with thick-film printed resistors using metal glaze materials such as ruthenium oxide, through-hole plating If a thick-film printed resistor is formed after plating, the thick-film printed resistor and the through-hole plating film formed by through-hole plating may react, or the through-hole plating film may be oxidized during firing of the thick-film printed resistor. There is a problem with it.
また、上記とは逆に、厚膜印刷抵抗体を形成した後にス
ルーホールメッキを行なうと、厚膜印刷抵抗体の焼成中
にその表面に浮き出したガラス成分のためにスルーホー
ルメッキ膜の厚膜印刷抵抗体への接続が確実に行なえな
い。さらに、スルーホールメッキの前に厚膜印刷抵抗体
を形成すると、厚膜印刷抵抗体の表面カリツキ液で汚染
され、厚膜印刷抵抗体の電気特性が変化してしまうので
、厚膜印刷抵抗体を形成した後に、スルーホールメッキ
を行なうことはできなかった。In addition, contrary to the above, if through-hole plating is performed after forming a thick-film printed resistor, the thick film of the through-hole plating film will be removed due to the glass component that has risen to the surface during firing of the thick-film printed resistor. Connection to the printed resistor cannot be made reliably. Furthermore, if the thick-film printed resistor is formed before through-hole plating, the surface of the thick-film printed resistor will be contaminated with the thickening liquid, which will change the electrical characteristics of the thick-film printed resistor. It was not possible to perform through-hole plating after forming.
(発明の目的)
本発明はハイブリッドICの製造方法における上記問題
点を解消すべくなされたものであって、スルーホールに
よる回路パターンの接続の信頼性が高く、高精度な厚膜
印刷抵抗体を有する製造容易なハイブリッドICの製造
方法を提供することを目的としている。(Object of the Invention) The present invention has been made in order to solve the above-mentioned problems in the method of manufacturing a hybrid IC, and it is an object of the present invention to provide a high-precision thick-film printed resistor with high reliability in connection of circuit patterns using through holes. An object of the present invention is to provide a method for manufacturing a hybrid IC that is easy to manufacture.
(発明の構成)
このため、本発明は、厚膜印刷抵抗体を有するハイブリ
ッドICの製造方法において、回路基板に予め厚膜印刷
抵抗体と回路パターンとを形成しておき、この回路基板
のスルーホールを形成すべき孔とその近傍とを残して回
路基板の両主表面にメツキレジスF膜を形成し、この回
路基板をメッキ液に浸漬して回路基板の上記孔とその近
傍にスルーホールメッキ膜を形成した後、回路パターン
に素子を取り付けることを特徴としている。すなわち、
本発明は、ハイブリッドIcのスルーホールをスルーホ
ールメッキによって形成するに際し、回路基板に形成さ
れた厚膜印刷抵抗水をメツキレジスF膜で覆い、厚膜印
刷抵抗体がメッキ液に接触しない状態でスルーホールメ
ッキを行なう。(Structure of the Invention) Therefore, the present invention provides a method for manufacturing a hybrid IC having a thick film printed resistor, in which a thick film printed resistor and a circuit pattern are formed on a circuit board in advance, and a through-hole of the circuit board is provided. A through-hole plating film is formed on both main surfaces of the circuit board, leaving the hole where the hole is to be formed and its vicinity, and the circuit board is immersed in a plating solution to form a through-hole plating film on the hole and its vicinity of the circuit board. The feature is that after forming the circuit pattern, the elements are attached to the circuit pattern. That is,
When forming the through-holes of hybrid IC by through-hole plating, the present invention covers the thick-film printed resistor water formed on the circuit board with the Metzukiregis F film, and allows the thick-film printed resistor to pass through without coming into contact with the plating solution. Perform hole plating.
(発明の効果)
本発明によれば、スルーホールメッキは、回路基板に形
成された厚膜印刷抵抗体がスルーホールメッキ膜で覆わ
れた状態で行なわれるので、厚膜印刷抵抗体カリツキ浴
中に浸漬されることがなく、厚膜印刷抵抗体を有するハ
イブリッドICの製造にスルーホール形成の信頼性の高
いスルーホールメッキ法を採用することができ、ハイブ
リッドICの製造時の歩留りが高く、信頼性の高いハイ
ブリッドICを得ることができる。(Effects of the Invention) According to the present invention, through-hole plating is performed with the thick-film printed resistor formed on the circuit board covered with the through-hole plating film. The through-hole plating method, which is highly reliable in forming through-holes, can be used to manufacture hybrid ICs with thick-film printed resistors without being immersed in water. A hybrid IC with high performance can be obtained.
(実施例) 以下、添付図面を参照しっ・本発明の詳細な説明する。(Example) Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
先ず、第1図(、)に示すように、アルミナ(A120
、)等の材料からなるハイブリッドICの回路基板1を
用意する。この回路基板lには、スルーホールを形成す
る位置に予め厚み方向に貫通する孔1aを形成しておく
。First, as shown in Figure 1 (,), alumina (A120
A hybrid IC circuit board 1 made of materials such as , ) is prepared. A hole 1a penetrating in the thickness direction is previously formed in this circuit board l at a position where a through hole is to be formed.
上記回路基板1には、第1図(b)に示すように、抵抗
体として高い信頼性を有する、たとえば酸化ルテニウム
等のメタルグレーズ系の抵抗材料を印刷して約850℃
の温度で焼き付け、厚膜印刷抵抗体2を形成する。As shown in FIG. 1(b), the circuit board 1 is printed with a metal glaze-based resistance material such as ruthenium oxide, which has high reliability as a resistor, and is heated to approximately 850°C.
The thick film printed resistor 2 is formed by baking at a temperature of .
その後、回路基板1の対向する両主表面には、第1図(
c)に示す上)に、鋸等の導電材料からなる導電ペース
トを印刷し、厚膜印刷抵抗体2の焼付温度よりも低い6
00℃程度の温度で焼き付け、回路パターン3−1.3
−2.・・・および4−1゜4−2.・・・を夫々形成
する。Thereafter, on both opposing main surfaces of the circuit board 1, as shown in FIG.
A conductive paste made of a conductive material such as a saw is printed on the top) shown in c), and the temperature is lower than the baking temperature of the thick film printed resistor 2.
Baked at a temperature of about 00℃, circuit pattern 3-1.3
-2. ...and 4-1°4-2. ... are formed respectively.
なお、回路パターン3−1.3−2.・・・および4−
1.4−2.・・・の材料として銅を使用する場合には
、厚膜印刷抵抗体2の焼付時に銅が酸化するのを防止す
るため、厚膜印刷抵抗体2を形成した後、回路パターン
3−1.3−2.・・・および4−1.4−2.・・・
を印刷後、窒素(N2)の雰囲気中で焼成することが好
ましいが、上記回路パターン3−1.3−2.・・・お
よび4−1.4−2.・・・の材料として空気中での焼
付処理が可能な銀−パラジウムを使用する場合には、回
路パターン3−1.3−2.・・・および4−1.4−
2.・・・を形成した後、厚膜印刷抵抗体2を形成する
こともできる。Note that circuit pattern 3-1.3-2. ...and 4-
1.4-2. When copper is used as the material for the thick film printed resistor 2, in order to prevent the copper from oxidizing when the thick film printed resistor 2 is baked, after forming the thick film printed resistor 2, the circuit pattern 3-1. 3-2. ...and 4-1.4-2. ...
After printing, it is preferable to bake in a nitrogen (N2) atmosphere, but the circuit pattern 3-1.3-2. ...and 4-1.4-2. When silver-palladium, which can be baked in air, is used as the material for circuit pattern 3-1.3-2. ...and 4-1.4-
2. After forming..., the thick film printed resistor 2 can also be formed.
上記厚膜印刷抵抗体2および回路パターン3−1.3−
2.・・・および4−1.4−2の上には、第1図(d
)に示すよろに、又ルーホールを形成する回路基板1の
孔1aおよびその近傍を残して、メッキレジスト膜5お
よび6を形成する。The above thick film printed resistor 2 and circuit pattern 3-1.3-
2. ...and above 4-1.4-2, there is a
), plating resist films 5 and 6 are formed leaving the hole 1a of the circuit board 1 where the through hole is to be formed and the vicinity thereof.
このように厚膜印刷抵抗体2および回路パターン3−1
.3−2.・・・および4−1.4−2.・・・上にメ
ッキレジスト膜5および6を形成後、全体をたとえば銅
の無電解メッキ液中に浸漬する。これに上))、第1図
(e)に示すように、回路基板1の上記孔1aおよびそ
の近傍に、回路パターン3−1と回路パターン4−1と
を電気的に接続するスルーホールメッキ膜7が形成され
る。In this way, thick film printed resistor 2 and circuit pattern 3-1
.. 3-2. ...and 4-1.4-2. After forming the plating resist films 5 and 6 thereon, the whole is immersed in, for example, an electroless plating solution for copper. As shown in FIG. 1(e), through-hole plating is applied to the hole 1a of the circuit board 1 and its vicinity to electrically connect the circuit pattern 3-1 and the circuit pattern 4-1. A membrane 7 is formed.
その後、第1図(d)の工程で形成されたメッキレジス
ト膜5および6を除去し、回路パターン3−1.3−2
.・・・および4−1.4−2.・・・の必要な個所に
、コンデンサやトランジスタ等の素子8を半田付けする
。Thereafter, the plating resist films 5 and 6 formed in the step of FIG. 1(d) are removed, and the circuit pattern 3-1.3-2 is removed.
.. ...and 4-1.4-2. Solder elements 8 such as capacitors and transistors to the necessary locations.
このよ)に、信頼性の高いスルーホールメッキ法を利用
してハイブリッドICのスルーホールを形成することが
できる。In this way, through-holes in a hybrid IC can be formed using a highly reliable through-hole plating method.
第1図(a)、第1図(b)、第1図(C)、第1図(
d)および第1図(e)は夫々本発明に係るハイブリッ
ドICの製造方法の一実施例の説明図である。
1・・・回路基板、 1a・・・孔、 2・・・厚
膜印刷抵抗体、 3−1.3−2.・・・お上び4−1
.4−2 ・・・・・・回路パターン、 5,6・・
・メッキレジスト膜、 7・・・スルーホールメッキ
膜、 訃・・素子。
特許出願人 株式会社村田製作所
代 理 人 弁理士 青 山 葆ばか2名第11
CIFigure 1(a), Figure 1(b), Figure 1(C), Figure 1(
d) and FIG. 1(e) are explanatory diagrams of an embodiment of the method for manufacturing a hybrid IC according to the present invention, respectively. DESCRIPTION OF SYMBOLS 1... Circuit board, 1a... Hole, 2... Thick film printed resistor, 3-1.3-2.・・・Oagebi 4-1
.. 4-2...Circuit pattern, 5,6...
・Plating resist film, 7...Through-hole plating film, 7...Element. Patent applicant Murata Manufacturing Co., Ltd. Representative Patent attorney Aoyama Baka 2 people No. 11
C.I.
Claims (1)
が形成されるとともに、少なくともその一主表面に厚膜
印刷抵抗体が形成され、回路基板の両主表面の回路パタ
ーンに形成された接続部が夫々回路基板の厚み方向に形
成されたスルーホールを通して接続されてなるハイブリ
ッドICの製造方法において、 回路基板に予め厚膜印刷抵抗体と回路パターンとを形成
しておき、この回路基板のスルーホールを形成すべき孔
およびその近傍を残して回路基板の両主表面にメッキレ
ジスト膜を形成し、この回路基板をメッキ液に浸漬して
回路基板の上記孔およびその近傍にスルーホールメッキ
膜を形成した後、回路パターンに素子を取り付けること
を特徴とするハイブリッドICの製造方法。(1) A circuit pattern is formed on each of the opposing main surfaces of the circuit board, a thick film printed resistor is formed on at least one of the main surfaces, and connections are formed on the circuit patterns on both main surfaces of the circuit board. In a method for manufacturing a hybrid IC in which parts are connected through through holes formed in the thickness direction of a circuit board, a thick film printed resistor and a circuit pattern are formed on the circuit board in advance, and the through holes of the circuit board are connected to each other through through holes formed in the thickness direction of the circuit board. A plating resist film is formed on both main surfaces of the circuit board, leaving the hole where the hole is to be formed and its vicinity, and the circuit board is immersed in a plating solution to form a through-hole plating film on the hole and its vicinity of the circuit board. A method for manufacturing a hybrid IC, which comprises attaching an element to a circuit pattern after formation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60114485A JPS61271891A (en) | 1985-05-28 | 1985-05-28 | Manufacture of hybrid ic |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60114485A JPS61271891A (en) | 1985-05-28 | 1985-05-28 | Manufacture of hybrid ic |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61271891A true JPS61271891A (en) | 1986-12-02 |
Family
ID=14638929
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60114485A Pending JPS61271891A (en) | 1985-05-28 | 1985-05-28 | Manufacture of hybrid ic |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61271891A (en) |
-
1985
- 1985-05-28 JP JP60114485A patent/JPS61271891A/en active Pending
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