JPS61251397A - Exchange test method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] This is a test method for switching equipment that verifies disturbances in the time series of time slots in a multi-slot connection that connects to multiple channels and transmits data. A test device was needed to do this.

The present invention provides a self-testing method that utilizes the -0 set of transmitting and receiving terminal stations of an exchange, transmitting a pattern signal to the network under test, receiving the output pattern signal at the receiving terminal station, and comparing the transmitting and receiving patterns. It is something.

[Industrial application field]

The present invention relates to an exchange testing method for verifying the time series of time slots in a multi-slot connection.

In recent years, as data processing devices have become faster, attempts have been made to transmit high-speed data using multi-slot connections.

This transmission method is a method in which devices are connected to multiple channels of a transmission line and data is transmitted in time series (referred to as multi-slot connection), and the execution speed of the line can be improved. For example, if n channels are connected to a time-division transmission line with a rate of 64 bits/second and transmitted, the effective speed can be increased by n times.

In the above method, the time sequence of signals between channels must be maintained during transmission, but there is a possibility that the time sequence between channels may be disrupted during exchange due to transmission delays or differences in characteristics of the exchange equipment intervening in the line. be.

Therefore, there is a need for a simple method for testing the switching function of a digital switch in the multi-slot connection.

[Conventional technology]

The conventional technology will be explained below.

First, the aforementioned problems in multi-slot connections will be explained in detail.

FIG. 2(a) is a diagram showing a digital line network.1.
2 is a data processing device, 3 to 5 are digital exchanges, lO
O represents a multi-slot connection, and 101 and 102 represent PCM transmission lines.

In the above digital line network, the data processing device 1.2
When a multi-slot connection is made, the digital exchange 3 connects time-divided channels i and t as shown in FIG.
+1. t+2 (each is called a time slot)
and digital exchange 4 transmits on channel L j
"1*j" is tangent-exchanged to 2 and transmitted to the digital exchange 5. Note that multi-slot connections are usually made using dedicated lines, and the above connections are designated to digital exchanges.

If the time sequence of the time slots is disrupted during this exchange connection,
The received data processing device 2 becomes unreadable.

Digital exchanges 3 to 5 have a plurality of 32-channel PCM terminal stations and are capable of exchanging, for example, 1024 channels, but there are transmission delays and differences in characteristics in each terminal station and each function within the exchange, and Disturbances may occur in the time series.

The above-mentioned phenomenon is unique to each channel. Therefore, conventionally, as shown in FIG. Connected to test the switching function of a digital exchange.

In order to facilitate understanding of the present invention, a general description of a conventional digital exchange will be given below.

〔composition〕

FIG. 2 (dl shows a block diagram of a digital exchange including a PCM terminal station. In the figure, 8 is a microprocessor MPU that performs exchange control.

9a-1, 9a-2, 9b-1, 9b-2 are PCM terminal stations; A1. A2...Bl, B2... are transmitting/receiving units each having 32 channels, 15a, 15b are reception data memories that store the reception data of each PCM terminal station in channel order, and 16a, 16b are exchange controlled and store transmission data. A transmission data memory, 17 a control memory that stores control information for controlling exchange, 18 a main memory that stores programs, etc., 19 a typewriter, and 20 a synchronization section that generates synchronization signals to each section.

[Configuration of transmitter/receiver units AI and Bl]

10a and 10b are PCM terminal stations 9a-1゜9b-, respectively.
1, 11a and llb are receive data buffers that temporarily store received data, 12a and 12b are transmit data buffers that temporarily store transmit data, and 13a and 13b are temporarily stored receive line signals. Buffer R3M.

Buffers SSM 14a and 14b temporarily store transmission line signals.

It is.

[Operation explanation]

The transmitting/receiving units A and B have the same configuration as described above and can transmit and receive 32 channels by each PCM terminal station, and a plurality of units are provided depending on the number of channels.

Below, 3 from PCM terminal station 9a-1 to PCM terminal station 9b-1
The 2-channel exchange function will be explained.

When the PCM signal consists of 32 channels,
The first channel is used for controlling between exchanges, and the 16th channel is used for line connection.The received PCM signal is decoded by the communication control unit 10a, and the data channels are sent to the received data buffer lla, the first channel,
The signals of the 16th channel are stored in respective buffers.

(The buffer for the first channel is not shown) Continuous NOs are attached to each channel, and the receive data buffer ll
The contents of a are stored in the corresponding area of the received data memory 15a. The MPU 8 uses the control memory 17 to determine the exchange destination for each channel, and stores the contents of the received data memory 15a in the corresponding area of the transmitted data memory 16b.

The communication control unit 10b sends the data to the transmission data buffer 1.
2b and transmit it to the PCM9 station 9b-1.

R3M13.a stores line signals for 30 channels for line connection, and the MPU 8 determines the channel of the other party based on the line signal and sends it to the other party 55M1.
4b and stores the channel information in the control memory 17. At the same time, an empty channel is searched and the assigned channel information is stored in the control memory 17.

The control memory 17 has a storage area corresponding to the transmission data buffer 16b, and stores the storage address from the reception data memory 15a to the transmission data memory 16b following identification information for data transmission and R3M data based on flags. There is.

Note that the line signal stored in the 55M14b is stored in the 16th channel of the corresponding frame in the transmission data memory 16b.

Although only one direction has been described above, each terminal station is equipped with a transmitting/receiving means as shown in the figure, and bidirectional transmission is possible.

As described above, the data transmitted from the exchanges in each direction is exchanged and transmitted to the other party.

As mentioned above, the time series of the time slots is determined by the synchronization unit 2.
Although synchronization is achieved with 0, the time series may be reversed due to synchronization deviation of the PCM signal, transmission delay of each function, delay of synchronization signal, difference in characteristics, etc.

[Problem that the invention seeks to solve]

As explained above, it is necessary to check the time series of time slots due to differences in the characteristics of each part, and conventionally, a tester is connected to the PCM terminal station to test for disturbances in the time series, that is, switching function. However, the above method has a problem in that a testing machine must be installed or transported for each installed exchange.

[Means for solving problems]

The above conventional problems are as follows: (1) means (103) for making a network connection from the receiving terminal under test to the transmitting terminal under test; and (2) means (103) for causing the transmitting terminal station to send out a predetermined pattern signal. 1
4a'); (3) means (13b') for storing data received at the receiving terminal; and (4) means (32) for comparing the pattern signal with the received data; An exchange of the present invention that connects a test receiving terminal station and a transmitting terminal station, and a transmitting terminal station under test and a receiving terminal station, respectively, and compares a pattern signal sent by the transmitting terminal station with a pattern signal received by the receiving terminal station. This can be solved using the following test method.

[Effect]

The present invention will be described in more detail with reference to the principle explanatory diagram shown in FIG. 1(a).

In order to test the exchange function from the receiving terminal station under test 9a-1 to the transmitting terminal station under test 9b-1, the transmitting terminal station 9a-2 and the receiving terminal station 9b-2 are used as test data transmitting/receiving means. At the same time, the pattern signal 100,
A matching section 32 is provided.

First, the pattern signal ioo is stored in 55M14a' of the transmitting terminal station 9a-2. 55M14a' has a storage area assigned to each of 32 channels, and transmits the stored pattern signals to the transmitting terminal station 9a through each channel.
Send from -2.

The receiving terminal station under test 9a-1 receives the pattern signal and sends it to the receiving terminal station 9b-1 through a predetermined channel of the connected transmitting terminal station under test.

The receiving terminal station 9b-2 receives the received pattern signal from R3M13b.
' is stored in a predetermined channel area.

Here, by comparing the contents of SSMI 4a' and R3M13b', it is possible to test the exchange function such as the time series of time slots.

〔Example〕

Embodiments of the present invention will be described with reference to the drawings.

FIG. 1(b) is a block diagram of a digital exchange implementing the present invention.

〔composition〕

In addition to conventional functions, the present invention provides a test program memory 30 for storing a test program started from the typewriter 19, a pattern memory 31 for storing a pattern signal 100, and a comparison between the contents of the specified SSM and the contents of the RSM. It is composed of a matching section 32.

The test program includes: ■ a function that causes the MPU 8 to store the pattern signal 100 in the pattern memory 31 in the SSM of a designated transmitting terminal station; and ■ a function to store the contents of the SSM from channel O of the transmitting/receiving section of the transmitting data memory 16a to channel 32. ■ A function to monitor reception and storage in the RSM of a designated receiving terminal station and activate the verification unit 32; ■ A function to store received data in the RSM to a designated communication control unit.
It has a function to store it in a predetermined area of the MPU.
8 and each communication control section execute the test program by starting the typewriter 19 in parallel with the predetermined exchange operation.

[Operation explanation]

The test is performed at the transmitting/receiving terminal station under test (PCM terminal station) 9a as shown in the diagram.
-1,9b-1 and transmitting/receiving terminal station (PCM terminal station) 9a-2,9
After connecting the terminals 101 and 102 with connection lines 101 and 102, the tester inputs and specifies the number of the transmitting/receiving terminal station to be tested and the number of the transmitting/receiving terminal station to be tested, and starts the test program.

(1) The MPU 8 reads the pattern signal 100 from the pattern memory 31 according to the test program, and
', and its contents are stored in the designated channel of the transmission data memory 16a.

(2) The contents of the transmission data memory 16a are read by the communication control section 10a' and sent out through the PCM terminal station 9a-2.

The PCM terminal station 9a-1 discriminates the PCM signal, stores it in the received data buffer and RSM, and then stores it in the received data memory 15a.

(3) When the above pattern signal is stored in the specified area in the transmission data memory 16b by the MPU 8, the PCM terminal 9b-
Sent from 1.

(4) The communication control unit 10b' that received the above signal is R3M
13b' for each channel.

+5) The MPU 8 monitors the above operation and the pattern signal is R.
When stored in 3M13b', the collation unit 32 is activated.

(6) The collation unit 32 reads the contents of the SSM and RSM, compares and verifies them (normal when they match), and outputs the results to the typewriter 19.

(7) Select the transmitting/receiving terminal station to be tested and repeat the above procedure.

The pattern signal 100 is created in such a way that it is possible to verify disturbances in the time series of each time slot, and if a mismatch occurs as a result of matching, it becomes possible to detect a faulty channel.

〔Effect of the invention〕

As explained above, according to the present invention, by performing a return test using an existing transmitting/receiving section, it is possible to verify the time slot exchange function such as time series, etc. Test methods can be provided.

[Brief explanation of drawings]

Figure 2 (a) is an explanatory diagram of a digital line network, Figure 2 (b)
2(c) is an explanatory diagram of a PCM transmission frame, FIG. 2(c) is an explanatory diagram of a conventional test method, and FIG. 2(d) is a block diagram of a conventional digital exchange. In the figure, 1.2 is a data processing device, 3 to 5 are digital exchanges, 6.7 is a test device, and 8 is an MPU. 9a-1, 9a-2, 9b-1, 9b-2 are PCM terminal stations capable of bidirectional transmission; 10a, 1Ob, 10a', 10b'' are communication control units; 11a, llb are reception data buffers; 12a, 12b
are transmission data buffers, 13a, 13b, 13b' are R
3M. 14a, 14b, 14a' are SSM. 15a and 15b are reception data memories, 16a and 16b are transmission data memories, 17 is a control memory, 18 is a main memory, 19 is a typewriter, 20 is a synchronization unit, 30 is a test program memory, 31 is a pattern memory, and 32 is a collation unit. 101, 102 are connection lines, 103
are connection lines indicating channel connections, AI, A2. Bl, B2 are the transmitting and receiving parts, Chi 2 Mouth (1) Chi 2 Diagram Cb) %z Threshold (C) Jushu's Punjitar Exchange History Zikin 7v Tsufu Prisoner 2 Sen (
71)

Claims (1)

[Scope of Claims] A testing method for an exchange having a plurality of terminal stations that time-division multiplex digital signals and transmit and receive them, the method comprising: (1) establishing a network connection from a receiving terminal station under test to a transmitting terminal station under test; (2) means (14a') for causing the transmitting terminal station to transmit a predetermined pattern signal; and (3) means (14a') for causing the receiving terminal station to store the received data.
13b'); and (4) means (32) for comparing the pattern signal with the received data. 1. A test method for an exchange, which comprises comparing a pattern signal transmitted by a transmitting terminal station and a pattern signal received by a receiving terminal station connected to each other.