JPS61234412A - System for detecting load fault - Google Patents
System for detecting load faultInfo
- Publication number
- JPS61234412A JPS61234412A JP7578785A JP7578785A JPS61234412A JP S61234412 A JPS61234412 A JP S61234412A JP 7578785 A JP7578785 A JP 7578785A JP 7578785 A JP7578785 A JP 7578785A JP S61234412 A JPS61234412 A JP S61234412A
- Authority
- JP
- Japan
- Prior art keywords
- load
- section
- level
- logic
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 24
- 238000000034 method Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/569—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Protection Of Static Devices (AREA)
- Control Of Voltage And Current In General (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、負荷駆動制御装置における負荷障害の検出を
論理演算で行なう負荷障害検出方式に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a load fault detection method that detects a load fault in a load drive control device using logical operations.
負荷駆動制御装置の負荷部分の回路としては、第２図（
ａ）に示すソース形回路と、同図（ｂ）に示すシンク形
回路とがある。従来、負荷駆動制御装置における負荷障
害検出は、負荷部分の回路は前記第２図（ｂ）に示すシ
ンク形回路の場合のみであり、スイッチ１をオンした時
点での負荷２のレベルを正常時に“低”レベルに、障害
時に“高゛レベルに検出するように負荷レベル検出回路
３の条件を設定して、第３図に示すフローチャートをプ
ログラム化し負荷障害（短絡のみ）の検出をおこなって
いた。即ち第３図において、前記シンク形回路の負荷レ
ベル検出条件を設定しくステップ１０１ ）、スイッチ
１をオンにしくステップ１０２）、次に負荷レベルが“
高パか“低”を判断しくステップ１０３）、“高”であ
ったら障害として障害処理を行ない（ステップ１０４）
、“低゛であったら正常として正常処理を行なう（ステ
ップ１０５）。The circuit of the load part of the load drive control device is shown in Figure 2 (
There are a source type circuit shown in a) and a sink type circuit shown in FIG. Conventionally, load failure detection in a load drive control device has been carried out only when the load portion circuit is a sink type circuit shown in FIG. Load faults (short circuits only) were detected by setting the conditions for the load level detection circuit 3 to detect a "low" level and a "high" level when a fault occurred, and programming the flowchart shown in Figure 3. That is, in FIG. 3, the load level detection conditions for the sink type circuit are set (step 101), the switch 1 is turned on (step 102), and then the load level is "
Determine whether it is high or low (step 103), and if it is high, treat it as a failure (step 104).
, if it is “low”, it is considered normal and normal processing is performed (step 105).
しかしながら、上記従来の負荷障害検出方式では、負荷
障害検出できる負荷のタイプがシンク形と決まっており
、更に検出できる負荷障害が短絡のみであるという欠点
があり、しかも負荷点数が増えるプログラムのステップ
数も増大するという欠点もあった。However, in the conventional load fault detection method described above, the type of load that can be detected is fixed to be a sink type, and there is a further disadvantage that the only load fault that can be detected is a short circuit.Moreover, the number of program steps increases, which increases the number of load points. It also had the disadvantage that it increased.
本発明は、上述の点に鑑みてなされたもので、上記欠点
を除去し、論理処理を行なうことで負荷のタイプ別（シ
ンク形、ソース形）にかかわらず、また、負荷障害も短
絡のみでなく断線も検出でき、しかもプログラムステッ
プ数を減らすことが可能な汎用性に優れた負荷障害検出
方式を提供することにある。The present invention has been made in view of the above points, and by eliminating the above drawbacks and performing logical processing, it can be used regardless of the type of load (sink type, source type), and load failures can only be caused by short circuits. It is an object of the present invention to provide a highly versatile load failure detection method capable of detecting wire breakage without any problems and reducing the number of program steps.
上記問題点を解決するため、負荷に作動電流を供給する
電源部、負荷を駆動する駆動部、負荷のレベルを検出す
る負荷レベル検出部及び負荷の入出力処理を行なうマイ
クロコンピュータ等で構成される制御部を具備する負荷
駆動制御装置において、負荷部の前記シンク形回路或い
はソース形回路のタイプ別論理値と正論理又は負論理の
出力論理値、前記駆動部のオン・オフの論理値、負荷レ
ベル検出部が検出した高又は低レベルの論理値を用いて
前記制御部で論理演算により短絡或いは断線の負荷障害
の検出を行なうに構成した。In order to solve the above problems, it consists of a power supply section that supplies operating current to the load, a drive section that drives the load, a load level detection section that detects the load level, and a microcomputer that performs load input/output processing. In a load drive control device comprising a control section, type-specific logic values of the sink type circuit or source type circuit of the load section, output logic values of positive logic or negative logic, on/off logic values of the drive section, and the load. The control unit detects a load fault such as a short circuit or disconnection by performing a logical operation using the high or low level logic value detected by the level detection unit.
上記のように構成することにより、負荷障害検出を論理
演算により行なうのでこの論理演算部分をモジュール化
することにより負荷点数増大に伴うプログラムステップ
数の増大を抑制できると共に、負荷のタイプが異なって
も負荷障害の検出が可能となる。更に論理演算により負
荷障害を検出する方式であるので汎用性の優れたものと
なる。With the above configuration, load fault detection is performed by logical operations, so by modularizing this logical operation part, it is possible to suppress an increase in the number of program steps due to an increase in the number of load points, and even when the types of loads are different. It becomes possible to detect load failures. Furthermore, since the system detects load failures through logical operations, it has excellent versatility.
以下、本発明の一実施例を図面に基づいて説明する。 Hereinafter, one embodiment of the present invention will be described based on the drawings.
第１図は、本発明に係る負荷障害検出方式を適用する負
荷駆動制御装置の構成を示すブロック図である。負荷駆
動制御装置は、電源部１１、制御部１２、駆動部１３、
負荷部１４及び負荷レベル検出部１５とから構成される
。FIG. 1 is a block diagram showing the configuration of a load drive control device to which a load fault detection method according to the present invention is applied. The load drive control device includes a power supply section 11, a control section 12, a drive section 13,
It is composed of a load section 14 and a load level detection section 15.
電源部１１は、前記負荷部１４に作動電流を供給する部
分である。制御部１２は、入出力ポート１２ａ及びマイ
クロプロセッサ１２ｂとから構成され、前記駆動部１３
及び負荷レベル検出部１５の制御と負荷部１４の入出力
処理を行なう部分である。駆動部１３は、負荷部１４の
駆動を行なう部分であり、トランジスタ、サイリスク、
リレー等のスイッチ素子で構成される。負荷レベル検出
回路１５は、負荷部１４の電圧レベをを検出する部分で
ある。The power supply section 11 is a section that supplies operating current to the load section 14 . The control unit 12 includes an input/output port 12a and a microprocessor 12b, and the drive unit 13
It is also a section that controls the load level detection section 15 and performs input/output processing of the load section 14. The drive unit 13 is a part that drives the load unit 14, and includes transistors, silice,
Consists of switching elements such as relays. The load level detection circuit 15 is a part that detects the voltage level of the load section 14.
第４図及び第５図は、それぞれ本発明に係る負荷障害検
出方式の論理値表及びその処理の流れを示すフローチャ
ートである。第４図において、ｂは、負荷部１４で用い
られる負荷のタイプを示す論理演算定数で前記ソース形
の場合はｂ＝“１′”、シンク形の場合はｂ＝“０”と
設定する。ａは、出力論、理でありソース形の場合は負
論理ａ＝“０”とし、シンク形の場合は正論理ａ＝“１
′′と設定する。Ｘは、駆動部１３のスイッチの状態で
決まる変数でソース形の場合は、スイッチがオンのとき
低レベル（ｘ＝０）とし、スイッチがオフのとき高レベ
ル（ｘ＝１）とし、また、シンク形の場合はスイッチが
オンのとき高レベル（ｘ＝１）となり、オフの場合は低
レベル（Ｘ＝Ｏ）となる。ｙは、負荷部１４の負荷レベ
ルの状態を示す変数で高レベルのときの論理値をｙ＝１
とし、低レベルのとき論理値ｙ＝ｏと設定する。FIG. 4 and FIG. 5 are flowcharts showing a logic value table and a process flow of the load fault detection method according to the present invention, respectively. In FIG. 4, b is a logical operation constant indicating the type of load used in the load section 14, and is set to b="1'" in the case of the source type, and b="0" in the case of the sink type. a is the output logic, and in the case of source type, negative logic a = “0”, and in the case of sink type, positive logic a = “1”
′′. X is a variable determined by the state of the switch of the drive unit 13, and in the case of a source type, it is a low level (x = 0) when the switch is on, and a high level (x = 1) when the switch is off; In the case of the sink type, the level is high (x=1) when the switch is on, and the level is low (x=0) when it is off. y is a variable that indicates the state of the load level of the load unit 14, and the logical value when it is at a high level is y = 1
When the level is low, the logical value y=o is set.
これにより、第４図に示すように負荷駆動制御装置の負
荷が正常の場合、ソース形回路においては負荷駆動部１
３のスイッチがオンでｙ＝１（高レベル）、オフでｙ＝
０（低レベル）とナリ、シンク形回路においてはスイッ
チがオンでｙ＝１（高レベル）、オフでｙ＝０（低レベ
ル）トなる。As a result, as shown in FIG. 4, when the load of the load drive control device is normal, the load drive unit 1 in the source type circuit
When switch 3 is on, y=1 (high level), when off, y=
In a sink type circuit, when the switch is on, y=1 (high level), and when the switch is off, y=0 (low level).
また、負荷が短絡障害の場合は、ソース形回路において
は負荷駆動部１３のスイッチがオン及びオフでｙ＝０（
低レベル）となり、シンク形回路においてはスイッチが
オン及びオフでｙ＝１（高レベル）となる。さらに、負
荷が断線障害の場合は、ソース形回路においてはスイッ
チがオン及びオフでｙ＝１（高レベル）となり、シンク
形回路においてはスイッチがオン及びオフでｙ＝０（（
氏レベル）となる。In addition, in the case of a short-circuit fault in the load, in the source type circuit, the switch of the load drive unit 13 is turned on and off, and y = 0 (
In the sink type circuit, y=1 (high level) when the switch is on and off. Furthermore, if the load has an open circuit fault, in a source type circuit, y = 1 (high level) when the switch is on and off, and in a sink type circuit, y = 0 ((
level).
第５図において、負荷障害検出処理は、先ず負荷部１４
がソース形かシンク形かを判断しくｂ＝“Ｏ”か“１”
かを判断し）（ステップ２０１）、ソース形の場合、即
ちｂ＝“１”の場合法にソース形の出力論理ａ＝“０”
′の負論理を設定しくステップ２０２）、次に変数Ｘが
“０”か“１”かを判断しくステップ２０３）、”Ｏ”
であったら続いて負荷レベルが高レベル（Ｈ）か低レベ
ル（Ｌ）か、即ちｙ＝“１”か“０”かを判断しくステ
ップ２０４）、“６１゛であったら短絡障害として処理
しくステップ２０５）、“０”であったら正常として処
理する（ステップ２０６）。前記ステップ１０３におい
て、ｘＭ“１”の場合は、次にｙ−“１”か０″かを判
断しくステップ２０７）、ｙ＝″１°゛であったら前記
ステップ２０６に移り正常処理をし、ｙ−“０”であっ
たら断線障害として処理する（ステップ２０８）。前記
ステップ２０１において、ｂ−“０゛′の場合、次にラ
ンク形回路の出力論理ａ＝“１”の正論理を設定し、続
いて変数Ｘ＝“′１”か“Ｏｌｌかを判断しくステップ
２１０）、ｘ＝′１”の場合続いて負荷レベルｙ＝“１
”か“Ｏ゛かを判断しくステップ２１１）、“１”であ
ったら短絡障害として処理しくステップ２１２）、′０
”であったら正常として正常処理をする（ステップ２１
３）。前記ステップ２１０において、Ｘ−０゛であった
ら続いて負荷レベルｙ＝“１”か“０”かを判断しくス
テップ２１４）、ｙ−“１”であったら正常として前記
ステップ２１３に移り、ｙ＝”ｏ”であったら断線とし
て障害処理する（ステップ２１５）。In FIG. 5, the load failure detection process first begins with the load unit 14.
b = “O” or “1” to determine whether it is a source type or a sink type.
(step 201), and in the case of the source type, that is, when b = “1”, the source type output logic a = “0”.
' to set negative logic (step 202), then determine whether variable X is "0" or "1" (step 203), "O"
If so, then it is determined whether the load level is high level (H) or low level (L), that is, whether y = "1" or "0" (step 204), and if it is "61", it is treated as a short circuit fault. Step 205), if it is "0", it is processed as normal (step 206). If xM is "1" in step 103, then it is determined whether y - "1" or 0" (step 207), If y = "1°", the process moves to step 206 and normal processing is performed, and if y - "0", it is processed as a disconnection fault (step 208). In the case of b - "0" in step 201, , Next, set the positive logic of the output logic a = "1" of the rank type circuit, and then determine whether the variable X = "'1" or "Oll" (step 210), and if x = '1', then Load level y=“1
” or “O” is determined in step 211), and if it is “1”, it is treated as a short circuit failure in step 212), ’0
”, it is considered normal and normal processing is performed (step 21).
3). In the step 210, if it is X-0'', then it is determined whether the load level y is "1" or "0" (step 214), and if it is y-"1", it is assumed that it is normal and the process moves to the step 213. ="o", the fault is treated as a disconnection (step 215).
上記の論理定数・変数により短絡及び断線障害を検出す
る論理演算は下式のようになる。The logical operation for detecting short circuits and disconnection faults using the above logical constants and variables is as shown in the following equation.
短絡検出−（（ｘ■ａ）■１）・（ｂ■ｙ）・・・（１
）断線検出−（Ｘ■ａ）−（（ｂ■ｙ）■１） ・・
・（２）但し、■は排他的論理和（Ｅｘｃｌｕｓｉｖｅ
ＯＲ）を表わす。Short circuit detection - ((x■a)■1)・(b■y)...(1
) Disconnection detection-(X■a)-((b■y)■1)...
・(2) However, ■ is an exclusive OR
OR).
第１図に示す負荷制御装置において、負荷部１４がソー
ス形の場合を第５図に基づいて説明すると、ステップ２
０１で、負荷のタイプ別定数すはｂ＝“１”であり、ス
テップ２０２の出力論理ａは負論理Ｂ＝ａ″Ｏ”となる
。ここで駆動部１３はオフであり、負荷レベルは高レベ
ルであると仮定すると、Ｘおよびｙはそれぞれｘ＝′１
”及びｙ＝“０゛となり、断線が検出される。これらの
論理・変数により、上記（１）及び（２）式の論理演算
をおこなうと、（１）式は“０°゛となり（２）式は１
″となり負荷の断線が検出される。また、負荷の短絡は
、駆動部１３がオンの時負荷レベルｙの状態により（ｙ
＝“０パ）検出できる。In the load control device shown in FIG. 1, the case where the load section 14 is a source type will be explained based on FIG. 5.
01, the load type-specific constant b=“1”, and the output logic a of step 202 becomes the negative logic B=a″O”. Here, assuming that the drive unit 13 is off and the load level is high, X and y are respectively x='1
” and y=“0”, and a disconnection is detected. Using these logics and variables, when we perform the logical operations on equations (1) and (2) above, equation (1) becomes “0°” and equation (2) becomes 1.
'', and disconnection of the load is detected.Also, when the drive unit 13 is on, a short circuit of the load is determined by the state of the load level y (y
= “0pa) Can be detected.
負荷部１４がシンク形回路の場合の断線、短絡も同様に
論理演算により検出できる。When the load section 14 is a sink type circuit, disconnections and short circuits can be similarly detected by logical operations.
なお、上記実施例においては、簡単化のために負荷部１
４がソース形回路の場合の出力論理ａを負論理とし、シ
ンク形回路の場合の出力論理を正論理として設定した場
合について説明したが、第６図に示すようにソース形回
路の場合の出力論理２が正論理ａ＝“１′′、シンク形
回路の場合負論理ａ＝“０゛′の場合も上記（１）及び
（２）の論理演算は実現できる。Note that in the above embodiment, the load section 1 is
4 is a source type circuit, and the output logic a is set to negative logic, and the output logic of a sink type circuit is set to positive logic. The above logical operations (1) and (2) can also be realized when the logic 2 is a positive logic a=“1'' and, in the case of a sink type circuit, a negative logic a=“0''.
以上説明したように本発明によれば、負荷障害検出を論
理演算により行なうのでこの論理演算部分をモジュール
化することにより負荷点数増大に伴うプログラムステッ
プ数の増大を抑制できると共に、負荷のタイプが異なっ
ても負荷障害の検出が可能となり、更に論理演算により
負荷障害を検出する方式であるので汎用性にも優れたも
のになる等の優れた効果が得られる。As explained above, according to the present invention, load failure detection is performed by logical operations, so by modularizing this logical operation part, it is possible to suppress an increase in the number of program steps due to an increase in the number of load points, and also to suppress the increase in the number of program steps due to an increase in the number of load points. Furthermore, since the system detects load failures using logical operations, excellent effects such as excellent versatility can be obtained.
第１図は本発明に係る負荷障害検出方式を適用する負荷
駆動制御装置の構成を示すブロック図、第２図（ａ）及
び（ｂ）はそれぞれ負荷部がソ］ス形の場合とシンク形
の場合の回路構成を示すブロック図、第３図は従来の障
害検出方式の処理例を示すフローチャート、第４図は本
発明に係る演 −算処理の論理値表を示す図
、第５図は本発明に係る負荷障害検出方式の処理の流れ
を示すフローチ〜−ト、第６図は本発明に係る演算処理
の論理値表を示す図である。
図中、１１・・・電源部、１２・・・制御部、１３・・
・駆動部、１４・・・負荷部、１５・・・負荷レベル検
出部。FIG. 1 is a block diagram showing the configuration of a load drive control device to which the load fault detection method according to the present invention is applied, and FIGS. 2(a) and (b) show cases in which the load section is a source type and a sink type, respectively. FIG. 3 is a flowchart showing an example of processing in the conventional fault detection method, FIG. 4 is a diagram showing a logic value table of the arithmetic processing according to the present invention, and FIG. FIG. 6 is a flowchart showing the process flow of the load fault detection method according to the present invention, and is a diagram showing a logical value table of the arithmetic processing according to the present invention. In the figure, 11...power supply unit, 12...control unit, 13...
- Drive section, 14... Load section, 15... Load level detection section.
Claims (1)
部、負荷の電圧レベルを検出する負荷レベル検出部及び
負荷の入出力処理を行なう制御部を具備する負荷駆動制
御装置において、前記負荷部のシンク形回路或いはソー
ス形回路のタイプ別論理値と正論理又は負論理の出力論
理値、前記駆動部のオン・オフの論理値、負荷レベル検
出部が検出した高又は低レベルの論理値を用いて論理演
算により短絡或いは断線の負荷障害の検出を行なうこと
を特徴とする負荷障害検出方式。In the load drive control device, the load drive control device includes a power supply section that supplies an operating current to the load, a drive section that drives the load, a load level detection section that detects the voltage level of the load, and a control section that performs input/output processing of the load. Logic values for each type of sink type circuit or source type circuit, output logic values of positive logic or negative logic, on/off logic values of the drive section, and high or low level logic values detected by the load level detection section. 1. A load fault detection method that detects load faults such as short circuits or disconnections using logic operations.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7578785A JPS61234412A (en) | 1985-04-10 | 1985-04-10 | System for detecting load fault |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7578785A JPS61234412A (en) | 1985-04-10 | 1985-04-10 | System for detecting load fault |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61234412A true JPS61234412A (en) | 1986-10-18 |
Family
ID=13586270
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7578785A Pending JPS61234412A (en) | 1985-04-10 | 1985-04-10 | System for detecting load fault |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61234412A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5179493A (en) * | 1989-07-25 | 1993-01-12 | Kabushiki Kaisha Toshiba | Multiple power supply system |
-
1985
- 1985-04-10 JP JP7578785A patent/JPS61234412A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5179493A (en) * | 1989-07-25 | 1993-01-12 | Kabushiki Kaisha Toshiba | Multiple power supply system |
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