JPS61234052A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To suppress the increase in the wiring resistance of a multilayer wiring conductors near a connecting conductor and to prevent an electromigration from occurring by providing the shape to allow a lower layer hole pattern to surround the periphery of an upper layer hole pattern in the hole of each connecting conductor formed on the interlayer insulating film. CONSTITUTION:Wiring conductor layers 1-3 formed on the first-third layers, a lower layer hole pattern 4 formed in an interlayer insulating film for insulating between the wiring conductors of the first and second layers, and an upper layer hole pattern 5 formed in the insulating film for insulating between the wiring conductors of the second and third layers are provided. The three conductor layers are formed most widely, and sequentially thickened and narrowed in the order of the second and third layers. The pattern 4 is formed U-shape to cross a current passage in which currents are flowed from the conductor layers of the second and third layers to the lower conductor layer by the regions to form to surround the pattern 5 from three sides.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor integrated circuit device having a multilayer wiring structure with an extremely high degree of integration.

(Prior Art) As the scale of semiconductor integrated circuit devices has become larger and larger, it has become common today to have a multilayer wiring structure. In this semiconductor integrated circuit device with multilayer wiring structure,
Usually, the wirings are electrically connected to each other through connection conductor parts formed in the openings of the interlayer insulating film. At this time, the conductor film thickness of the lower layer wiring is made thinner than that of the upper layer wiring conductor so as not to form a sharp step in the upper layer wiring conductor during the manufacturing stage, but it also reduces the reliability of the wiring due to the electro-migration condenser. Therefore, it is necessary to have a wiring cross-sectional area larger than a predetermined value corresponding to the current value.

As a result, when the current value is approximately the same, the conductor width of the lower layer wiring becomes wider, and in the case of a multilayer wiring structure with three or more layers, the ratio between the bottom layer and the top layer reaches 4 to 5 times, or 4. There are cases. Further, the openings in the interlayer insulating film are formed in simple rectangular patterns at positions slightly bent from each other so that the connection conductor portions do not overlap each other in order to flatten the wiring.

(Problem to be Solved by the Invention) However, the scale of integration is not so large, and while it is fine to have a multilayer structure of about 2 layers, a multilayer structure of 3I- or more is required, and fL'n As the amount of current increases, the current density in the lower wiring conductor and in the connecting conductor portion comes to be strongly controlled by the aperture pattern formed in the glabella insulating film. In other words, on a multilayer scale of about two layers, the difference in film thickness between two wirings is not as large as 7n, and therefore there is not much difference in conductor width, so even with the conventional hole pattern, the current density at the connecting conductor part is The current does not increase much, and each wiring current can flow almost to the full width of the conductor. However, when the scale is 31- or more and the difference in conductor width becomes large, in the conventional rectangular pattern, the shape of the opening becomes smaller as the conductor width becomes smaller toward the upper layer. As a result of avoiding overlapping, the positions are spaced apart from each other. Therefore, in the vicinity of each connection conductor, current no longer flows across the width of the conductor of the lower wiring, and the current path is stretched horizontally to nullify the conductor width prepared. Area increases. Then, the current density of each wiring conductor in the vicinity of the connecting conductor portion is significantly increased.

This increase in current density becomes more pronounced in the lower layer as the wiring width ratio increases.The current tends to concentrate near the center of the wiring conductor and the peripheral area is not used, so it is necessary to prevent the occurrence of electro-migration condensers. The intended effect of widening the wiring conductor is significantly reduced. Furthermore, this results in increased wiring resistance at such portions.

(Objective of the Invention) In view of the above-mentioned situation 4, an object of the present invention is to develop an interlayer insulating film that suppresses the increase in wiring resistance of a multilayer wiring conductor in the vicinity of the connecting conductor portion, and also solves the problem of electro-migration. An object of the present invention is to provide a semiconductor integrated circuit device having a hole pattern.

(Structure of the Invention) A semiconductor integrated circuit device of the present invention includes a semiconductor substrate, a multilayer wiring conductor layer formed on the semiconductor substrate via an interlayer insulating film, and a lower layer opening pattern of the interlayer insulating film having an upper layer opening. and a connection conductor portion between the multilayer wiring conductors formed so as to surround the pattern.

(Means for Solving the Problems) That is, according to the present invention, the openings of each connection conductor formed in the interlayer insulating film are formed such that the lower layer opening pattern surrounds the upper layer opening pattern. It has a unique shape. here,
The lower layer hole pattern may have a shape that completely surrounds the upper layer hole pattern, or it may be surrounded by a U-shaped pattern from three sides so as to cross the current path from the upper layer wiring conductor layer. Depending on the case, it may be surrounded by a set shape of a plurality of divided patterns.

(Function) According to this lower layer opening pattern, the current component that crosses the wiring conductor is more widely dispersed in the conductor near each connection conductor, and
Almost all of the conductor width, including the periphery, is effectively utilized.

The present invention will be described in detail below with reference to the drawings.

(Embodiment) FIG. 1 is a plan view of the vicinity of a connecting conductor portion showing an embodiment of the present invention. In this example, the wiring conductor layers 1.2 and 3 are formed on the first layer, the second layer, and the third layer, and the eyebrow insulating film is formed to insulate between the wiring conductor layers of the first layer and the second layer. a lower layer aperture pattern 4 and an upper layer aperture pattern 5 formed in an interlayer insulating film that insulates between the second and third wiring conductor layers.
including. Here, among the three wiring conductor layers, the first layer is formed to have the widest width, and the second and third layers are formed to have thicker layers and narrower widths in that order. Further, the lower layer opening pattern 4 is shaped like a "U" so as to cross in each area the current path flowing from each wiring conductor layer of the second layer and the third layer to the lower layer wiring conductor layer.
It is formed so as to surround the upper layer opening pattern 5 from three sides.

According to this embodiment, the conventionally existing current path extending in the lateral direction is weakened in the vicinity of each connecting conductor, and instead a current path A' appears that crosses each conductor layer toward the periphery. Therefore, the current component flowing through the periphery of each wiring conductor layer near each connection conductor portion increases compared to the conventional case, so that the current density of each wiring conductor near each connection conductor can be significantly reduced. This current path uniformization effect is more effective as the number of wiring layers involved in the current path increases, and since the current can flow to the full width of the conductor by utilizing up to the periphery of the wiring conductor layer, the occurrence of electroφ migration 1 can be prevented. It is possible to fully utilize the effect of widening the wiring conductor for the purpose of
Further, an increase in wiring resistance can be suppressed.

FIG. 2 is a plan view of the vicinity of a connecting conductor section using a conventional rectangular opening pattern, showing how the current takes a path BB' which is stretched in the lateral direction. In the conventional aperture pattern, since the lower aperture pattern 4 does not have the surrounding area of the upper aperture pattern 5, a large amount of current flows along the path B-B' near the center of the wiring conductor layer, especially in the first layer and The current density in the vicinity of each connection conductor in each of the wiring conductor layers 1 and 2 of the second layer is significantly increased to cause electromigration.

FIG. 3 and FIG. 4 are plan views of the vicinity of the connecting conductor portion, respectively, showing other embodiments of the present invention.

Here, FIG. 3 shows an example of a four-layer wiring structure, which is a new example! A four-layer wiring conductor layer 6 and a second lower hole pattern 7 are provided, respectively. In this embodiment, there are two lower layer opening patterns, so the one provided between the wiring conductor layers of the first and second layers is the first lower layer opening pattern 4, and the one provided between the second and third layers is the first lower layer opening pattern 4. The second
They are distinguished from each other as the lower layer aperture pattern 7. Also,
In this case, the second lower layer aperture pattern 7 has a relationship with the upper layer aperture pattern of the first lower layer aperture pattern 4, and all the lower layer aperture patterns completely surround all the upper layer aperture patterns. It is formed like this.

According to this embodiment, the current density in the vicinity of each connection conductor portion is more significantly reduced despite the increase in the number of wiring conductors because the current flows approximately radially between the connection conductor portions.

Furthermore, in FIG. 4, all of the aperture patterns are in the form of a collection of a plurality of divided patterns. This embodiment is suitable when the width of each wiring conductor is relatively wide.

(Effects of the Invention) As described above in detail, according to the present invention, the wiring current density in the connecting conductor portion in a multilayer wiring structure is significantly reduced, electromigration is prevented from occurring, and the wiring resistance is increased. This has the effect of significantly improving the reliability of the wiring in a multilayer wiring semiconductor integrated circuit.

[Brief explanation of the drawing]

FIG. 1 is a plan view of the vicinity of the connecting conductor section showing an embodiment of the present invention, FIG. 2 is a plan view of the vicinity of the connecting conductor section using a conventional dog-shaped hole pattern, and FIGS. 3 and 4 are the same. FIG. 6 is a plan view of the vicinity of a connecting conductor portion showing other embodiments of the present invention. 1...First layer wiring trench layer, 2...Second layer
Layer wiring trench layer, 3... Third layer wiring trench layer, 6.
...Fourth layer wiring groove layer, 4.7... Lower layer opening pattern, 5... Upper layer opening pattern, A-
A', B-B'... Current path. \Meeny 1st /TgJ

Claims (4)

[Claims] (1) A semiconductor substrate, a multilayer wiring conductor layer formed on the semiconductor substrate via an interlayer insulating film, and the multilayer wiring formed so that the lower hole pattern of the interlayer insulating film surrounds the upper hole pattern, respectively. A semiconductor integrated circuit device comprising a connecting conductor between conductors. (2) The lower layer opening pattern is formed to surround the upper layer opening pattern from three sides in a U-shape so as to cross a current path flowing from the upper wiring conductor layer to the lower wiring conductor layer. A semiconductor integrated circuit device according to claim (1), characterized in that: (3) The semiconductor integrated circuit device according to claim (1), wherein the lower layer opening pattern is formed to entirely surround the upper layer opening pattern. (4) The semiconductor integrated circuit device according to claim (1), wherein at least one of the lower layer opening patterns is formed of a set shape of a plurality of divided patterns.