JPS6123391A - Device for mounting chip circuit part - Google Patents
Device for mounting chip circuit partInfo
- Publication number
- JPS6123391A JPS6123391A JP14352784A JP14352784A JPS6123391A JP S6123391 A JPS6123391 A JP S6123391A JP 14352784 A JP14352784 A JP 14352784A JP 14352784 A JP14352784 A JP 14352784A JP S6123391 A JPS6123391 A JP S6123391A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- adhesive
- shaped circuit
- copper foil
- circuit component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000853 adhesive Substances 0.000 claims description 32
- 230000001070 adhesive effect Effects 0.000 claims description 32
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 18
- 239000011889 copper foil Substances 0.000 claims description 18
- 238000000034 method Methods 0.000 description 5
- 229910000679 solder Inorganic materials 0.000 description 5
- 238000005476 soldering Methods 0.000 description 5
- 230000007547 defect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 238000001125 extrusion Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、チップ状回路部品を印刷配線基板上の銅箔ラ
ンドの所定の位置に、接着剤によって取付けるようにし
たチップ状回路部品の取付装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a mounting device for chip-shaped circuit components, which mounts the chip-shaped circuit components at predetermined positions on copper foil lands on a printed wiring board using an adhesive. It is something.
従来例の構成とその問題点
近年、特に小型・高密度実装の要望が高まり、コンデン
サ・抵抗・コイル・半導体等の回路部品として、チップ
状回路部品が頻繁に使用されるよ2へ−
うになってきた。これらのチップ状回路部品は、印刷配
線基板の導体層側の所定の銅箔ランド部分に、スクリー
ン印刷等により接着剤を塗布した後、装着、固定され、
半田付けして使用するものであった。Conventional configurations and their problems In recent years, the demand for compact and high-density packaging has increased, and chip-shaped circuit components are increasingly being used as circuit components such as capacitors, resistors, coils, and semiconductors. It's here. These chip-shaped circuit components are mounted and fixed after applying adhesive to a predetermined copper foil land portion on the conductor layer side of the printed wiring board by screen printing or the like.
It was used by soldering.
すなわち、従来の取付手法では第1図イ1口に示すよう
に、印刷配線基板1土の銅箔ランド2゜2間に平面形状
がほぼ長方形状の接着剤3をスクリーン印刷等により塗
布する。そして、第2図イ。That is, in the conventional mounting method, as shown in FIG. 1A, an adhesive 3 having a substantially rectangular planar shape is applied between copper foil lands 2.2 of a printed wiring board 1 by screen printing or the like. And Figure 2 A.
口に示すように、接着剤3によってチップ状回路部品4
を印刷配線基板1上に仮固定し、チップ状回路部品4の
部品本体側、5の両端に有する電極6を銅箔ランド2上
に設置し、この状態で半田ディツプすることにより、電
極6と銅箔ランド2との間を半田によって電気的・機械
的に接続固定するものであった。しかしながら、このよ
うな従来の取付手法では、接着剤3の位置ずれが発生し
た場合、チップ状回路部品4を装着すると、接着剤3が
押しつぶされ、第3図イ2口に示すように電極6と銅箔
ランド2の間に接着剤3がはみ出し、さ3A−′
らに、毛管現象等により第3図ノ1の状態となり、半田
デイツプ法により、電極6と銅箔ランド2を半田付けす
る際、半田がつかず不良が発生するという問題を有して
いた。As shown in the figure, a chip-shaped circuit component 4 is attached by adhesive 3.
is temporarily fixed on the printed wiring board 1, and the electrodes 6 on the component body side of the chip-shaped circuit component 4 and the electrodes 6 at both ends of the chip 5 are placed on the copper foil land 2, and soldered in this state. The copper foil land 2 was electrically and mechanically connected and fixed by soldering. However, in such a conventional mounting method, if the adhesive 3 is misaligned, the adhesive 3 is crushed when the chip-shaped circuit component 4 is mounted, and the electrode 6 is crushed as shown in FIG. The adhesive 3 protrudes between the electrode 6 and the copper foil land 2, and the state shown in FIG. At the time, there was a problem in that the solder did not stick and defects occurred.
発明の目的
本発明は、接着剤の銅箔ランドへのはみ出しを少なくし
て半田デイツプ法により固定するチップ状回路部品の半
田付は性を確実にし、その信頼性を著しく向上させるこ
とができるチップ状回路部品の取付装置を提供すること
を目的とするものである。OBJECTS OF THE INVENTION The present invention provides a chip that can secure solderability of chip-shaped circuit components by reducing the overflow of adhesive onto copper foil lands and fixing them by the solder dip method, and can significantly improve the reliability of the chips. The object of the present invention is to provide a mounting device for shaped circuit components.
発明の構成
本発明のチップ状回路部品の取付装置は、チップ状回路
部品が装着される印刷配線基板上の対向する銅箔ランド
間に、そのランド間中心線上で分割されるように独立し
て塗布される一対の接着剤を、その平面形状において相
対向する内側が狭くなるような形状に塗布し、この接着
剤上にチップ状回路部品を装着し、接着剤がチップ状回
路部品の電極と銅箔ランド間へはみ出さないようにした
ことを特長とするものである。Structure of the Invention The device for mounting a chip-shaped circuit component of the present invention is provided between opposing copper foil lands on a printed wiring board on which a chip-shaped circuit component is mounted, so that the chip circuit components are mounted independently so as to be divided on the center line between the lands. A pair of adhesives is applied in a planar shape such that the opposing inner sides become narrower, and a chip-shaped circuit component is mounted on this adhesive, so that the adhesive contacts the electrodes of the chip-shaped circuit component. The feature is that it does not protrude between the copper foil lands.
実施例の説明
以下、本発明の実施例について第4図〜第6図に基づい
て説明する。なお、この実施例において従来のものと同
一符号は同一の構成要素を示す。DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of the present invention will be described based on FIGS. 4 to 6. Note that in this embodiment, the same reference numerals as in the conventional one indicate the same components.
本実施例においては、第4図に示すように印刷配線基板
1上の対向する銅箔ランド2,2間において、その中心
線上で2分割され独立する一対の接着剤7a、7bが塗
布されている。そして、この1対の接着剤7a 、7b
は、平面形状において、相対向する内側が外側に比べて
狭くなるように台形状に塗布されている。このように接
着剤7a。In this embodiment, as shown in FIG. 4, a pair of independent adhesives 7a and 7b are applied between the opposing copper foil lands 2 and 2 on the printed wiring board 1, and are divided into two on the center line. There is. And this pair of adhesives 7a, 7b
is applied in a trapezoidal shape in plan view so that the opposing inner sides are narrower than the outer sides. In this way, the adhesive 7a.
7bを塗布するとチップ状回路部品を装着した際、第5
図イ9口のように接着剤が押しつぶされ、銅箔ランド2
,2へはみ出すことはない。壕だ、第6図イ9口のよう
に接着剤の位置ずれが発生した場合においても、接着剤
7a 、ybが銅箔ランド2にはみ出す量が極めて少な
く、第3図のような半田付は不良にはならない。したが
って、接着剤のはみ出しによる半田付は不良が防止され
、半田ディップ法の品質の安定、及び信頼性の向上を図
ることができる。When 7b is applied, when chip-shaped circuit components are installed, the 5th
The adhesive is crushed as shown in Figure A9, and the copper foil land 2
, 2 will not protrude. Even if the adhesive is misaligned as shown in Fig. 6 (a) 9, the amount of adhesive 7a and yb that protrudes onto the copper foil land 2 is extremely small, and soldering as shown in Fig. 3 is not possible. It will not become defective. Therefore, soldering defects due to adhesive extrusion can be prevented, and the quality of the solder dipping method can be stabilized and reliability can be improved.
以上の実施例ではリードレスのチップ状回路部品につい
て説明したが、第7図イ9口に示すようにディスクリー
ト部品のリードを基板の孔に挿入することなく、銅箔ラ
ンドに半田付けする場合であっても、同様の効果が得ら
れる。また、接着剤の形状については台形状のもので説
明したが、第8図イ1口に示すように三角形状扇形状等
に形成しても良い。これは相対向する内側が外形に比べ
狭くなるようにすれば良い。また、接着剤の塗布形状の
うち、内側と外側の寸法は銅箔ランド内寸法、チップ部
品寸法等の条件によって設定されるものである。In the above embodiments, leadless chip-shaped circuit components have been described, but as shown in Figure 7, A-9, the leads of discrete components may be soldered to copper foil lands without inserting them into holes in the board. Even if there is, the same effect can be obtained. Furthermore, although the shape of the adhesive has been explained as being trapezoidal, it may also be formed into a triangular fan shape, etc., as shown in FIG. This can be done by making the opposing inner sides narrower than the outside. In addition, the inner and outer dimensions of the adhesive application shape are set according to conditions such as the internal dimensions of the copper foil land and the dimensions of the chip components.
発明の効果
以上のように本発明は、チップ状回路部品が装着される
印刷配線基板の銅箔ランド間に、ランド間中心線上で分
割されるように独立して塗布される一対の接着剤を、そ
の平面形状において相対向する内側が狭くなるように塗
布し、この接着剤上6ページ
にチップ状回路部品を装着するものであるため、接着剤
の位置ずれが発生した場合においても銅箔ランドへの接
着剤のはみ出す量がほとんどなく、したがって、半田デ
イツプ法による半田付けの品質を安定させることができ
、その信頼性を著しく向上させることができる利点を有
する。Effects of the Invention As described above, the present invention provides a pair of adhesives that are applied independently between the copper foil lands of a printed wiring board on which a chip-shaped circuit component is attached so as to be divided on the center line between the lands. , the adhesive is applied so that the inner sides facing each other are narrower in the planar shape, and the chip-shaped circuit components are mounted on this adhesive, so even if the adhesive is misaligned, the copper foil land There is almost no amount of adhesive extruding from the solder dip method, and therefore the quality of soldering by the solder dip method can be stabilized, and its reliability can be significantly improved.
第1図イ1口は従来の取付装置の接着剤の印刷形状を示
す平面図及び断面図、第2図イ1口は同装置におけるチ
ップ状回路部品を装着した場合の平面図及び断面図、第
3図イ1口は同装置における接着剤の印刷位置ずれが発
生した場合の平面図及び断面図、第3図ハは接着剤がは
み出した状態の断面図、第4図イ2口、ハは本発明の取
付装置の一実施例の接着剤の印刷形状を示す平面図及び
断面図、第6図イ9口は同実施例のチップ状回路部品を
装着した場合の平面図及び断面図、第6図イ9口は同実
施例の接着剤の印刷位置ずれが発生した場合の平面図及
び断面図、第7図イ1口はリード端子付き回路部品の正
面図、第8図イ2口は7へ一ン
他の実施例の接着剤の印刷形状を示す図である。
1・・・・印刷配線基板、2−・・・銅箔ランド、4・
・・・チップ状回路部品全体、6・・・・−チップ状回
路部品の電極、7a、7b・・・・・実施例の接着剤。
代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 第。図
第3図
綜 9 旦
て
派
8 S 8
qコ
綜Figure 1 A1 is a plan view and a cross-sectional view showing the printed shape of the adhesive of a conventional mounting device; Figure 3 A 1 opening is a plan view and cross-sectional view of the case where the printing position of the adhesive has shifted in the same device, Figure 3 C is a sectional view of the state where the adhesive has protruded, and Figure 4 A 2 opening and H 6 is a plan view and a sectional view showing the printed shape of the adhesive of an embodiment of the mounting device of the present invention, and FIG. Figure 6 (A) 9 is a plan view and cross-sectional view of the case where the printing position of the adhesive in the same embodiment is misaligned, Figure 7 (A) is a front view of the circuit component with lead terminals, and Figure 8 (A) is a front view of the circuit component with lead terminals. FIG. 7 is a diagram showing the printed shape of the adhesive of another example. 1...Printed wiring board, 2-...Copper foil land, 4-
. . . Entire chip-shaped circuit component, 6. . . - Electrodes of the chip-shaped circuit component, 7a, 7b . Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure no. Figure 3 So 9 Danteha 8 S 8 q So
Claims (1)
る銅箔ランド間にそのランド間中心線上で分割されるよ
うに独立して平面形状において相対向する内側が狭くな
るような形状に塗布した1対の接着剤上にチップ状回路
部品を装着したことを特徴とするチップ状回路部品の取
付装置。It is applied independently between opposing copper foil lands on a printed wiring board on which a chip-shaped circuit component is mounted, so that the inner sides facing each other become narrower in a planar shape so as to be divided along the center line between the lands. A mounting device for a chip-shaped circuit component, characterized in that a chip-shaped circuit component is mounted on a pair of adhesives.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14352784A JPS6123391A (en) | 1984-07-11 | 1984-07-11 | Device for mounting chip circuit part |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14352784A JPS6123391A (en) | 1984-07-11 | 1984-07-11 | Device for mounting chip circuit part |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6123391A true JPS6123391A (en) | 1986-01-31 |
Family
ID=15340811
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14352784A Pending JPS6123391A (en) | 1984-07-11 | 1984-07-11 | Device for mounting chip circuit part |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6123391A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61101094A (en) * | 1984-10-24 | 1986-05-19 | 神鋼電機株式会社 | Adhesion for temporarily fastening chip parts by adhesive coat pattern |
JPH01159191U (en) * | 1988-04-22 | 1989-11-02 |
-
1984
- 1984-07-11 JP JP14352784A patent/JPS6123391A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61101094A (en) * | 1984-10-24 | 1986-05-19 | 神鋼電機株式会社 | Adhesion for temporarily fastening chip parts by adhesive coat pattern |
JPH01159191U (en) * | 1988-04-22 | 1989-11-02 |
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