JPS61227484A - Video signal detecting circuit - Google Patents

Abstract

PURPOSE:To improve the discrimination accuracy by using a vertical scanning period except a vertical blanking section as a count time width to count a horizontal synchronizing pulse and discriminating the presence of an input video signal based on the count value. CONSTITUTION:A channel selection microcomputer 5 receives an output of an AFT detection circuit 6 detecting a carrier level of the output of an IF circuit 3 to introduce a control voltage to lock a PLL of a tuner circuit 2 to a tuning point. A horizontal synchronizing pulse (H pulse) is obtained by applying amplitude discrimination to a video output of a detection circuit 4 by a synchronous separator circuit 7 and given to a clock input CK of a pulse counter 8. A vertical synchronizing signal V is led to a V pulse forming circuit 9, and a V pulse whose level is low at the V blanking section is given to an enable input of the counter 8 from a gate circuit 10. The counter 8 counts the H pulse at the high V pulse level section, the computer 5 discriminates whether or not the count is within the permissible width and completes the channel selection when the count is within the permissible range.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video signal detection circuit, and is most suitable for use in a channel selection device of a TV receiver and other video equipment.

[Summary of the invention]

The horizontal synchronizing pulses are counted using the vertical scanning period excluding the vertical blanking interval as the counting time width, and the presence or absence of an input video signal is determined based on the counted value. The horizontal synchronization pulse within the ranking section is excluded to improve the determination accuracy, and the time base generator for the counting time span is simplified.

[Conventional technology]

When detecting (discriminating) the presence or absence of a video signal to control, for example, the tuning circuit of a TV tuner, focus on the synchronization signal of the video signal of the detection output, and use it for a certain period of time, e.g.
A video signal detection (discrimination) method is known in which the count is counted for 5 ec, and when the counted value is within the allowable range, the channel selection is completed, and when it is outside the allowable range, the channel selection is in progress. In this case, the counter starts counting synchronizing pulses upon receiving a pull-in completion signal from the AFT circuit, for example, and finishes counting after a certain time interval set by the timer circuit has elapsed, and derives the counted value.

[Problem that the invention seeks to solve]

The above-mentioned conventional technology requires at least a counter that counts synchronization pulses and a timer circuit that generates a time base, which contributes to high costs. In devices with a built-in system control microcomputer, it may be possible to generate a time base by incorporating software in place of the timer circuit into the microcomputer, but with a microcomputer with a small capacity of about 4 bits, such a method is not possible. In some cases, there may not be enough room to incorporate a timer function.

Furthermore, in the conventional synchronous pulse counting method, synchronous pulses may be counted including the vertical blanking interval. In this vertical blanking section, equalizing pulses are inserted at 1/2 (H) intervals, and when receiving a weak electric field, the synchronizing pulse may disappear due to pulse sag, making it difficult to accurately count. This could lead to malfunctions.

In view of this problem, it is an object of the present invention to detect a video signal with a simple configuration and with high accuracy.

[Means for solving problems]

In FIG. 1, a pulse counter 8 counts horizontal synchronizing pulses in a vertical scanning period excluding a vertical blanking period,
The configuration is such that a microcomputer 5 or the like determines the presence or absence of a video signal based on the counted value.

[Effect]

This eliminates the possibility of sync pulses to be counted disappearing due to a sag in the input video signal that tends to occur in the vertical blanking portion, resulting in inaccurate count values, or erroneous counting of equalization pulses, thereby increasing the accuracy of determination. Furthermore, since the counting time width is determined based on the vertical synchronization signal, no special time base generation means is required.

〔Example〕

FIG. 1 shows a TV using a video signal detection circuit according to the present invention.
FIG. 2 is a block diagram of main parts of a tuner. A signal received by the antenna 1 is input to a tuner circuit 2 and output to an IF circuit 3. The signal is demodulated into a video signal by the IF ratio output detection circuit 4, and output to the video amplification stage.

The tuner circuit 2 is, for example, a synthesizer tuner including a PLL circuit, and has a search function for automatically sweeping the tuning voltage, that is, the tuning frequency. tuner circuit 2
The control is performed by the channel selection microcomputer 5. The tuning microcomputer 5 receives the output voltage of the AFT detection circuit 6 that detects the carrier level of the output of the 1F circuit 3, and generates an eighth control voltage that draws the PLL (or local oscillator) of the tuner circuit 2 to the tuning point. Derive.

In this pull-in by AFT, it may become tuned to the IF ratio output sound carrier, so at the tuning point (stable point), an AFT stable signal is derived from the tuning microcomputer 5, and in response to this signal, a horizontal synchronizing pulse is generated. (H pulse) is counted, and if the counted value is within the set tolerance range, it is determined that the tuning point is correct.

When the PLL locks due to deviation from the correct tuning point,
If the number of H pulses to be counted decreases significantly, or if noise is counted and the count value increases significantly, in this case, it is determined that there is a tuning failure due to deviation from the counting tolerance range, and the tuning frequency sweep is restarted. .

The H pulse is obtained by amplitude discrimination of the video output of the detection circuit 4 by the synchronization separation circuit 7. This H pulse is applied to the clock input CK of the pulse counter 8. On the other hand, the vertical synchronization signal V obtained from the synchronization separation circuit 7 is transmitted to the V pulse forming circuit 9.
V blanking (V-BLK) shown in Figure 2.
) a V pulse is formed whose section is at a low level.

(2) The pulse is led out to the gate circuit IO. This gate circuit 10 is given the above-mentioned AFT stability signal from the channel selection microcomputer 5, and after the AFT stability signal is output, the first high level section of the pulse is sent from the gate circuit 10 as a control signal during the counting time. 8 enable human power is given. Therefore, the counter 8 counts the H pulses in the high level section of the V pulses, and outputs the counted value to the channel selection microcomputer 5.

The channel selection microcomputer 5 determines whether or not the counted value is within the allowable range, and if it is within the allowable range, ends the channel selection operation. Moreover, if it is outside the acceptable range, the search is restarted.

Since H pulses are counted excluding the V blanking interval, the count value is not inaccurate due to vertical synchronization signal sag or equalization pulse, and the presence or absence of a video signal is determined with high accuracy. can do. In addition, since the V pulse generated from the vertical synchronization signal is used as the counting time base, there is no need for a timer circuit or timer software.
The required functions can be obtained with a very simple configuration.

FIG. 3 is a block diagram of the channel selection microcomputer, and FIG. 4 is a flow chart of the H pulse counter.
, a RAM 17, an atto L/sub bus 18, and a data bus 19. The pulse counter 8 is shared with the event counter in the microcomputer 5. A channel selection command is given to the CPU 15 from a remote control amplifier 22 that receives a signal from a channel selection key 20 or a remote controller 21.

The output of the AFT detection circuit 6 (AFT detection level) is taken into the CPU 15 via the interface 23, and based on this detection level, the tuning voltage is sent from the CPU 5 to the PLL circuit 27 of the tuner circuit 2 via the interface 26.
is derived.

When the AFT detection level is stabilized at the maximum point, a V pulse is then taken in via the interface 25, and based on this, a control signal for the counter time width is given to the counter 8 via the interface 24.

As shown in the flowchart of FIG. 4, in the count mode, the CPU 15 (1) discriminates between blanking sections V-BLK, and (2) starts counting H pulses when the blanking section ends.

Then, counting is stopped at the leading edge of the next V blanking section. The count value N is taken into the CPU 15, and for example, 200<N
When <300, it is determined that a video signal is present, and the channel selection operation is ended. Further, when N is outside the above-mentioned allowable range, it is determined that there is no video signal and the search is restarted.

Note that the counting time width may be an integral multiple of the vertical scanning period and may be a width excluding the vertical blanking section.

〔Effect of the invention〕

According to the present invention, as described above, the accuracy of determining the presence or absence of a video signal is improved, and moreover, generation of a time base for counting horizontal synchronization pulses becomes extremely simple.

[Brief explanation of drawings]

FIG. 1 shows an embodiment of the video signal detection circuit of the present invention.
A block diagram of the main part of the V tuner, Fig. 2 is a waveform diagram of the V pulse showing the counting time width, Fig. 3 is a block diagram of the main part of the tuning microcomputer shown in Fig. 1, and Fig. 4 is a video signal detection procedure. It is a flowchart which shows. In addition, in the symbols used in the drawings, 2. Circuit 4-
−−−−−−−−−−−−−−−−−1 detection circuit 5−・
・−・−・−・−・−! ! Bureau microcomputer 6.
−・−−−−−−・・−・・−AFT detection circuit 7−・−
・−・−Synchronization separation circuit 8・−−−m−−−−−−−・−・−・Pulse counter 9−−−−−・−・−1−−−−! -.--V pulse forming circuit IO.--.----------Gate circuit.

Claims (1)

[Claims] A video signal detection circuit comprising a counter that counts horizontal synchronizing pulses using a vertical scanning period excluding a vertical blanking interval as a counting time width, and determining the presence or absence of an input video signal based on the counted value.