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JPS61222010A - Flattening method - Google Patents

Flattening method

Info

Publication number
JPS61222010A
JPS61222010A JP60062500A JP6250085A JPS61222010A JP S61222010 A JPS61222010 A JP S61222010A JP 60062500 A JP60062500 A JP 60062500A JP 6250085 A JP6250085 A JP 6250085A JP S61222010 A JPS61222010 A JP S61222010A
Authority
JP
Japan
Prior art keywords
resist
insulating layer
etching
ion
incidence angle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60062500A
Other languages
Japanese (ja)
Other versions
JPH0546612B2 (en
Inventor
Satoshi Yoshida
敏 吉田
Shigeru Kamioka
尉 上岡
Yoshiaki Kato
吉明 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Holdings Corp
Original Assignee
Fuji Photo Film Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Photo Film Co Ltd filed Critical Fuji Photo Film Co Ltd
Priority to JP60062500A priority Critical patent/JPS61222010A/en
Priority to US06/843,416 priority patent/US4662985A/en
Publication of JPS61222010A publication Critical patent/JPS61222010A/en
Publication of JPH0546612B2 publication Critical patent/JPH0546612B2/ja
Granted legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/30Hydrogen technology
    • Y02E60/50Fuel cells

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Magnetic Heads (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To obtain an extremely flat surface regardless of a pattern size by subjecting the resist surface formed by embedding the recesses on the surface of an insulating layer having ruggedness with a dummy resist and coating further the resist thereon to ion incidence at two stages of angles. CONSTITUTION:A lower magnetic layer 13, a conductor layer 11 and an insulating layer 15 are successively formed on a substrate 14 and since the surface is made rugged by underlying conductor coils, the photoresist 16 is coated in the recesses thereof and the resist 17 is further coated thereon to embed the small recesses of the resist 16. The resist 16 is heat-treated at >=200 deg.C to prevent the melting with the resist 17. The ions are made incident at 30-45 deg. angle to the surface of the resist 17 to prevent the generation of the ruggedness on the surface. The SiO2 of the layer 15 and the resist are etched at the same speed and 75 deg. ion incident angle and thereafter a magnetic layer 18 is formed. The recording and reproducing efficiency is thus improved by two stages of etching for flattening.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は凹凸を有する絶縁層の表面をイオンエツチング
を用いて平坦化する方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for planarizing the surface of an insulating layer having irregularities using ion etching.

(従来技術) 例えば薄膜磁気ヘッドにおいては上部磁極形成前に、コ
イル導体が凹凸を有するためにその上にスパッタリング
などで形成される絶縁層は下地であるコイル導体の凹凸
の影響を受けて凹凸に形成される。したがってその上に
スパッタリングなどで形成される磁性体(例えばセンダ
ストやアモルファス)も凹凸を有するものとなり、これ
により磁性体の透磁率が低下してしまい磁気ヘッドの記
録再生効率が低下する。そのため、通常この凹凸を除去
するために平坦化処理が行なわれる。
(Prior art) For example, in a thin film magnetic head, before the formation of the upper magnetic pole, the coil conductor has unevenness, so the insulating layer formed by sputtering etc. on the coil conductor becomes uneven due to the influence of the unevenness of the underlying coil conductor. It is formed. Therefore, the magnetic material (for example, sendust or amorphous) formed thereon by sputtering or the like also has irregularities, which reduces the magnetic permeability of the magnetic material and reduces the recording and reproducing efficiency of the magnetic head. Therefore, flattening treatment is usually performed to remove these unevenness.

第3図(a)〜(e)に示した工程は、従来から実施さ
れている薄m磁気ヘッドの絶縁層を平坦化するための方
法である。すなわち基板4上にセンダストやアモルファ
スなどの磁性体をスパッタリングあるいは蒸着などして
下部磁性層3を形成する。さらにその上に5iOzなど
から成る第1絶縁層2を形成する。そしてその上にCU
やA9Jなどからなる導体層を形成し、イオンエツチン
グなどを用いてコイル導体1を形成する(第3図(a)
)。そしてその上にSiO2などから成る第2絶縁層5
をスパッタリングあるいは蒸着などで形成する(第3図
(b))。その後フォトレジスト6を第2絶縁層の段差
よりも十分厚く塗布しく第3図(C))、フォトレジス
ト6と第2絶縁層5のエツチング速度が同一となるイオ
ン入射角度(イオン入射角度とはイオンビームと試料面
の法線とで形成された角度を言う。)でエツチングをし
比較的平坦化された絶縁層5を得る(第3図(d)第4
図)。なお、第4図は第3図(d)の一部を拡大して示
す図である。この後、最終的には、この絶縁層5の上に
センダストやアモルファスなどから成る磁性体7をスパ
ッタリングや蒸着などにより形成する(第3図・(e)
)Lかしながら、上記方法による平坦化ではパターンサ
イズにより凹凸量に差があり、大きいパターンではほと
んど平坦化されない。第5図はパターンサイズに対する
フォトレジスト塗布後の凹凸量を示したものである。こ
れは段差量2μm、パターン巾とスペースがそれぞれW
umの凹凸の上にフォトレジストを約8μm塗布した後
のフォトレジスト表面上の凹凸1aを示したものである
。第5図から明らかなように下地の凹凸の緩和度はパタ
ーンサイズに依存し、パターンサイズが大きくなると平
坦度の緩和は全くなくなりエツチング後も絶縁層表面に
は依然として凹凸が存在する。
The steps shown in FIGS. 3(a) to 3(e) are a conventional method for planarizing the insulating layer of a thin m magnetic head. That is, the lower magnetic layer 3 is formed on the substrate 4 by sputtering or vapor depositing a magnetic material such as sendust or amorphous. Furthermore, a first insulating layer 2 made of 5iOz or the like is formed thereon. And on top of that
A conductor layer made of A9J or A9J is formed, and a coil conductor 1 is formed using ion etching or the like (Fig. 3(a)).
). A second insulating layer 5 made of SiO2 or the like is provided thereon.
is formed by sputtering or vapor deposition (FIG. 3(b)). After that, the photoresist 6 is applied to a thickness sufficiently thicker than the step of the second insulating layer (FIG. 3(C)), and the ion incidence angle at which the etching rate of the photoresist 6 and the second insulating layer 5 are the same (what is the ion incidence angle? (This refers to the angle formed by the ion beam and the normal to the sample surface.) to obtain a relatively flat insulating layer 5 (Fig. 3(d) 4).
figure). Note that FIG. 4 is an enlarged view of a part of FIG. 3(d). After this, a magnetic material 7 made of sendust, amorphous, etc. is finally formed on this insulating layer 5 by sputtering, vapor deposition, etc. (Fig. 3 (e))
)L However, when flattening using the above method, the amount of unevenness varies depending on the pattern size, and large patterns are hardly flattened. FIG. 5 shows the amount of unevenness after coating the photoresist with respect to the pattern size. This has a step height of 2 μm, a pattern width and a space of W.
This figure shows the unevenness 1a on the surface of the photoresist after coating the photoresist to a thickness of about 8 μm on the unevenness of um. As is clear from FIG. 5, the degree of relaxation of the unevenness of the underlying layer depends on the pattern size, and as the pattern size increases, there is no relaxation of flatness at all, and even after etching, the surface of the insulating layer still has unevenness.

また平坦化エツチングを行なう場合、第6図に示すよう
に、S t Ozとフォトレジストが同一エツチング速
度となるイオン入射角度θは75°である。このような
イオン入射角度θで平坦化エツチングを行なうと、この
角度θはフォトレジストの最大エツチング速度が得られ
るイオン入射角55″よりも大きいため、フォトレジス
ト表面上の微少な不純物が核となってエツチングされた
フォトレジストがこの核に再付着したり、あるいはエツ
チングされたフォトレジストの拡散によりフォトレジス
ト表面に再付着、再重合する。この結果フォトレジスト
のエツチング中に突起物(8A18B)が形成される。
Further, when flattening etching is performed, the ion incidence angle θ at which the S t Oz and the photoresist are etched at the same rate is 75°, as shown in FIG. When flattening etching is performed at such an ion incidence angle θ, since this angle θ is larger than the ion incidence angle of 55″ at which the maximum etching rate of the photoresist is obtained, minute impurities on the photoresist surface become nuclei. The etched photoresist is re-attached to these nuclei, or the etched photoresist is re-attached and re-polymerized to the photoresist surface due to diffusion.As a result, protrusions (8A18B) are formed during photoresist etching. be done.

このような状態で絶縁層であるS!Ozをエツチングし
てゆくと7オトレジストと5i02のエツチング速度が
等しいためフォトレジストの突起物が5iOz上に転写
され、平坦化すべき絶縁層に無数の突起物が形成されて
しまい平坦化の効果が薄れるという問題がある。
In this state, the insulating layer S! As the etching speed of 7iOz is equal to that of 5i02, the protrusions of the photoresist are transferred onto the 5iOz, and countless protrusions are formed on the insulating layer to be planarized, reducing the planarization effect. There is a problem.

(第4図) (発明の目的) 本発明は上記問題を解決するためになされたものであり
、パターンサイズに関係なく極めて良好な平滑面を得る
ことのできる平坦化方法を提供することを目的とするも
のである。
(Figure 4) (Object of the Invention) The present invention was made to solve the above problem, and its purpose is to provide a flattening method that can obtain an extremely smooth surface regardless of the pattern size. That is.

(発明の構成) 本発明の平坦化方法は、凸凹のある絶縁層表面にこの凸
凹と同じ厚みのフォトレジストを塗布し、該レジストを
バターニングして凹部をダミーレジストで埋め、該ダミ
ーレジストを熱処理し、その後ダミーレジストで埋めら
れた面上に上部レジストを塗布した後該レジストを熱処
理し、その後該レジスト表面からまずレジストの最大エ
ツチング速度が得られるイオン入射角よりも小さい角度
でエツチングし、次に前記レジストと前記絶縁層とのエ
ツチング速度が等しくなるイオン入射角でエツチングす
ることを特徴とするものである。
(Structure of the Invention) The planarization method of the present invention is to apply a photoresist with the same thickness as the unevenness on the surface of an insulating layer having unevenness, butterify the resist, fill the depressions with a dummy resist, and replace the dummy resist with the same thickness as the unevenness. heat-treating, then applying an upper resist on the surface filled with the dummy resist, heat-treating the resist, and etching the resist surface first at an ion incidence angle smaller than an ion incidence angle at which a maximum etching rate of the resist is obtained; Next, etching is performed at an ion incidence angle that makes the etching rates of the resist and the insulating layer equal.

(実 施 例) 以下、本発明の一実施例について図面を用いて説明する
(Example) An example of the present invention will be described below with reference to the drawings.

第1図は本発明による薄膜磁気ヘッドの加工プロセスを
図す模式図である。例えば、WjIIl磁気ヘッドにお
いては基板14上にセンダストあるいはアモルファス等
をスパッタリングや蒸着により下部磁性層13を形成し
、その後CuやA9Jなどからなる導体層11をスパッ
タリングや蒸着などで形成する(第1図(a))。さら
に、その上にSiO□などから成る絶縁層15を同様の
手段を用いて形成する(第1図(b))。この場合絶縁
層15は下地導体コイルの凹凸の影響により凹凸を有す
る層となる。その後フォトレジスト16を凹凸と同じ^
さ分の厚さだけ塗布し、その後バターニングし凹部に7
オトレジスト16を形成する(第1図(C))。さらに
このレジスト16の上にまた上部レジスト17を塗布す
るが、その際該レジスト16が上部レジスト17に溶解
するのを避けるため200℃以上で熱処理をする。なお
この場合熱処理の温度が200°未満であると上下レジ
ストが溶は合ってしまい凹部を埋める事が出来ず、レジ
ストによる平坦塗布が出来なくなる。
FIG. 1 is a schematic diagram illustrating the manufacturing process of a thin film magnetic head according to the present invention. For example, in a WjII magnetic head, the lower magnetic layer 13 is formed on the substrate 14 by sputtering or evaporation of sendust or amorphous, and then the conductor layer 11 made of Cu, A9J, etc. is formed by sputtering or evaporation (see Fig. 1). (a)). Furthermore, an insulating layer 15 made of SiO□ or the like is formed thereon using the same method (FIG. 1(b)). In this case, the insulating layer 15 becomes a layer having irregularities due to the influence of the irregularities of the underlying conductor coil. After that, apply the photoresist 16 in the same way as the uneven surface ^
Apply only the thickness of 10 minutes, then butter it and apply it to the recessed area.
An optical resist 16 is formed (FIG. 1(C)). Further, an upper resist 17 is coated on top of this resist 16, but at this time, heat treatment is performed at 200° C. or higher to prevent the resist 16 from dissolving into the upper resist 17. In this case, if the temperature of the heat treatment is less than 200°, the upper and lower resists will melt together, making it impossible to fill the recesses and making it impossible to apply the resist evenly.

さらに、この上に上部レジスト17を塗布し、ダミーレ
ジスト16で生じている小さな凹部を埋める(第1図(
d))。このとき上部レジスト17の厚さは4μm以上
あればパターンサイズの大小に関係なく凹凸を平坦にす
る事が出来る。
Furthermore, an upper resist 17 is applied on top of this to fill in the small recesses created by the dummy resist 16 (see Fig. 1).
d)). At this time, if the thickness of the upper resist 17 is 4 μm or more, the unevenness can be made flat regardless of the pattern size.

この様にして形成された上部レジスト17を130℃以
上で熱処理した後上部レジスト表面からまずイオミリン
グでイオン入射角度θが30°より大きくて45°より
も小さい角度でエツチングする(第1図(e))。ここ
で130℃以上で熱処理する理由はフォトレジストが1
30℃より低い温度での熱処理では、フォトレジストの
熱分解が完全に進行せず、そのためイオンミリングでエ
ツチングした際エツチングの速い部分と遅い部分とが混
在する形となり、このまま平坦化エツチングを進めてゆ
くとレジスト中に凹凸が発生してしまい、この凹凸がそ
のままS t Ozである絶縁層15に転写されて平坦
化の効果がなくなるためである。
After the upper resist 17 formed in this way is heat-treated at 130°C or higher, the upper resist surface is first etched by ion milling at an ion incident angle θ greater than 30° and smaller than 45° (see Fig. 1 (e). )). The reason for heat treatment at 130°C or higher is that the photoresist is
If heat treatment is performed at a temperature lower than 30°C, thermal decomposition of the photoresist will not proceed completely, and as a result, when etched by ion milling, there will be a mixture of fast etching parts and slow etching parts, and flattening etching will continue as it is. This is because as time goes on, unevenness will occur in the resist, and this unevenness will be directly transferred to the insulating layer 15 made of S t Oz, and the planarization effect will be lost.

また、イオン入射角度θを30°よりも大きく、45°
よりも小さい角度でエツチングするのは以下の理由によ
る。すなわち、第2図に示すようにイオン入射角度θが
比較的小さい角度、例えば20°においてはフォトレジ
ストは深さ約0.8μm、直径約10μm程度の円錐状
の凹みとなり、イオン入射角度θが大きくなるにつれて
円錐状の凹みの深さは次第に浅くなり、イオン入射角度
θが例えば35°では凹みの深さは約0.2μm程度と
なる。またイオン入射角度θが45°では凹凸の両方が
存在し、45°以上の角度においては、はとんどが高さ
約2μm直径10μm程度の円錐状の凸部となる。しか
もこの凸部は長時間エツチングした場合においてのみ発
生し、数十分のエツチング時間では、はとんど凸状の発
生は見られない。
In addition, the ion incidence angle θ is larger than 30° and is 45°.
The reason for etching at a smaller angle is as follows. That is, as shown in Fig. 2, when the ion incidence angle θ is relatively small, for example 20°, the photoresist becomes a conical depression with a depth of about 0.8 μm and a diameter of about 10 μm, and when the ion incidence angle θ is As the size increases, the depth of the conical recess gradually becomes shallower, and when the ion incidence angle θ is, for example, 35°, the depth of the recess is about 0.2 μm. Further, when the ion incidence angle θ is 45°, both unevenness exists, and at an angle of 45° or more, most of the unevenness becomes a conical protrusion with a height of about 2 μm and a diameter of about 10 μm. In addition, these protrusions only occur when etching is performed for a long time, and the protrusions are rarely observed even after several tens of minutes of etching time.

したがってまず、30’より大きく45°より小さいイ
オン入射角度θで数時間エツチングし、次にSfOgと
レジストのエツチング速度が同一となるイオン入射角度
θ75°で数十分エツチングする。この後、スパッタリ
ングや蒸着などによりセンダストあるいはアモルファス
磁性体層18を形成する(第1図(f))。
Therefore, first, etching is carried out for several hours at an ion incidence angle θ greater than 30' and smaller than 45 degrees, and then etching is carried out for several minutes at an ion incidence angle θ 75 degrees at which the etching rates of SfOg and resist are the same. Thereafter, a sendust or amorphous magnetic layer 18 is formed by sputtering, vapor deposition, etc. (FIG. 1(f)).

なお、上述した実施例においては本発明を1lll磁気
ヘツドに応用した場合について説明しているが、本発明
を半導体その他平坦化が必要であるデバイスに応用して
も同様な効果を得ることができる。
Although the above-mentioned embodiment describes the case where the present invention is applied to a 1llll magnetic head, similar effects can be obtained even when the present invention is applied to semiconductors and other devices that require planarization. .

(発明の効果) 以上説明したように本発明の平坦化方法によれば、第1
段階の平坦化エツチングによりフォトレシスト表面上の
凸凹を極めて浅い凹部とし、その後第2段階の平坦化エ
ツチングによりフォトレジストと絶縁層を同一速度でエ
ツチングするようにしているから、エツチングされた絶
縁層は、凹凸のパターンサイズによらず、また突起物が
存在しない平滑な面が得られる。
(Effects of the Invention) As explained above, according to the planarization method of the present invention, the first
The unevenness on the photoresist surface is made into extremely shallow depressions by the stepwise planarization etching, and then the photoresist and the insulating layer are etched at the same speed by the second step of planarization etching, so that the etched insulating layer is Regardless of the pattern size of the unevenness, a smooth surface without any protrusions can be obtained.

さらに、この様に完全平坦化された絶縁層の上にスパッ
タリングや蒸着などにより形成されたセンダストあるい
はアモルファス磁性体は凹凸量が゛ 0.5μm以内に
押えられるため、磁性体の透磁率の低下がない。このた
めヘッドの記録再生効率が向上するという顕著な効果を
奏することができる。
Furthermore, since the amount of unevenness of sendust or amorphous magnetic material formed by sputtering or vapor deposition on such a completely flat insulating layer is suppressed to within 0.5 μm, the magnetic permeability of the magnetic material is less likely to decrease. do not have. Therefore, the remarkable effect of improving the recording and reproducing efficiency of the head can be achieved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による薄膜磁気ヘッドの加工プロセスを
示す図、 第2図は、イオン入射角度と突起物の大きさを示す図、
第3図は従来の薄膜磁気ヘッドの加工プロセスを示す図
、第4図は第3図(d)の部分拡大図、第5図は凹凸量
2μmの際のパターンサイズとレジスト塗布後の凹凸口
を示談図、第6図は5fOzとフォトレジストのエツチ
ング速度のイオン入射角依存性を示す図である。 11・・・コイル導体  12・・・絶縁層13・・・
下部磁性層  14・・・基 板15・・・絶 縁 層
  16・・・フォトレジスト17・・・上部レジスト 第1図 第2図 イれ八4す角度ec1) 第4図 jI6図 イオシ入委り角度 ea電) jI3図 第5図 ノークーン中よ−w     (JJITI)    
  (W)ハ・クーン関鐸−
FIG. 1 is a diagram showing the processing process of a thin film magnetic head according to the present invention. FIG. 2 is a diagram showing the ion incidence angle and the size of the protrusion.
Fig. 3 is a diagram showing the processing process of a conventional thin film magnetic head, Fig. 4 is a partially enlarged view of Fig. 3(d), and Fig. 5 is a pattern size when the amount of unevenness is 2 μm and the unevenness after resist coating. FIG. 6 is a diagram showing the dependence of etching rate of 5fOz and photoresist on ion incidence angle. 11... Coil conductor 12... Insulating layer 13...
Lower magnetic layer 14... Substrate 15... Insulating layer 16... Photoresist 17... Upper resist Figure 1 Figure 2 Angle ec1) Figure 4 (JJITI)
(W) Ha Koon Kantaku

Claims (2)

【特許請求の範囲】[Claims] (1)導電体等により凹凸が生じている表面に、平坦化
されるべき絶縁層を形成する工程と、該絶縁層上に前記
凹凸と略等しい厚みのフォトレジストを塗布し、該レジ
ストをパターニングして前記絶縁層表面に出現した凹部
をダミーレジストで埋め、該ダミーレジストを熱処理す
る工程と、ダミーレジストで埋められた前記絶縁層表面
上に上部レジストを塗布して該上部レジストを熱処理す
る工程と、該上部レジストを表面から該上部レジストの
最大エッチング速度が得られるイオンビーム入射角より
も小さい角度でエッチングした後、前記レジストと前記
絶縁層とのエッチング速度が等しくなるイオン入射角で
エッチングする工程とから成る平坦化方法。
(1) A step of forming an insulating layer to be flattened on a surface with unevenness caused by a conductor, etc., applying a photoresist of approximately the same thickness as the unevenness on the insulating layer, and patterning the resist. a step of filling the recesses appearing on the surface of the insulating layer with a dummy resist and heat-treating the dummy resist; and a step of applying an upper resist on the surface of the insulating layer filled with the dummy resist and heat-treating the upper resist. and etching the upper resist from the surface at an ion beam incidence angle smaller than an ion beam incidence angle that provides a maximum etching rate of the upper resist, and then etching at an ion incidence angle that makes the etching rates of the resist and the insulating layer equal. A flattening method consisting of a process.
(2)前記絶縁層をSiO_2で形成し、凹凸を埋める
前記レジストのダミーパターンを200℃以上で熱処理
し、次に、上部レジストを1.30℃以上で熱処理し、
次にイオン入射角度が30°よりも大きく45°よりも
小さいイオン入射角度でイオンミリングし、最後にイオ
ン入射角度75°でイオンミリングする工程を有する特
許請求の範囲第1項記載の平坦化方法。
(2) forming the insulating layer with SiO_2, heat-treating the dummy pattern of the resist filling the unevenness at 200°C or higher, then heat-treating the upper resist at 1.30°C or higher;
The planarization method according to claim 1, further comprising the steps of: next performing ion milling at an ion incidence angle greater than 30° and smaller than 45°; and finally ion milling at an ion incidence angle of 75°. .
JP60062500A 1985-03-27 1985-03-27 Flattening method Granted JPS61222010A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP60062500A JPS61222010A (en) 1985-03-27 1985-03-27 Flattening method
US06/843,416 US4662985A (en) 1985-03-27 1986-03-24 Method of smoothing out an irregular surface of an electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60062500A JPS61222010A (en) 1985-03-27 1985-03-27 Flattening method

Publications (2)

Publication Number Publication Date
JPS61222010A true JPS61222010A (en) 1986-10-02
JPH0546612B2 JPH0546612B2 (en) 1993-07-14

Family

ID=13201946

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60062500A Granted JPS61222010A (en) 1985-03-27 1985-03-27 Flattening method

Country Status (1)

Country Link
JP (1) JPS61222010A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63188812A (en) * 1987-01-30 1988-08-04 Matsushita Electric Ind Co Ltd Production of thin film magnetic head
JPH01230254A (en) * 1988-03-10 1989-09-13 Sanyo Electric Co Ltd Flattening method
JP2007511918A (en) * 2003-11-18 2007-05-10 エフ イー アイ カンパニ Method and apparatus for controlling local changes in milling cross section of structure

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59104718A (en) * 1982-12-08 1984-06-16 Comput Basic Mach Technol Res Assoc Production of thin film magnetic head
JPS59112416A (en) * 1982-12-20 1984-06-28 Nippon Telegr & Teleph Corp <Ntt> Production of thin film magnetic head

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59104718A (en) * 1982-12-08 1984-06-16 Comput Basic Mach Technol Res Assoc Production of thin film magnetic head
JPS59112416A (en) * 1982-12-20 1984-06-28 Nippon Telegr & Teleph Corp <Ntt> Production of thin film magnetic head

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63188812A (en) * 1987-01-30 1988-08-04 Matsushita Electric Ind Co Ltd Production of thin film magnetic head
JPH01230254A (en) * 1988-03-10 1989-09-13 Sanyo Electric Co Ltd Flattening method
JP2007511918A (en) * 2003-11-18 2007-05-10 エフ イー アイ カンパニ Method and apparatus for controlling local changes in milling cross section of structure
US8163145B2 (en) 2003-11-18 2012-04-24 Fei Company Method and apparatus for controlling topographical variation on a milled cross-section of a structure
US9852750B2 (en) 2003-11-18 2017-12-26 Fei Company Method and apparatus for controlling topographical variation on a milled cross-section of a structure

Also Published As

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